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Article

Hardware-Accelerated SMV Subscriber: Energy Quality Pre-Processed Metrics and Analysis

by
Mihai-Alexandru Pisla
1,*,
Bogdan-Adrian Enache
1,*,
Vasilis Argyriou
2,
Panagiotis Sarigiannidis
3 and
George-Calin Seritan
1
1
Faculty of Electrical Engineering, National University of Science and Technology POLITEHNICA Bucharest, 060042 Bucharest, Romania
2
Faculty of Engineering, Computing and the Environment, Kingston University, Kingston upon Thames KT1 2EE, UK
3
Department of Electrical and Computer Engineering, University of Western Macedonia, 50100 Kozani, Greece
*
Authors to whom correspondence should be addressed.
Electronics 2025, 14(16), 3297; https://doi.org/10.3390/electronics14163297
Submission received: 8 July 2025 / Revised: 13 August 2025 / Accepted: 15 August 2025 / Published: 19 August 2025
(This article belongs to the Section Circuit and Signal Processing)

Abstract

The paper presents an FPGA-based, hardware-accelerated IEC 61850-9-2 Sampled Measured Values (SMV) subscriber—termed the high-speed SMV subscriber (HS3)—by integrating real-time energy-quality (EQ) analytics directly into the subscriber pipeline while preserving a deterministic, microsecond-scale operation under high stream counts. Building on a prior hardware decoder that achieved sub-3 μs SMV parsing for up to 512 subscribed svIDs with modest logic utilization (<8%), the proposed design augments the pipeline with fixed-point RTL modules for single-bin DFT frequency estimation, windowed true-RMS computation, and per-sample active power evaluation, all operating in a streaming fashion with configurable windows and resolutions. A lightweight software layer performs only residual scalar combinations (e.g., apparent power, form factor) on pre-aggregated hardware outputs, thereby minimizing CPU load and memory traffic. The paper’s aim is to bridge the gap between software-centric analytics—common in toolkit-based deployments—and fixed-function commercial firmware, by delivering an open, modular architecture that co-locates SMV subscription and EQ pre-processing in the same hardware fabric. Implementation on an MPSoC platform demonstrates that integrating EQ analytics does not compromise the efficiency or accuracy of the primary decoding path and sustains the latency targets required for protection-and-control use cases, with accuracy consistent with offline references across representative test waveforms. In contrast to existing solutions that either compute PQ metrics post-capture in software or offer limited in-FPGA analytics, the main contributions lie in a cohesive, resource-efficient integration that exposes continuous, per-channel EQ metrics at microsecond granularity, together with an implementation-level characterization (latency, resource usage, and error against reference calculations) evidencing suitability for real-time substation automation.
Keywords: SMV subscriber; programmable system-on-chip architecture; FPGA; smart grid; energy quality; signal processing SMV subscriber; programmable system-on-chip architecture; FPGA; smart grid; energy quality; signal processing

Share and Cite

MDPI and ACS Style

Pisla, M.-A.; Enache, B.-A.; Argyriou, V.; Sarigiannidis, P.; Seritan, G.-C. Hardware-Accelerated SMV Subscriber: Energy Quality Pre-Processed Metrics and Analysis. Electronics 2025, 14, 3297. https://doi.org/10.3390/electronics14163297

AMA Style

Pisla M-A, Enache B-A, Argyriou V, Sarigiannidis P, Seritan G-C. Hardware-Accelerated SMV Subscriber: Energy Quality Pre-Processed Metrics and Analysis. Electronics. 2025; 14(16):3297. https://doi.org/10.3390/electronics14163297

Chicago/Turabian Style

Pisla, Mihai-Alexandru, Bogdan-Adrian Enache, Vasilis Argyriou, Panagiotis Sarigiannidis, and George-Calin Seritan. 2025. "Hardware-Accelerated SMV Subscriber: Energy Quality Pre-Processed Metrics and Analysis" Electronics 14, no. 16: 3297. https://doi.org/10.3390/electronics14163297

APA Style

Pisla, M.-A., Enache, B.-A., Argyriou, V., Sarigiannidis, P., & Seritan, G.-C. (2025). Hardware-Accelerated SMV Subscriber: Energy Quality Pre-Processed Metrics and Analysis. Electronics, 14(16), 3297. https://doi.org/10.3390/electronics14163297

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