Efficiency Design of a Single-Phase Bidirectional Rectifier for Home Energy Management Systems

Abstract

This paper examines the current state of Home Energy Management Systems (HEMSs), highlighting the key role of the single-phase bidirectional rectifier (SPBR). It provides a detailed design process for the converter used in HEMSs, with a particular focus on the bidirectional charge and discharge of high-voltage batteries. The converter’s operating conditions were determined through a comprehensive evaluation of its components, which were designed and assessed to enable accurate power loss calculations. This approach ensures proper component sizing and a clear understanding of the converter’s efficiency. A specialized electronic control circuit manages two operating modes of the converter: a boost rectifier with power factor correction (PFC) and a sinusoidal pulse width modulation (SPWM) inverter. To validate the design, a 7.4 kW prototype was developed using silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs). The prototype achieved a peak efficiency of nearly 98% in both modes, with a unity power factor (PF) and total harmonic distortion (THD) below 7% at full power.

1. Introduction

A key challenge that technology faces today is finding ways to balance the increasing demand for energy with the need to fulfill sustainability requirements in order to mitigate the environmental impact of energy generation. Since electricity is a limited resource, managing its consumption in both homes and businesses is essential, not only for ecological reasons, but also to enable power companies to meet demand efficiently [1]. In this context, home energy management systems (HEMSs) are essential for improving the efficient use of electrical energy. The information collected about energy consumption, combined with the tariff plans provided by suppliers, allows for reduced electricity bills and flexible accommodation of renewable energy sources (RESs) [2]. An efficient and economical HEMS must take into account not only modern appliances, but also energy storage systems (ESSs) and plug-in electric vehicles (PEVs), among others, to reduce costs and mitigate peak demand on the low-voltage grid (LVG). This facilitates the management of the random charging and discharging of electric vehicles (EVs), photovoltaic (PV) energy generation, and the internal consumption of the home, achieving a minimal energy draw from the grid. Additionally, excess energy produced or stored can be fed back into the grid when deemed necessary.

The future potential of HEMSs is very promising. In this context, it is worth mentioning that some studies predict a growth of HEMSs in the European market of 12.5% annually until 2029 [3]. This growth is driven by several factors, including the increasing emphasis on real-time energy conservation, the convenience offered by cloud computing and data analytics, and enhanced device interconnectivity [4].

The implementation of an HEMS relies on the proper connection and control of converters to ensure a continuous flow of energy between the various components of the system. There are two clearly differentiated strategies for establishing this connection: DC coupling and AC coupling.

Figure 1a shows an HEMS where the converters are coupled through a DC bus, which serves as a temporary energy storage element accessible by all converters. The system manages the energy from the battery of the PEV via a bidirectional DC–DC converter (BDC), allowing the battery to either charge or discharge from the DC bus. Similarly, a bidirectional DC–DC converter could be applied to an energy storage battery, which would form the ESS of the HEMS. The RES, constituted by photovoltaic panels or any other renewable energy generator, is connected to the DC bus through a unidirectional converter, which controls the energy output through maximum power point tracking (MPPT) [5].

Finally, the DC bus is connected to the LVG via a bidirectional AC–DC converter. In typical European households, the LVG consists of a 230 V, 50 Hz single-phase grid, with a maximum power capacity of 7.4 kW (32 A) [6]. In this power range, the DC–DC converters usually adopt the dual active bridge (DAB) topology [7], which employs a medium frequency (20 kHz–150 kHz) with zero voltage switching (ZVS) operation to minimize electromagnetic interference (EMI) and maximize energy efficiency by reducing switching losses in the converter’s semiconductor devices [8].

For this application, the AC–DC converter is a single-phase bidirectional rectifier (SPBR) that connects to the LVG to either receive or supply energy to the grid. The smart meter (SM) is responsible for measuring the parameters that characterize the home’s connection to the LVG. Galvanic isolation within the system is typically located in all DC–DC converters to ensure that different devices inside the home can operate with maximum safety. In this case, the bidirectional AC–DC converter can be designed without galvanic isolation, utilizing the LVG and DC-bus reference.

Figure 1b illustrates the AC coupling of the system’s converters. Now, all of the converters are connected on the AC side of the house, which is linked to the LVG through the SM. All of the converters used are bidirectional AC–DC, except for the converter connected to the RES, which operates unidirectionally. Unlike the DC coupling, in this case, the galvanic isolation is provided by the AC–DC converters, typically using two-stage AC–DC and DC–DC converters [9,10].

Figure 2 illustrates a simplified schematic of a bidirectional DC–DC converter employing a dual active bridge (DAB) topology. This design features two full bridges with active switches on both the primary and secondary sides, interconnected through a high-frequency transformer, T, which ensures galvanic isolation and facilitates voltage matching between two voltage levels, V₁ and V₂. The inductor, L, incorporating the transformer’s leakage inductance, acts as the instantaneous energy storage component. The switching signal has a duty ratio of 50%, with a phase shift ϕ between the primary and secondary bridges that determines both the magnitude and direction of power flow. The capacitor C1 serves as the DC link capacitor for the output voltage V₁ of the SPBR, while C2 functions as the output capacitor for the DAB. If a battery is connected at the voltage point V₂, in charge mode, power flows from C1 to C2, transferring energy to the battery. In discharge mode, when the battery supplies power back to the grid, the power flow reverses direction.

Several works exist now in the literature that analyze and compare the performance of the AC-coupling and DC-coupling solutions [11,12,13]. According to these authors, although the number of complete converters used in the HEMS with AC coupling is lower than in the case of DC coupling, their complexity and relatively high loss values often recommend DC coupling. In any case, it is observed that the use of bidirectional AC–DC converters is present in both topologies, which indicates that we should initially conduct a more detailed study of single-phase bidirectional rectifiers.

The typical topology for the SPBR is a transistorized single-phase full-bridge boost rectifier, controlled by pulse width modulation (PWM) to regulate the input current and output voltage so that it can operate at a unity input power factor and capable of power reversal [14,15]. Various PWM strategies have been employed in single-phase AC–DC converters, including bipolar PWM (BPWM), unipolar PWM (UPWM) [16,17], hybrid modulation (HPWM) [18], and hysteresis current control (HCC) [19]. To reduce power losses and minimize electromagnetic interference (EMI), soft-switching modulation [20] and resonant rectifiers [21] have been proposed, which may include galvanic isolation [22].

This article presents a comprehensive design and loss analysis methodology for a single-phase bidirectional rectifier, intended for bidirectional AC–DC converters in HEMS applications. This analysis enabled precise power loss calculations, leading to accurate component sizing and an efficient determination of the converter’s performance. The control system was thoroughly verified to ensure the proper operation of the converter and to serve as the basis for the control implementation based on an FPGA circuit.

In summary, this paper addresses a research gap by introducing a novel approach to the design of single-phase bidirectional rectifiers. It utilizes an advanced approach for determining the optimal operating frequency of SPBR converters, specifically designed for bidirectional power conversion in actual single-phase power systems. Additionally, a comprehensive loss analysis is conducted.

The remainder of this paper is structured as follows: Section 2 discusses and analyses the structure and working process of the proposed converter. This section also shows the design principles of the proposed circuit and performs a complete loss analysis. The results obtained through calculations and experimental measurements are further given in Section 3. Finally, conclusions are drawn in Section 4.

2. Methods and Materials

2.1. Configuration of the SPBR

Figure 3 shows the simplified configuration of the SPBR, which is based on a full bridge with four SiC MOSFET switches that enable its bidirectional operation. The connection to the single-phase grid is made through inductors that filter the grid current. The bidirectional function is made possible because the transistors can conduct both positive and negative currents. An EMI filter is installed on the AC side to suppress conducted interference emissions. A capacitor bank is used for voltage filtering on the DC side of the inverter.

The converter is bidirectional, allowing it to operate in two distinct modes. When power flows from the DC side to the AC side, it functions as a voltage source inverter (VSI). In this mode, the sign of Iac is positive, while the sign of Idc is negative. In contrast, when power is drawn from the mains, it acts as an active boost rectifier for power factor correction (PFC). In this mode, the sign of Iac is negative, while the sign of Idc is positive. The sinusoidal pulse width modulation (SPWM) technique generates the switching signals by comparing a sinusoidal voltage with a triangular waveform, resulting in a power factor close to unity and a low total harmonic distortion (THD) on the AC side. By employing the UPWM control technique, the effective switching frequency is doubled, which reduces ripple in the DC-side current and significantly lowers harmonic distortion on the AC side compared to BPWM [16].

The SPBR is designed for use as a bidirectional AC–DC converter for an HEMS application with DC coupling [23]. The main specifications for the converter design are shown in

Table 1. SPBR specifications.

Specification	Symbol	Value	Unit
Maximum Power	P	7.4	kW
Mains Voltage	VAC	230	V
Mains Frequency	f	50	Hz
Regulated DC Voltage	VDC	400	V
Power Factor	PF	1
Total Harmonic Distortion	THD	7	%
Mains Current Ripple	ΔIAC	5	A
DC Voltage Ripple	ΔVDC	5	V
Efficiency	η	98	%
Switching Frequency	fS	20	kHz

.

Improving efficiency depends on several design parameters, such as the selection of power devices, the choice of the operating frequency, and the design of magnetic components. For this type of converter, the switching frequency is one of the most difficult magnitudes to specify. Recent studies allow for finding the optimal frequency that maximizes efficiency and minimizes the size and mass of the converter’s components [24].

2.2. Initial Analysis of the SPBR

The primary design equations for the converter, applicable to both inverter and rectifier modes, are available in well-known technical articles and books, as well as application notes from component manufacturers [16,25]. The duty cycle of sinusoidal pulse-width modulation (SPWM) adjusts proportionally to the amplitude of the grid voltage, with its peak value being

$$D_{\max }={\displaystyle \frac{\eta V_{AC}\sqrt{2}}{V_{DC}}}$$

(1)

The value of the input filter inductance is determined using

$$L={\displaystyle \frac{(1-D_{\max })V_{AC}}{2\sqrt{2}{f}_S\Delta I_{AC}}}$$

(2)

The capacitance of the DC side is

$$C={\displaystyle \frac{\eta P}{4\pi f{V}_{DC}\Delta V_{DC}}}$$

(3)

The current in the AC side is obtained with

$$I_{ACrms}={\displaystyle \frac{P}{\eta \hspace{0.17em}PF\hspace{0.17em}{V}_{AC}}}$$

(4)

and the current in the DC side is

$$I_{DC}={\displaystyle \frac{\eta P}{V_{DC}}}$$

(5)

A complete detailed harmonic analysis of the SPBR will allow for more results to be contributed to this analysis [26].

2.3. Design of the AC Inductor

The inductor design is influenced by the operating frequency [25]. According to Equation (2), its value is calculated to be L = 164 µH, which can be split into two inductors of L/2 = 82 µH each, connected in series with the two active conductors of the LVG. The design of the number of turns and the selections of the magnetic material depends on the frequency. For this converter, the preferred magnetic core will be constructed by stacking several pieces of the KOOL MU 0077192A7 toroidal core. The inductor will be wound using AWG 7 copper wire. A maximum winding factor of 45% has been chosen, limiting the inductor to a maximum of 22 turns. The selection of the maximum magnetic flux density is influenced by the maximum acceptable losses in the coil, which ultimately determine the core temperature rise. In this design, it is acceptable to set the maximum magnetic flux density to approximately half of its maximum value of 1 T, as calculated by the following equation:

$$B={\displaystyle \frac{L·I_{ACrms}}{\sqrt{2}N·NC·A_e}}+\Delta B$$

(6)

where L is total inductance obtained with Equation (2), and A_e is the effective magnetic area of each toroidal piece of core. From Equation (6), it is possible to determine the number of core pieces NC to be stacked. The winding turns N is calculated with

$$N=\sqrt{{\displaystyle \frac{L}{2NC·A_L}}}$$

(7)

Here, A_L represents the effective inductance per square turn of each toroidal core.

Table 2. Parameters of the magnetic components.

Symbol	Parameter	Value	Unit
L/2	Inductance	82	µH
IACrms	Inductor current (rms)	32.7	A
Ae	Core cross effective section	2.29 × 10−4	m2
K	Parameter for core loss density	1.055
α	Parameter for core loss density	1.988
β	Parameter for core loss density	33.1
N	Winding turns	22
NC	Number of stacked cores	2
Ve	Core effective volume	2.86 × 10−5	m3
AL	Effective inductance per square turn	85	nH/T2
DCR	DC resistance	1.63	mΩ

provides key data essential for designing the magnetic components.

2.4. Design of the DC Capacitor

By applying the specifications from

Table 3. Capacitor design parameters.

Symbol	Parameter	Value	Unit
C	Total capacitance	5.94	mF
ICrms	Inductor current (rms)	19.6	A
ESR	Total capacitor ESR	45	mΩ

, the result is C = 5.9 mF, which can be achieved by connecting 22 pieces of Chemicon EKMM451VSN271MA35S electrolytic capacitors of 450 V, 270 μF in parallel. The resulting capacitance is 5.94 mF with an RMS given by

$$I_{Crms}={\displaystyle \frac{P}{\eta }}\sqrt{{\displaystyle \frac{8\sqrt{2}}{3\pi V_{AC}{V}_{DC}}}-{\displaystyle \frac{1}{{V_{DC}}^2}}}$$

(8)

Table 3 resumes the main data of the capacitor design.

For each of the 22 capacitors, the current would be 0.89 A, which is below the rated current of 1.28 A specified by the manufacturer. This results in a design with a voltage safety factor of 1.125 and a current safety factor of 1.438.

2.5. Selection of Transistors

Modern AC–DC converters typically use two types of transistors: silicon IGBTs and silicon carbide (SiC) MOSFETs. While silicon IGBTs have traditionally been the most common, SiC MOSFETs have gained significant popularity due to their numerous performance advantages and steadily decreasing costs. SiC MOSFETs provide excellent thermal conductivity, allowing for more efficient heat dissipation and stable operating temperatures at the device level. This advantage makes them ideal for reducing overall system size, improving efficiency, and potentially lowering system costs [24]. Following these considerations for the converter design, the C3M0040120K SiC MOSFET was chosen.

The root mean square (rms) value of the current through the transistor can be calculated with

$$I_{Qrms}=\sqrt{{\displaystyle \frac{{I_{ACrms}}^2}{2}}+{\displaystyle \frac{{\Delta I_{AC}}^2}{6}}}$$

(9)

Table 4. Transistor design parameters.

Symbol	Parameter	Value	Unit
RDS(on)	Drain-source on-state resistance	40	mΩ
VDS	Drain-source voltage	1200	V
ID	DC continuous drain current	48	A
IQrms	Calculated rms current	23.2	A
COSS	Output capacitance	129	pF
QRR	Reverse recovery charge	478	nC
ISD	Inverse current test reference	40	A
VF	Diode forward voltage	4.5	V
td	Switching dead time	150	ns
VGSon	On-state gate voltage	15	V
VGSoff	Off-state gate voltage	−4	V
QG	Total gate charge	118	nC
RthJC	Thermal resist. junction-case	0.46	K/W
RthCH	Thermal resist. case-heatsink	0.2	K/W

shows the main parameters of this transistor.

2.6. Inductors Power Loss Analysis

The conduction loss in the inductors is due to the DC resistance (DCR) of the winding, resulting in a corresponding power loss, calculated as

$$P_{LR}={I_{ACrms}}^{2}DCR$$

(10)

The calculation of the core loss is too complex, but it can be approximated using the equation of Steinmetz

$$P_{LC}=K{(2f_S)}^{\alpha }\Delta B^{\beta }{V}_e$$

(11)

where the parameters K, α, and β of the magnetic material, along with the total effective magnetic material volume V_e, are provided by the magnetic core manufacturer. By applying Faraday’s law and considering its impact on inductor current, ΔB can be expressed in terms of inductance. Assuming a minor variation in L as the inductor current changes, the following equation can be used

$$\Delta B={\displaystyle \frac{L\Delta I_{AC}}{NNC A_e}}$$

(12)

2.7. Capacitor Power Loss Analysis

In a capacitor, power losses occur due to series resistance, current leakage, and dielectric loss. In our case, with the use of electrolytic capacitors, the power loss calculation can be simplified by considering only the losses due to equivalent series resistance (ESR), resulting in:

$$P_{CR}={I_{Crms}}^{2}ESR$$

(13)

where I_Crms is the rms value of the capacitor currents given by Equation (8).

2.8. Transistors Power Loss Analysis

A power loss analysis of the SPBR has been conducted, accounting for all contributions from conduction and switching losses of the transistors, including losses due to inductances and capacitors. Only minimal losses from connections, sensors, and control circuits have been excluded.

The full bridge consists of four switches, each using a single transistor. To calculate the conduction power loss of the transistors, Equation (10) must be applied.

$$P_{QC}={I_{Qrms}}^2{R}_{DSon}$$

(14)

The switching power loss of the transistor must be in consideration both turn-on and turn-off switching losses using the next equation

$$P_{QS}=\left(E_{OFF}+E_{ON}\right)f$$

(15)

where E_ON and E_OFF are, respectively, the accumulated turn-on and turn-off energies in a mains cycle. E_OFF is calculated using the graphs provided by the manufacturer using the following polynomial function [27].

$$E_{OFF}={\displaystyle \sum _{i=0}^{f_S/2f}a{\left(I_S(i)+\Delta I_{AC}\right)}^2+b\left(I_S(i)+\Delta I_{AC}\right)+c}$$

(16)

where a, b, and c take the values of

Table 5. Transistor parameters for switching losses calculation.

Symbol	Parameter	Value	Unit
a	EOFF first coefficient	50	nJ/A2
b	EOFF second coefficient	−1.0	µJ/A
c	EOFF constant term	35	µJ
d	EON first coefficient	25	nJ/A2
e	EON second coefficient	3.05	µJ/A
g	EON constant term	72.5	µJ

and I_S(i) is the transistor current in the different turn-off transitions

$$I_S(i)=\sqrt{2}{I}_{AC}\sin \left(2\pi {\displaystyle \frac{f}{f_S}}i\right)$$

(17)

Analogously, the accumulated switching energy in turn-on can be calculate with

$$E_{ON}={\displaystyle \sum _{i=0}^{f_S/2f}d{\left(I_S(i)-\Delta I_{AC}\right)}^2+e\left(I_S(i)-\Delta I_{AC}\right)+g}$$

(18)

where the new coefficients d, e, and g are also found in Table 5.

The loss generated because of the charge and discharge of the output capacitances C_OSS of the MOSFETs is calculated with

$$P_{COSS}={\displaystyle \frac{C_{OSS}{V_{DC}}^2{f}_S}{2}}$$

(19)

If a MOSFET is turned-on when the body diode of the opposite MOSFET in the same inverter arm is conducting, a reverse recovery loss is generated. This loss is determined by the following equation

$$P_{RR}=Q_{RR}{V}_{DC}{f}_S{\displaystyle \frac{I_{ACrms}\sqrt{2}}{\pi }}{\displaystyle \frac{1}{I_{SD}}}$$

(20)

where Q_RR is the diode reverse recovery charge measured at the inverse current test reference I_SD.

The dead time corresponds to the portion of the cycle where no transistor is switched on to prevent a potential short circuit caused by the simultaneous conduction of the transistors in the same leg of the bridge. During this time, the diodes conduct the current, and therefore, the losses are determined by the forward voltage V_F of the diodes. In the dead time the loss P_DT is calculated using

$$P_{DT}=2\hspace{0.17em}{V}_F{\displaystyle \frac{I_{ACrms}\sqrt{2}}{\pi }}{t}_d{f}_S$$

(21)

where t_d is the switching dead time that is imposed by the control circuit.

The power loss caused by charging and discharging of the gate of the MOSFET from minimum gate voltage V_GSoff to maximum gate voltage V_GSon and back with a gate total charge Q_G is

$$P_G=2\hspace{0.17em}\left(V_{GSon}-V_{GSoff}\right)\hspace{0.33em}{Q}_G{f}_S$$

(22)

Finally, the total power loss of each converter transistor is given by

$$P_Q=P_{QC}+P_{QS}+P_{COSS}+P_{RR}+P_{DT}+P_G$$

(23)

2.9. Total Power Loss and Efficiency Calculations

The total power loss of the converter operating in any mode is given by

$$P_{TOT}=4P_Q+P_{CR}+2\left(P_{LR}+P_{LC}\right)$$

(24)

Consequently, the efficiency is

$$\eta =1-{\displaystyle \frac{P_{TOT}}{P}}$$

(25)

2.10. Thermal Design

With the power losses determined, the thermal design of the transistors can proceed. The maximum transistor junction temperature can be calculated with the following equation:

$$T_J=T_A+P_Q(R_{thJC}+R_{thCH})+4P_Q R_{thHA}$$

(26)

Setting the maximum T_J at 136 °C and the ambient temperature T_A at 40 °C as design limits, a maximum R_thHA value of 0.75 K/W is obtained, allowing for the selection of a heatsink similar to the model SK 121.

Table 6. Parameters for thermal design.

Symbol	Parameter	Value	Unit
TA	Ambient temperature	40	°C
TJmax	SiC MOSFET junction temp.	136	°C
RthHA	Thermal resist. heatsink-ambient	0.75	K/W
HS	Heatsink SK 121	125	mm

summarizes the parameters and results obtained in the thermal design.

2.11. Control Design

The simplified control scheme of the proposed SPBR is shown in Figure 4. It employs a unipolar modulation (UPWM) technique. This method utilizes two sinusoidal modulating waves, Vsin and its inverted, which have identical magnitude and frequency but are 180 degrees out of phase. These modulating waves are compared within the “SPWM Modulator” block with a common triangular carrier wave operating at the switching frequency, fs, to generate two gating signals, VG1 and VG4 for the upper switches Q1 and Q4, along with complementary signals VG2 and VG3 for the lower switches Q2 and Q3, respectively. A key feature of this scheme is that the upper two switches do not switch simultaneously, distinguishing it from bipolar pulse width modulation (BPWM), where all four switches operate in unison. The inverter output voltage, Vab (illustrated in Figure 3), alternates between zero and +Vdc during the positive half-cycle, and between zero and −Vdc during the negative half-cycle of the fundamental frequency. This behavior characterizes the unipolar modulation technique.

The sinusoidal reference Vsin is generated by the “Phase Regulator” block, which adjusts the phase of a voltage reference derived from the grid voltage to ensure zero phase difference between the current and voltage on the AC side of the converter. This phase alignment is measured by the “Phase Detector” block. The amplitude of the reference signal is controlled by the “Amplitude Regulator” block, which selects the output of the DC voltage regulator in rectifier mode or the output of the DC current regulator in inverter mode. The unipolar switched inverter provides reduced switching losses and generates lower electromagnetic interference (EMI). This makes it more efficient than the bipolar switching scheme, as it effectively doubles the output harmonics’ switching frequency, thereby reducing the amplitude of high-frequency current ripple.

When the SPBR operates as a boost converter in rectifier mode, the control system cannot limit the capacitor charging current until the voltage reaches the grid voltage peak. To address this, a “Soft Start” auxiliary current control circuit is required.

As the circuit must function bidirectionally, the converter control must seamlessly transition between rectifier and inverter modes with minimal adjustments, ideally in an automatic manner. The R/I signal facilitates this by automatically configuring the control: in rectifier mode (R/I = H), it sets the polarity of the reference signal in the “Phase Detector” and “Phase Regulator” blocks accordingly and selects the voltage feedback for the “Amplitude Regulation” block. In inverter mode (R/I = L), the polarity is reversed, and current feedback is used instead. To simplify the control design, dead time generation has been intentionally excluded from this scheme.

3. Results Analysis and Discussion

3.1. Calculated Results

Table 7. Transistor design results.

Symbol	Parameter	Value	Unit
PQC	Transistor conduction loss	21.6	W
PQS	Transistor switching loss	2.4	W
PRR	Diode reverse recovery loss	1.4	W
PDT	Diode dead time loss	0.4	W
PCOSS	Output capacitance loss	0.2	W
PG	Gate charge loss	0.1	W
PQ	SiC MOSFET total losses	26.1	W
TJ	SiC MOSFET junction temp.	136	°C
PRC	Total capacitor loss	17.5	W
PLR	Inductor L/2 conduction loss	1.8	W
PLC	Inductor L/2 core loss	0.6	W
PTOT	SPBR total losses	132	W
η	SPBR efficiency	98.2	%

presents the calculated results from the power loss analysis of the converter at full power.

In Figure 5 all of the converter power losses have been represented as a function of the input power. It can be seen that the most important loss corresponds to the power conduction losses of the transistors. It is also observed that the powers related to the switching frequency are balanced. All of this justifies the importance of the choice of the transistor and the working frequency.

Figure 6 presents the converter efficiency obtained from previous calculations. From Figure 5 and Figure 6, it can be observed that when the output power is low, the power losses, while small in absolute terms, are significant relative to the output power. This explains the converter’s low efficiency at low output power. As the output power increases, this effect diminishes until it reaches approximately 2 kW, where efficiency is maximized, exceeding 99%. Beyond this point, the power losses increase more rapidly than the output power, causing the efficiency to decrease, reaching 98.3% at maximum output power.

3.2. Experimental Results

This subsection presents the experimental results from testing a 7.4 kW SPBR converter operating under the specifications outlined in Table 1. The component values used in the circuit were those derived in previous sections. For experimental validation, a test setup was built, consisting of the elements included in

Table 8. Elements of the experimental setup.

Label	Element
A	Full bridge with four C3M0040120K SiC MOSFETs with FPGA control and heatsink
B	AC side inductor composed of two pieces of 82 μH
C	A DC capacitor made by 22 pieces of 270 μF in parallel
D	Regenerative bidirectional programmable DC power supply
E	Mains (230 V, 50 Hz)
F	Digital storage oscilloscope (DSO) and probes
G	Power analyser

.

The DC side is connected to the IT6012C-800-50 bidirectional laboratory power supply that acts like electronic load in rectifier mode or like voltage supply in inverter mode. The AC side is connected to the mains. Figure 7 shows a picture of the test bed used to obtain the following experimental results. The alphabetical labels refer to the elements in Table 8.

Figure 8 illustrates the experimental efficiency measurements for both inverter mode and rectifier mode, regulating power up to 7.4 kW. The results for the two operating modes were highly similar. However, discrepancies between the experimental and calculated results were observed. These differences may be attributed to the modeling approach used, unaccounted losses from other elements (such as conductors, connections, parasitic components, voltage and current sensors, etc.), and the measurement process itself. The calculated and experimental efficiency of the SPBR converter is shown as a function of AC active power in rectifier mode and DC power in inverter mode. Solid lines and marked symbols indicate experimental measurements, while dashed lines represent calculated predictions.

Finally, Figure 9 display waveforms captured by digital oscilloscope for the SPBR converter operating in rectifier and inverter mode at full power with 400 V at the DC side and 230 Vrms in AC side. Chanel C1 (dark blue) is the mains voltage VAC (100 V/div), C2 (magenta) is the mains current IAC (20 A/div), C3 (light blue) is the bridge voltage Vab (100 V/div), and C4 (brown) is the DC voltage VDC (100 V/div). The time base is 5 ms/div. The switching frequency is 20 kHz. The measured power factor is 1.0 and the THD is less than 7%.

4. Conclusions

The power stage of the single-phase bidirectional rectifier (SPBR), used for the bidirectional AC–DC converters in HEMS applications, was fully designed in this work. The working conditions of the converter have been determined by a thorough examination of its components that are designed and evaluated.

To verify the viability of the design, a complete analysis of power losses was developed, making it possible to accurately design the parts and estimate the converter’s efficiency since all power losses have been correctly calculated. All of this has determined that the SPBR converter is an effective solution. The feasibility of this design has been verified with the construction and testing of a 7.4 kW converter using SiC MOSFET transistors where an efficiency close to 98% was achieved.

Currently, there are many topologies applicable for the design of a bidirectional AC/DC converter. Although the selected topology is neither the most sophisticated nor the one offering the best performance in terms of energy efficiency or dynamic response, the presented Single-Phase Bidirectional Rectifier can be considered a simple solution with few active components. Therefore, it is robust and highly reliable, achieving an effective, low-cost converter perfectly suited for HEMS applications.