Damping of Flying Capacitor Dynamics in Multi-Level Boost DC-DC Converters

Abstract

This paper presents a novel modeling approach for flying capacitor dynamics in boost-type multi-level converters (FCML-boosts) controlled by Phase Shift Pulse Width Modulation (PSPWM). By explicitly taking into account the interaction between the inductor current and the flying capacitor voltage, the model is able to reveal an underlying resonance phenomenon and to predict its frequency at each operating point. Based on such a model, whose derivation is explained in detail, both passive and active damping solutions are proposed, designed, and experimentally verified that significantly reduce the undesirable oscillations. The analytical results and the devised control solutions are tested on a $1\mathrm{k}\mathrm{W}$, four-level, boost DC-DC converter prototype employing $200\mathrm{V}$, $48\mathrm{A}$ rated EPC2034C GaN devices.

1. Introduction

The search for high-power-density DC-DC converter topologies has always been one of the main trends in power electronics. Among different solutions, Flying Capacitor Multi-Level (FCML) converters stand out as potentially ideal candidates for extremely compact designs, especially when implemented with state-of-the-art GaN devices [1,2,3].

On the other hand, it is known from the literature that FCML converter circuits can experience voltage balancing and stability issues on the flying capacitors. The problem has been identified right from the early circuit applications and addressed in many technical papers, such as [4,5,6,7,8,9]. The root cause is often indicated in the unavoidable mismatches both of the driving signals and of the power circuit components that make the inherent process of charge equalization among the capacitors (partially) ineffective.

It is also mentioned that the problem can be particularly serious in some specific operating conditions, where it can determine the loss of efficiency, extra stress on the active devices, and control performance penalizations. Most importantly, in such cases, the self-balancing capabilities of the topology can fail to fully recover the ideal balance among flying capacitor voltages or can only do that in very long times, in the order of several seconds, leading to prolonged converter operation under unexpected switch voltage stress. Finally, it is found that, even in the presence of perfectly ideal driving signals and switch characteristics, and in the absence of significant parasitic components, the circuit can still be temporarily driven off balance in the presence of large variations in the operating conditions, like, for example, when it operates as a high-power factor rectifier [3,5,10].

In order to cope with this problem, some control level provisions have been proposed to ensure the active regulation of flying capacitor voltages. However, the solutions reported so far in the literature are often based on approximated voltage estimators [11,12] or on indirect measurement approaches [13] that somewhat limit their effectiveness and robustness, and, in addition, require significant computational efforts.

In this paper, a simple, novel modeling approach is presented that shows how the flying capacitor architecture, when controlled by Phase Shift PWM (PSPWM), is inherently exposed to a resonance phenomenon involving the inductor and the flying capacitors, which is normally not caught by conventional state space average models. Actually, prior modeling approaches often assume the existence of some type of natural decoupling between these components [12,14], which does not seem to be fully motivated by circuit level analysis.

On the contrary, even in a perfectly ideal circuit (i.e., one showing no asymmetries, uneven signal delays, or jitter phenomena whatsoever), this resonance is responsible for persistent oscillations of the flying capacitor voltages. The oscillations can be triggered any time the capacitors experience an unbalanced charge distribution as can be determined by a variety of phenomena, not necessarily limited to the ones cited above. Once started, if no control actions are taken, the oscillations are only dampened by the losses in the circuit and, therefore, tend to be more disturbing in all those applications where extremely high efficiencies are targeted.

The proposed model is developed first on a simple, four-level, FCML boost circuit configuration, like the one shown in Figure 1, because this represents the minimum complexity case (intentionally, we do not consider here the three-level case because this has been already extensively analyzed in many papers, like, e.g., [15,16,17,18]), but basic guidelines are given to generalize it for a higher number of levels. In order to analyze the simplest possible case, no feedback control is considered, and the converter dynamics is studied in open-loop conditions only. The developed model is then used to design both passive and active damping strategies, whose effectiveness is experimentally verified on a $1\mathrm{k}\mathrm{W}$, four-level DC-DC converter prototype.

2. Flying Capacitor Dynamic Modeling

In this section, we address the flying capacitor voltage dynamics under PSPWM, deriving a newly conceived state space dynamic model. The main purpose of the model is to provide some insight about the origin, the effects, and the dynamic characteristics of the oscillation phenomena that take place in FCML boost converters.

2.1. Phase-Shifted PWM

In this study, we want to explore the intrinsic circuit dynamic properties and, specifically, how the flying capacitors interact with each other and with the rest of the circuit, in particular, with the input inductor. Therefore, at this stage, we do not need to consider any specific control organization. The circuit will be treated as a simple boost-type FCML DC-DC converter, operating in open-loop conditions, i.e., considering only the modulator layer of the whole control hierarchy. While this approach somewhat narrows the scope of the discussion, as no specific control design is considered, it allows to study the intrinsic converter performance before feedback is applied and complicates the observable dynamics. Furthermore, many papers have already discussed the closed-loop control of FCML converters, e.g., [2,11,12], providing all the basic information needed to design digital voltage and current regulators as needed by specific applications.

Ever since the first published papers on FCML DC-DC converter topologies [3,5], the preferred modulation strategy has been indicated as PSPWM, the same normally employed in controlling, for example, interleaved converter topologies. Some fundamental properties of PSPWM in FCML circuits motivate this choice:

• The voltage conversion ratio of the converter, under PSPWM, is exactly the same as a standard, two-level, DC-DC converter, operating in continuous conduction mode (CCM).
• PSPWM induces a specific voltage scaling across the flying capacitors, namely, such that in the general, N-level, boost converter case,

  $$v_{C_j}=j{\displaystyle \frac{v_O}{N-1}}j\in \left\{1,2,\dots ,N-2\right\},$$

  (1)

  which, in turn, generates a ripple frequency multiplication effect on the inductor current.
• PSPWM is said to allow the self-balancing of the flying capacitor voltages, at least in ideal conditions.

For ideal conditions, we mean that the driving signals present no asymmetry or phase errors, glitches, or jitter whatsoever, and that the power circuit itself is ideal, i.e., no parasitic components and no mismatch among nominally equal components can be observed.

In the general case with N levels, the number of converter switching cells is equal to $N-1$. Each one is controlled by a phase of the modulator, exactly as in a simple half bridge configuration, i.e., with complementary, not overlapping (i.e., with suitable dead-times inserted), gate driving signals for the low-side and high-side devices. In addition, N − 2 critical duty cycles can be defined as in

$$D_{C_i}={\displaystyle \frac{i}{N-1}},i\in \left\{1,2,\dots ,N-2\right\},$$

(2)

that mark the borderline among adjacent converter operating regions (whose number is $N-1$, as are the modulator phases).

In the particular case of a four-level circuit, like the one in Figure 1, we are dealing with three cells and, accordingly, with a three-phase PSPWM organization, where the time displacement between two consecutive phase carriers is equal to $T_{sw}/3$. Three different operating regions are possible, depending on the specific duty cycle D at which the modulator operates in the steady state. These can be defined as

$$\begin{array}{c}{R}_1:\mathrm{for}0<D<D_{C_1}\hfill \\ R_2:\mathrm{for}{D}_{C_1}<D<D_{C_2}\hfill \\ R_3:\mathrm{for}{D}_{C_2}<D<1\hfill \end{array}$$

(3)

where

$$D_{C_1}={\displaystyle \frac{1}{3}},D_{C_2}={\displaystyle \frac{2}{3}}$$

(4)

are the two critical duty cycles for this topology. The modulation patterns for each operating region are shown in Figure 2.

As can be seen, each modulation pattern defines a different sequence of circuit states, with specific flying capacitor current profiles as shown on the right column of Figure 2. This determines a different dynamic behavior in each operating region as will be discussed in the following Section 2.3.

The procedure to derive the circuit configuration and dynamic model in each operating region can be automated and more easily extended to a larger number of levels considering a systematic approach, whose first step is the construction of the switching state matrices for each operating region. For the four-level topology considered here, such matrices are given by

$$S_r=\left[s_{r_{j,k}}\right],$$

(5)

where $r\in [1,2,3]$ indicates the circuit operating region and each element represents the state of $S_{j_b}$ switches (one for each row in ascending order) in each modulation period sub-interval k (ordered from left to right), indicating with one the state of a closed switch and with zero the state of an open switch. The explicit expressions are presented in Appendix A. As it is easy to verify, they can be immediately matched to the plots of Figure 2. In the general case, an N-level converter will be fully described by N − 1 switching state matrices, each one having $N-1$ rows (as the number of switching cells) and $2(N-1)$ columns (as the number of sub-intervals in the modulation period).

As is performed in [11], from the switching state matrices, the capacitor connection matrices can be built. The capacitor connection matrices have the same dimensions as the switching state matrices and can be automatically built as

$$\begin{array}{cc}\hfill & C{C}_r=\left[c{c}_{r_{j,k}}\right],\hfill \\ \hfill & c{c}_{r_{j,k}}=\left\{\begin{array}{cc}{s}_{r_{j+1,k}}-s_{r_{j,k}}\hfill & j<N-1\hfill \\ 1-s_{r_{j,k}}\hfill & j=N-1\hfill \end{array}\right..\hfill \end{array}$$

(6)

The explicit values of $C{C}_{1,2,3}$ are, once again, shown in Appendix A. Their interpretation is straightforward: during each sub-interval k of the switching period, capacitor $C_j$ is either connected in series with the inductor or connected in anti-series with the inductor, or else altogether disconnected from the current path, which makes the matrix element value $c{c}_{r_{j,k}}$ respectively equal to +1, −1, or 0.

Additional insight on the circuit operation can be achieved if one considers the sub-interval duration vectors, which, in the example case, are given by

$$T_r=T_{sw}·\left[\begin{array}{cccccc}\hfill T_{r1}& \hfill T_{r2}& \hfill T_{r1}& \hfill T_{r2}& \hfill T_{r1}& \hfill T_{r2}\end{array}\right].$$

(7)

where $r\in [1,2,3]$, $T_{sw}$ is the modulator switching period and

$$\begin{array}{ccc}{T}_{11}=D\hfill & T_{21}=D-{\displaystyle \frac{1}{3}}\hfill & T_{31}=D-{\displaystyle \frac{2}{3}}\hfill \\ T_{12}={\displaystyle \frac{1}{3}}-D\hfill & T_{22}={\displaystyle \frac{2}{3}}-D\hfill & T_{32}=1-D\hfill \end{array}.$$

(8)

Vectors (7) can be used to weight the capacitor connection matrices on the sub-interval durations, which is simply performed by multiplying each row of (6) and the corresponding duration vector. This procedure yields the time weighted capacitor connection matrices that are defined as

$$C{C}_{rT}=C{C}_r.\ast T_r,$$

(9)

where $.\ast$ indicates the element-wise multiplication. As will be explained in Section 2.3, (6) and, most importantly, (9) allow to automate the construction of the system model state matrices.

2.2. PSPWM Properties

The analysis of (9) allows to see why the fundamental properties of the PSPWM modulator mentioned in Section 2.1 hold for any FCML circuit. As can be easily verified, irrespective of the considered operating region, the sum of the elements appearing on each row corresponding to flying capacitors, e.g., rows 1 and 2 in (9), always equals zero. Consequently, assuming steady-state operation and negligible ripple over currents and voltages, it is possible to write the $\mathrm{V}·\mathrm{s}$ balance of L over a modulation period in the following generalized form

$$\begin{array}{c}\hfill v_I{T}_{sw}-v_{C1}\sum _{s=1}^6{\left[C{C}_{rT}\right]}_{1,s}-v_{C2}\sum _{s=1}^6{\left[C{C}_{rT}\right]}_{2,s}+\\ \hfill -v_O\sum _{s=1}^6{\left[C{C}_{rT}\right]}_{3,s}=v_I{T}_{sw}-v_O\left(1-D\right)T_{sw}=0,\end{array}$$

(10)

that, observing the last equality, yields the voltage conversion ratio of a boost converter. Clearly, the result is the same for any operating region $R_r$. Because the properties of matrices (9) are not changing with the number of levels, the methodology followed to derive (10) represents a proof of the first property of PSPWM in FCML converters for any number of levels N.

Furthermore, if one imposes the $\mathrm{V}·\mathrm{s}$ balance of L to be zero also over each sub-interval, as it is necessary to have the same average inductor current and obtain ripple frequency multiplication, it is possible to write a system of equations like, as an example,

$$\left\{\begin{array}{c}{v}_{C1}\left(T_{21}+2T_{22}\right)+v_{C2}\left(-2T_{21}-T_{22}\right)=-v_O{T}_{21}\hfill \\ v_{C1}\left(T_{22}+2T_{21}\right)+v_{C2}\left(-T_{21}+T_{22}\right)=+v_O{T}_{22}\hfill \end{array}\right.$$

(11)

that applies to region $R_2$. The above system can be immediately solved using (8), yielding

$$v_{C_1}={\displaystyle \frac{1}{3}}{v}_O,v_{C_2}={\displaystyle \frac{2}{3}}{v}_O,$$

(12)

thus proving the second fundamental property. Of course, if region $R_1$ or $R_3$ is considered instead of $R_2$, the result is exactly the same. Once again, the procedure to derive the system of Equation (11) can be automated, just manipulating matrices (9), thus allowing the property to be proven for any number of levels N. In agreement with (12), any time the flying capacitor voltages satisfy (1), the circuit of Figure 1 experiences a frequency multiplication effect such that the current ripple on L, in the steady state, will be at $3f_{sw}$, $f_{sw}=1/T_{sw}$ being the converter modulation frequency.

The PSPWM modulator, furthermore, naturally tends to maintain a balanced operating condition, with some degree of robustness. If one considers again (9), it is clearly visible that the inductor current flows through each flying capacitor for identical times in opposite directions. Neglecting the ripple, if the average inductor current is slowly (here, we mean that the variation must be so slow to be almost undetectable in a single modulation period; in other words, the decoupling capability of the modulator is effective only for perturbations falling inside a bandwidth whose upper limit is much lower than the converter switching frequency, and in this frequency range, power dissipation mechanisms are more effective in driving the circuit back to a balanced operating condition) changing over time, then there will be no visible effect on the flying capacitor voltages, as the variation will affect both the charging and discharging practically by the same amount, leaving the average charge stored in the flying capacitor unchanged. Similarly, because the contribution of each flying capacitor voltage to the inductor $\mathrm{V}·\mathrm{s}$ balance is always zero, a slow variation in such a voltage is not able to induce significant effects on the average inductor current. Something similar can be said in relation to the converter output voltage. Slow output voltage variations are tracked by the average flying capacitor voltages because (11) is in any case satisfied whenever $v_O$ is not changing significantly in a modulation period. Therefore, slow variations in the output voltage do not induce unbalances in the average flying capacitor voltages with respect to their expected values (12). In a sense, the flying capacitor structure is transparent to the low-frequency dynamics of both the inductor current and the output voltage.

This is the third inherent feature of the PSPWM modulator: it indeed allows to decouple the inductor from the flying capacitors so that, at least in a limited bandwidth, disturbances cannot freely propagate from one to the others and the other way around. Unfortunately, wider bandwidth disturbances, such as those induced, for example, by duty cycle, load or input voltage steps, modulator jitter or other asymmetries in the power circuit, have the capability of unbalancing the flying capacitors, perturbing the frequency multiplication effect and propagating through all system state variables, a complex phenomenon that we will analyze in the following sections.

2.3. Converter Dynamic Model Derivation

As discussed in Section 2.1, the FCML boost converter, driven by PSPWM, undergoes a sequence of $2(N-1)$ topological configurations in each modulation period, resulting from the different switch states. The variations in the converter structure make it impossible to treat it as a linear system, even in open-loop operating conditions.

A typical way to circumvent the problem and to linearize the system is to adopt the state space averaging approach, where equivalent system state matrices are obtained as the weighted time average of the ones describing the circuit in each sub-interval of the modulation period. The resulting model is then linearized considering small signal perturbations around a specific operating point. By construction, it describes the system dynamics only on time scales longer than that modulation period, but, because the phenomena that take place in a switching circuit typically have time constants much longer than that, the model is normally adequate to accurately predict the circuit’s response to small signal perturbations.

Referring to the circuit of Figure 1, we can start deriving the average model by defining a system state vector, made of four components, each one representing the deviation of the variable from its steady-state value, that is

$$x=\left[v_{c_1}{v}_{c_2}{v}_o{i}_l\right].$$

(13)

Being that the converter is operated in an open loop, voltage $v_i$ represents the only system input, as the control input, i.e., the duty cycle, is considered constant. This makes the individual subsystems corresponding to each circuit configuration intrinsically linear, and allows us to neglect, for now, the usual small signal linearization step. The sets of linear differential equations describing the dynamic relations among the above state vector components and the input in every sub-interval of the modulation period and in every operating region, can be written in the general form

$$\dot{x}=A_{rs}·x+B_{rs}·v_i$$

(14)

where the subscripts r and s indicate, respectively, the operating region and the sub-interval of the modulation period where matrices $A_{rs}$ and $B_{rs}$ are applicable. Referring to the example case with $N=4$, 18 different state matrices need to be calculated to derive a set of three average state space models, each one applicable to a specific converter operating region. In each operating region, we can then determine the average state matrix as

$$A_r={\displaystyle \frac{1}{T_{sw}}}\sum _{s=1}^{2(N-1)}{A}_{rs}{T}_{rs}$$

(15)

and the average input matrix as

$$B_r={\displaystyle \frac{1}{T_{sw}}}\sum _{s=1}^{2(N-1)}{B}_{rs}{T}_{rs}.$$

(16)

If we now recall the definition of (6) and (9), we notice that (15) is bound to yield a null sub-matrix $A_r[1:N-2]$. This is due to the fact that, in any sub-interval, a flying capacitor current is always written as in $i_{C_j}=+i_L$ or $i_{C_j}=-i_L$ or else $i_{C_j}=0$, and the inductor current $i_L$ is assumed not to change during the modulation period. This makes the conventional state space averaging approach structurally unable to catch the inner dynamics of the converter [9,11,14].

Differently from other studies, our conclusion is not that the flying capacitors are dynamically decoupled from the rest of the circuit. On the contrary, we want to overcome this limitation of the standard model by following a different approach. Indeed, in FCML converters, the system state variables interact among each other within the modulation period, and their average value actually changes along the way. Some recent papers, like [19,20], although referring to buck-type converters, tackled the same problem by means of state transition modeling, which proved to be able to predict the oscillatory behavior of the circuit. Additionally, Ref. [20] also provided an automatic matrix derivation procedure similar to, and possibly more general than, the one presented in Appendix A. However, they did not provide explicit expressions for the circuit resonant frequency and gave only limited insight on the underlying physical process. Both limitations can be overcome by the modeling technique described in the following.

2.4. Circuit Dynamics Within the Modulation Period

We can illustrate the rationale of the modeling approach we are about to follow referring to Figure 3 that describes the inner dynamics of a four-level boost converter, assumed to be operating in region $R_1$, i.e., with $0<D<{\displaystyle \frac{1}{3}}$. Let us suppose all flying capacitors to have the same value $C_f$ and that we can somehow perturb the system ideal steady-state condition by moving, at instant $t=0$, a small amount of charge from $C_2$ to $C_1$, thereby making $v_{C_1}>{\displaystyle \frac{v_O}{3}}$ and $v_{C_2}<{\displaystyle \frac{2}{3}}{v}_O$. Because duty cycle D is constant and the circuit is ideal, the only effect is a deviation of the inductor current trajectory, which, at the end of sub-interval 1, brings the peak value $I_{L_1}$ higher than is nominal.

In the following sub-interval, capacitors $C_1$ and $C_2$ are both disconnected from the circuit and, therefore, the current follows a trajectory with the same slope it would have had in the ideal case. In the third sub-interval, capacitor $C_1$ is connected to the inductor with opposite polarity with respect to the first sub-interval, which means that its effect on the current trajectory is compensated for and, if there were not an unbalance for $C_2$ as well, the original current trajectory would be restored (this is visualized by a red line in the picture). Please note that this reasoning holds as long as we can assume that the current deviation during sub-interval 1 does not change the average voltage on C₁ because only if that happens will the compensation taking place in the third sub-interval be exact. If this is not the case, the compensation will be incomplete, and a small amount of charge will be further removed from or added to capacitor $C_1$, depending on the initial perturbation sign, determining an incremental variation in its average voltage. A totally symmetrical process, indicated by a green line in the picture, involves $C_2$ during sub-intervals 3 and 5. In conclusion, at the end of the modulation period, the current is apparently back onto its original trajectory. But, even if that were the case, the initial unbalance of flying capacitor voltages would not be reduced or compensated for in any way. Therefore, the same non-ideal current trajectory will be observed in all the following modulation periods.

At this point, we can conclude that, if the flying capacitor voltages are somehow even minimally perturbed, the current ripple frequency multiplication effect is lost, and a current oscillation is activated that, in the absence of other, unaccounted for phenomena (e.g., some form of power dissipation) seems to repeat itself period after period. But then, if that were the case, we would no longer be able to neglect the effects of the tiny voltage variations over each flying capacitor that take place at each iteration of the process. Indeed, even if they were almost invisible in a single modulation period, they would accumulate over time and, eventually, determine a visible deviation from the steady-state value.

In conclusion, the careful analysis of Figure 3 suggests that, if a perturbation is applied to the ideal flying capacitor charge distribution, a relatively slow transient is started that will develop over many modulation periods and can only be extinguished by the circuit lossy components, in the absence of which it is potentially capable of going on forever. The inner mechanism sustaining the process can only be described as a resonance between the inductor and the flying capacitors because both the inductor current and the capacitor voltages are involved and affected simultaneously. For the reasons explained above, this type of process cannot be described by a standard average circuit model; a different approach needs to be devised in order to properly analyze it.

2.5. A More Accurate Dynamic Model

The purpose of the model we are now going to discuss is exactly to account for the resonance process sketched in the discussion of Figure 3 and to allow us to make some quantitative assessment of its characteristics.

We start by calculating, for each converter operating region, the time average in the modulation period of flying capacitors currents $i_{C_1}$ and $i_{C_2}$, now explicitly considering their dependency on flying capacitor voltages. To keep the illustration simple, we can just consider a reduced-order state vector, defined as $x_f=\left[v_{c_1}{v}_{c_2}\right]$.

The dynamic equations describing the small signal perturbations of the flying capacitor currents around the steady state can then be found, as usual, eliminating all the constant terms from the average current expression, using the a priori information about the converter steady-state operating point. The state equation system is finally found, that is,

$${\dot{x}}_f=A_r{x}_f=\left[\begin{array}{c}{a}_{r_{11}}{a}_{r_{12}}\hfill \\ a_{r_{21}}{a}_{r_{22}}\hfill \end{array}\right]x_f,$$

(17)

where the $a_{r_{ij}}$ elements have to be determined for each circuit operation region, as usual indicated by subscript $r\in [1,2,3]$. The procedure requires, in any case, lengthy calculations, even if the order of the circuit is just four. Therefore, after explaining it in one case, we present an automated model derivation procedure, applicable to higher-order circuits.

2.5.1. Analysis of the Circuit in Region $R_1$

The average current on flying capacitor $C_1$, $\overline{i_{C_1}}$, can be determined considering (9), specifically matrix $C{C}_{1T}\left(1,:\right)$, that indicates how $C_1$ is connected in the circuit and for how long in any modulation period. From that, it is possible to write the following relation:

$$\begin{array}{cc}\hfill & \overline{i_{C_1}}\triangleq {\displaystyle \frac{1}{T_{sw}}}{\int }_0^{T_{sw}}{i}_{C_1}\left(t\right)dt=\hfill \\ \hfill & {\displaystyle \frac{1}{T_{sw}}}\left(-{\int }_0^{T_{11}}{I}_{L_0}+{\displaystyle \frac{V_I+v_{C_1}-V_O}{L}}tdt+\right.\hfill \\ \hfill & \left.+{\int }_0^{T_{11}}{I}_{L_3}+{\displaystyle \frac{V_I+v_{C_2}-v_{C_1}-V_O}{L}}tdt\right)=v_{c_2}{\displaystyle \frac{T_{sw}}{2L}}{D}^2,\hfill \end{array}$$

(18)

where the last equality is obtained by simplifying all the constant terms related to the steady-state operating point. The above result shows that $\overline{i_{C_1}}$ is not going to be zero in the presence of perturbations on the average values of the flying capacitor voltages because, as we have explained, these impact the capacitor charging and discharging phases, generating either charge accumulation or depletion. From (18), we can conclude that the first row of matrix $A_1$ is equal to

$$A_1(1,:)=\left[0{\displaystyle \frac{T_{sw}}{2L{C}_1}}{D}^2\right].$$

(19)

Similarly, by analyzing $C{C}_{1T}\left(2,:\right)$, we can write the time average of $i_{C_2}$, which is given by the following relation:

$$\begin{array}{cc}\hfill & \overline{i_{C_2}}\triangleq {\displaystyle \frac{1}{T_{sw}}}{\int }_0^{T_{sw}}{i}_{C_2}\left(t\right)dt=\hfill \\ & {\displaystyle \frac{1}{T_{sw}}}\left(-{\int }_0^{T_{11}}{I}_{L_3}+{\displaystyle \frac{V_I+v_{C_2}-v_{C_1}-V_O}{L}}tdt+\right.\hfill \\ \hfill & \left.+{\int }_0^{T_{11}}{I}_{L_5}+{\displaystyle \frac{V_I-v_{C_2}}{L}}tdt\right)=-v_{c_1}{\displaystyle \frac{T_{sw}}{2L}}{D}^2.\hfill \end{array}$$

(20)

The above equation proves that

$$A_1(2,:)=\left[-{\displaystyle \frac{T_{sw}}{2L{C}_2}}{D}^{2}0\right],$$

(21)

which means that we can now re-write (17) as

$$\left[\begin{array}{c}{\dot{v}}_{c_1}\\ {\dot{v}}_{c_2}\end{array}\right]=\left[\begin{array}{cc}\hfill 0& {\lambda }_{1_1}\\ \hfill -{\lambda }_{1_2}& 0\end{array}\right]·\left[\begin{array}{c}{v}_{c_1}\\ v_{c_2}\end{array}\right].$$

(22)

Without any real loss of generality, we can assume $C_1=C_2=C_f$, thus making

$${\lambda }_{1_1}={\lambda }_{1_2}={\lambda }_1={\displaystyle \frac{T_{sw}}{2L{C}_f}}{f}_1\left(D\right),\mathrm{with}{f}_1\left(D\right)=D^2.$$

(23)

Based on (22) and (23), we can now see that, even in the above defined idealized conditions, the flying capacitor cells of the circuit in Figure 1 tend to behave like an ideal oscillator at frequency $f_1={\lambda }_1/2\pi$. This result allows us to conclude that any small perturbation in the flying capacitor voltages generates a form of persistent oscillation, exactly as we deduced from Figure 3. The persistence of the oscillation is infinite because the idealized converter model has zero damping, i.e., no power dissipation occurs.

In order to verify this finding, the circuit of Figure 1 is simulated in the Matlab-Simulink^© v. 23.2 environment, using the PLECS^© v. 4.8.3 toolbox and considering, wherever applicable, the circuit parameters reported in

Table 1. FCML converter circuit parameters.

Nominal output voltage	400 V
Nominal output power	1 kW
Nominal input voltage	200 V
Number of levels	4
Switching frequency	150 kHz
Input inductor	18.8 μH
Flying capacitors	4.2 μF
Snubber capacitors	10 μF
Snubber resistors	100 Ω

.

The simulation results are shown in Figure 4, considering $D=0.25$ and perturbation values of $+3.5\%$ on $v_{C_1}$ and $-3.5\%$ on $v_{C_2}$, applied at $t=12\mathrm{m}\mathrm{s}$, when the circuit is operating in the steady state. For better readability, the switching ripple is removed from the traces using a moving average filter.

If we use (23) to calculate the frequency of the oscillation when $D=0.25$ as in Figure 4, we find $420\mathrm{Hz}$, a value that is very close to the one resulting from the simulation plot of Figure 4, that is $418\mathrm{Hz}$. It is also interesting to notice how the oscillating voltage waveforms correspond to sine and cosine terms as implied by the presence of purely imaginary, complex conjugate eigenvalues. Finally, it is important to point out that the average modeling approach is well posed and reliable, as the oscillation period of the dynamic phenomena under investigation is much longer than the averaging period. Now, we need to verify if the same conclusions can be drawn for region $R_2$ and $R_3$.  

2.5.2. Analysis of the Circuit in Region $R_2$ and $R_3$

The procedure to derive the dynamic model of the flying capacitor cells in region $R_2$ and $R_3$ is basically the same as that followed for $R_1$. The only difference is that now we need to use matrices $C{C}_{2T}$ and $C{C}_{3T}$, respectively, to identify the integration intervals and the polarity of the capacitor insertions. The system of differential Equation (22) turns out to be identical to the previous one, except for the eigenvalue expression, which, for region $R_2$ is found to be

$${\lambda }_2=f_2\left(D\right){\displaystyle \frac{T_{sw}}{2L{C}_f}},\mathrm{with}{f}_2\left(D\right)=-{\displaystyle \frac{1}{3}}+2D-2D^2,$$

(24)

while for region $R_3$ it is equal to

$${\lambda }_3=f_3\left(D\right){\displaystyle \frac{T_{sw}}{2L{C}_f}},\mathrm{with}{f}_3\left(D\right)={\left(1-D\right)}^2,$$

(25)

again under the simplifying assumption of having identical flying capacitors values. It is interesting to observe that the three $f_r\left(D\right)$ functions, with $r\in [1,2,3]$, once composed in the interval $D\in [0,1]$, correspond to a function that is not only continuous but continuously differentiable as well.

In conclusion, the system exhibits essentially the same dynamic behavior of region $R_1$ in $R_2$ and $R_3$ as well, only with different resonance frequencies. Figure 5 displays the results of test simulations with $D=0.61$ and perturbation values of $+5\%$ on $v_{C_1}$ and $-5\%$ on $v_{C_2}$, applied at $t=5\mathrm{m}\mathrm{s}$. The oscillation frequency predicted as ${\lambda }_2/2\pi$ is equal to $957\mathrm{Hz}$, while the one found simulating the circuit is $951\mathrm{Hz}$. Finally, Figure 6 displays the results of the test simulations with $D=0.8$ and perturbation values of $-2.5\%$ on $v_{C_1}$ and $+2.5\%$ on $v_{C_2}$, applied at $t=18\mathrm{m}\mathrm{s}$. The oscillation frequency predicted as ${\lambda }_3/2\pi$ is equal to $269\mathrm{Hz}$, while the one found simulating the circuit is $267\mathrm{Hz}$. The oscillation frequencies observed in the simulation only depend on the parameters appearing in (23)–(25); they are practically invariant for a different input voltage, average inductor current or perturbation sign, and amplitude.

2.6. Generalization of the Flying Capacitor Cell Dynamic Model

The above modeling approach can be likewise applied to higher-order converters. The main limitation is that the required pencil and paper calculations become more and more involved; in order to prevent errors, a Matlab^© script is implemented to automate the derivation of the system state matrix $A_r$ in all converter operating regions and, in principle, for any value of N. The key step is the automatic construction of the inductor current integrals in each sub-interval. Indeed, as can be seen in (18) and (20), the average flying capacitor current is obtained exactly by summing the inductor current integrals over each sub-interval, which, assuming the current to be piecewise linear, correspond to a trapezoidal integration process. The integration routine can therefore be built from (9) as a sequence of repeated summations followed by multiplication between the resulting integration matrix and the time weighted capacitor connection matrix (9). The adopted algorithm is reported in Appendix A for better clarity. It is tested on values of N ranging from 4 to 9, yielding consistent results.

Thanks to this procedure, it is then possible to derive the expressions of the system eigenvalues in each operating region and to calculate, among other things, the magnitude plot shown in Figure 7 also for higher values of N. The figure is obtained comparing the analytically calculated eigenvalue magnitude with the oscillation frequency automatically extracted from simulation plots like those in Figure 4, Figure 5 and Figure 6. This step is facilitated by the insertion of losses in the circuit, especially at duty cycles around 0.5, where strong beating occurs, complicating the automatic extraction of the oscillation frequency.

From the automated modeling, it is also possible to determine the magnitude of the characteristic impedance associated with the resonant poles in the circuit. This can be directly extrapolated from (23)–(25), and it is found to be given by

$$|Z_{ch{r}_r}|={\displaystyle \frac{2L{f}_{sw}}{f_r\left(D\right)}},$$

(26)

where $f_r\left(D\right)$ with $r\in [1,2,3]$ is the specific dependency from the duty cycle D of expressions (23)–(25). The plot of $|Z_{chr}|$ over the whole duty-cycle range is shown in Figure 8.

As can be seen, a minimum value of about $34\Omega$ is found for $D=0.5$. The plot confirms the observed tendency of the circuit to oscillate more widely and with longer transients when the duty cycle is around $0.5$. It also allows to estimate the value of a possible damping resistor.

Considering the values of (26), we see that placing in parallel to each flying capacitor an AC coupled damping resistor of about $100\Omega$ should be sufficient to visibly shorten the transient duration over the entire operating range. Given the observed typical amplitude of the oscillations, a small amount of additional losses is going to be generated, estimated at around $1\mathrm{W}$ per cell (only during transients, of course).

3. Experimental Validation

The dynamic model illustrated in Section 2, differently from prior art, predicts the existence of natural oscillation modes resulting from the interaction between the inductor and the flying capacitor cells in any FCML boost converter. These modes have been characterized analytically and at the simulation level, but the experimental validation of the analysis is now due. A prototype of the circuit in Figure 1 is therefore set up and can be seen in Figure 9. The main circuit parameters are listed in Table 1. The switching cells use $200\mathrm{V}$, $48\mathrm{A}$ rated EPC 2034C GaN devices. Overall, the cells occupy a $50\mathrm{m}\mathrm{m}\times 28\mathrm{m}\mathrm{m}$ area. The power circuit is coupled to a digital control board that uses the STM32F334R8 microcontroller for modulation and higher-level control functions.

3.1. Flying Capacitor Voltage Sensing

A distinctive feature of the developed hardware is the presence of flying capacitor voltage sensors. Different from what can be read in many papers, sensing the flying capacitor voltages can have minimal impact on the circuit power density and reliability. The proposed solution is shown in Figure 10. As can be seen, the circuit uses a simple pnp-BJT to derive a power ground referred signal that is then amplified and transferred to the signal ground referred domain by a standard isolation amplifier. Because the bias current of the transistor can be set very low (e.g., $0.1\mathrm{m}\mathrm{A}$) adjusting resistors $R_{B_{1_i}}$ and $R_{B_{2_i}}$ on each cell, the power dissipation of the sensor is well below $0.1\mathrm{W}$, which can be deemed negligible in many applications. Furthermore, adjusting the values of the collector resistors $R_{C_i}$ on each cell, it is possible to scale the measured voltage so that, when the flying capacitors are balanced, the voltage at the input of the ADC is practically the same for every cell, which makes the subsequent processing easier. The impact of the isolation amplifier on the circuit power consumption is estimated by supplying the primary and secondary sides from external power supplies and measuring the current. Overall, less than $1\mathrm{W}$ is needed, which also includes the sensing of the other circuit state variables, i.e., the inductor current and the output voltage. Again, unless the circuit is designed for low-power applications, this negligibly impacts the circuit power consumption.

3.2. Flying Capacitor Voltage Damping

Thanks to the availability of a sensor, it is possible to measure the flying capacitor voltages without any risk during circuit operation. This allows us to experimentally validate the results presented in Figure 7. In order to do so, we simply apply relatively small duty-cycle steps during the converter open-loop operation, which stimulates the resonance and allows to record the transient with a digital oscilloscope.

It is worth noting that the power circuit includes passive R-C snubbers, placed in parallel to each flying capacitor, and aimed at dampening the above-mentioned oscillations. The snubbers are designed based on the above circuit analysis; as can be seen in Figure 11, their effectiveness is good, as the oscillations are indeed decaying very rapidly (practically extinguishing themselves in about three cycles, even around $D=0.5$, which represents the worst case). Because this solution is inexpensive and has limited impact on the converter footprint, it represents a simple way to contain the resonance phenomenon, although with a negative impact on the efficiency.

In order to quantify this, the circuit efficiency is measured and found to be practically flat around $98\%$ throughout the load range as shown in Figure 12, indicating that the circuit is not excessively lossy, even if snubbers and sensors are used. Indeed, thermal analysis shows the losses to be mostly concentrated on the switches, while snubbers maintain a relatively low temperature. On the other hand, the damping action makes the circuit much safer to operate, as it prevents significant deviations of the flying capacitor voltages with respect to their expected values, especially in the case of input voltage variations. This helps to limit the switches’ voltage stress, which could potentially lead to circuit failure.

As a downside, the presence of damping makes measuring the natural oscillation frequency of the resonant circuit more complicated. A first-order estimation is, anyway, still possible, as the circuit Q factor can be approximately found from the amplitude speed of decay. In our case, some post-processing of the acquired data yields a Q factor between 2 and 3, determining an underestimation of the resonant pole frequency in the order of 8–10% with respect to the first oscillation period. Applying this correction to the gathered experimental plots, the resonance frequencies at different operating points are found. They are also plotted in Figure 11, where the experimentally determined resonant mode map (represented as green boxes, to account for measurement uncertainties) is compared to the analytical one.

The oscillation tests are performed at different operating points, including different input voltages. As expected from the analytical study, the average voltage level is irrelevant in defining the oscillation frequencies, which are practically the same for a given duty cycle, regardless of the specific input voltage level or the load condition (the load condition has a strong impact on the damping of the inductor resonance with the output capacitor but not on the oscillation frequency of the flying capacitors.). As can be seen, the measurements made at relatively low input voltages confirm the trend and, considering the uncertainty of the experimental procedure, also show a reasonable quantitative match with the analytical results.

3.3. Active Damping of the Flying Capacitor Cells

The hardware organization of the prototype is such that it becomes possible to implement the active damping of the flying capacitor dynamics, complementing the passive one and, possibly, further improving the circuit dynamic performance. In addition, the adoption of combined active and passive damping can also allow to relax the R-C snubber design, with a positive impact on efficiency.

Figure 13 shows a possible active damping controller organization, which is particularly simple and, as such, computationally light. As proposed in [12], this compensation can be thought of as a parallel regulation loop that complements the modulator and, if properly designed, can be transparent to any other control loop. For this to happen, some decoupling is needed between the damping loop and, mostly, the current control loop. In practice, we expect that a reasonable spectral decoupling can be achieved by making the current loop significantly faster than the damping loop.

As can be deduced from the discussion in Section 2.1, the average voltage over the flying capacitor $C_i$ can be adjusted by introducing some difference in the conduction times of the two adjacent switches $S_{i_b}$ and $S_{{(i+1)}_b}$. Therefore, the controller organization is such that, when the flying capacitor voltages are balanced, the correction is zero and each cell operates with the same duty cycle. Instead, when some unbalance or oscillation is detected, the controller makes the cell duty cycles slightly different, as needed to reduce the error. In principle, different regulator structures can be considered, the simplest being the purely proportional one, which is certainly effective also against the static unbalance.

Another solution is to implement a derivative action (actually, in the practical implementation, a digital low pass filter is also used so as to suppress the derivative action above 1/10 of the converter modulation frequency), which turns out to be particularly effective in dampening the oscillations. An intuitive explanation is that such a regulator tends to change the average flying capacitor voltage (correcting the duty cycle) in a way that is proportional to the current through it, an action that tends to emulate a virtual series resistor.

Controller calibration requires a trial-and-error procedure, as both the resonance frequency and the characteristic impedance of the resonant circuit vary significantly with the duty cycle, calling for a trade-off solution. This controller is therefore easier to apply if the operating point of the converter, namely, its input and output voltages, is not changing too much. Instead, for a successful application in cases where the converter’s operating point is significantly changing over time, the on-line adaptation of the derivative gain can be considered, which can be simply implemented by means of a look-up table, possibly using the converter duty cycle as the entry. A couple of examples of the achievable performance are shown in Figure 14 and Figure 15.

As can be seen, the derivative control action is indeed able to suppress the oscillations induced by the duty-cycle step. In agreement with the above discussion, the discrete-time derivative gain coefficient is designed so that, considering all the scaling factors of the experimental set-up and a sampling frequency equal to $f_{sw}$, it corresponds to a virtual series resistance around $100\Omega$ in the nominal operating conditions ($V_I=200\mathrm{V}$, $V_O=400\mathrm{V}$) as per

$$k_{d_j}={\displaystyle \frac{C_f(1-D)R_{dmp}{f}_{sw}}{V_{C_j}}},j\in [1,2],$$

(27)

where $R_{dmp}$ represents the above-specified virtual damping resistor and $V_{C_{1,2}}$ are the steady-state values of the flying capacitor voltages when the converter operates at duty cycle D.

The natural decoupling of the active damping action, as expected, is not always satisfactory: small oscillations of the output current become visible in Figure 14b and Figure 15b when the function is activated. This downside could be minimized by closing a current control loop, which is not considered in this paper, for the reasons explained above. Despite that, the combination of active and passive damping seems to be quite effective in mitigating the flying capacitor oscillatory response.

4. Conclusions

This paper discusses the flying capacitor dynamic behavior in boost type FCML DC-DC converters. The main contributions made are the following:

• A newly conceived dynamic model that is capable of predicting the interaction between the input inductor and the flying capacitors, allowing to determine the natural oscillation frequencies of the flying capacitor cell subsystem;
• A passive damping solution that strongly improves the flying capacitor dynamics with minimal impact on the circuit power consumption;
• A simple sensing technique for flying capacitor voltages that allows to implement, if needed, active damping control strategies, unbalance detection, and/or converter protection mechanisms;
• An example of derivative-type active compensation that effectively suppresses the flying capacitor oscillations.

The dynamic model is validated both at the simulation level and experimentally. The active and passive damping strategies are also experimentally validated and proved effective in mitigating the oscillatory response of the circuit.