FM-STDNet: High-Speed Detector for Fast-Moving Small Targets Based on Deep First-Order Network Architecture

Round 1

Reviewer 1 Report

This paper presented a novel method for PCB tiny target detection. Overall, the idea is interesting and has potential. However, there are still some problems that need to be carefully addressed before a possible publication. More specifically,

1. Please make the font in the formula the same size as the font in the text.

2. Some related work for tiny object detection should be discussed and cited in the introduction: YOLOv5-tassel: detecting tassels in rgb uav imagery with improved yolov5 based on transfer learning; automated driving systems data acquisition and processing platform.

3. The contribution of this paper should be highlighted in the introduction.

4. Figure 8 should be optimized.

Author Response

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Reviewer 2 Report

This paper has completed structure. The introduction is clear and completed. And the methodology is also stated clearly. There are some comments:

1. In abstract, it might be better add the full name of SPP and SPPFCSP. Same as YOLO, Faster R-CNN, and TDD-net, although these are very common shown in DL relative paper, there may be readers from other fields who do not know these abbr.

2. In table 2, header of column 2, I think authors might mean mAP, but it is "Map" in the table, which may need be corrected.

3. There is P-R plots in figure 6, but there is no explanation or any sentence in section 2.2 to talk about the relative metrics. 

4. For figure 6, it may be better to put all cures of different classes in one plot to show difference in performance, because they all have very high and similar AP.

5. If the P-R curves are calculated, then ROC maybe also displayed for class accuracy. 

6. Figure 7 shows the detection results, if it is possible also shown groud truth of this example PCB?

Author Response

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Reviewer 3 Report

It seems that the authors were trying to solve two problems: to develop a new FMSTDNet as a high-speed detector for fast-moving small targets and to detect the surface defects in a fast-moving printed circuit board. As a result, both topics require significant clarification. Perhaps a good solution would be two different papers instead of one.

What can be said about the current version.

The main proposition is to extend the spatial pyramid pooling module as a combination of the SPP module [19] and the Cross Stage Partial Network (CSPNet) [20] with different sizes of Maxpool layers in series (Fig. 1). Also, high-speed detection head called RepHead is proposed.

Formulae 1-11 are useless and even wrong if the authors consider the padding (Eq. 5-6). The pooling layer usually does not use any padding. Thus, Wout=n is evident.

I have the following question. The input frame has a resolution of 32x32 (L. 195) and the authors use filters with a resolution 5x5, 9x9, and 13x13 (L. 116). Then they write about 600x600 sub-images (L. 292). Finally, the authors write about “the high-pixel image (3056x2464)” (L. 335). What is the real resolution of input frames and tiny targets in a fast-moving printed circuit board (PCB)?

The MS COCO2017 dataset does not contain tiny targets in printed circuit board. It seems that the authors pre-trained their network and used it to detect surface defects in PCB, but don't say anything about the training process.

We see an incorrect comparison with the one-stage detector YOLOv3 (why not YOLOv8?), the two-stage region-based detector Faster R-CNN and TDD-Net (a tiny defect detection network for PCBs). In Figs. 5-7, we see the classification of defects. However, this topic is outside the scope of the paper. Why?

It will be more readable to use FM-STDNet rather than FMSTDNet.

Typos.

Many spaces in the text are omitted.

There are many grammatical errors.

L. 130. for he pooling layer -> for the pooling layer

L. 133. The padding of the pooling laye -> The padding of the pooling layer

Write RepHead in the text, not Rep Head

The layers in Figs. 2-3 should be clarified.

Specify the caption for Fig. 6.

Author Response

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Reviewer 4 Report

The paper has some interesting aspect of usage of AI technologies for real life industry applications, like PCB production. While you work is dedicated to smaller boards, it can be scaled up for larger boards.

We will split the review into two sections – issues (the problems to be fixed) and suggestions as well.

1.Please add necessary tags related to PCB production and faults detection in it, if necessary.

2.There is a lack of a whitespace character before each literature reference in the text.

3.You use an appendix to display your image and table data. It would be good idea to reference them like such: “proposed. The structure of the model is shown in 112 Figure 1, appendix B” or including them within a text. It is a good practice to include images and tables within a text. Though, you must keep in mind, that the images and table should appear after the first reference and preferably on the same page as reference.

4.There are some critical issues related to formulae 11 and13. To prove this, we supply the results of online

tool Simplify Calculator and it seem your formula 11 don’t unravel to “n” as it is stated in the article. Here is

the report of the tool: simplify ((W-(W/n)+2*((((W/n)*n-W+1))/2))/(W/n)+1) (symbolab.com) – it simplifies

to n + n/W in only. Hence, the formula 13 is incorrect too.

5.The theorem, reminded in the lines 153-154, but has no references. We strongly suggest avoiding such

statements, even if they explain the mechanism of the convolution and pooling. Sure, the pooled item is a

linear combination of outputs of neurons, though, for a network that depends on gradient descent, such

statement seem inappropriate, since the neural network has a margin of error (generalization error).

6.The title of chapter 4 should be moved on the following page.

7.If you use the appendix or inline format of the images and tables, keep in mind that the titles should be

kept close to the table and image and the table splitting should be avoided, unless it is a multi page table.

Now to suggestions.

1.We think it would be a good idea to somehow implement an image recognition algorithm to track the

serial number of the PCB or the work team in order to track back in time failure and their rate.

2.We also think it is worth to consider studying images of PCBs being poorly washed of the flux.

3.Lastly, it is interesting the way of using a renders of Gerber files in order to establish issues with PCB if

compared to the dataset images, so to make use of transfer learning as well.

4. In table 3 you show performance of different methods. While the results are high, we highly encourage you to double check any numbers, since such results are quite hard to achieve within a 99% range.

Based on our opinion you have done experiment, but the text has serious issues, as in items 4 and 5. We strongly suggest either removing this formulae part or redoing it. Since you display your own implemented method FMSTDNet, we also highly encourage you to be as precise as possible in defining its structure

Author Response

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Round 2

Reviewer 2 Report

Thanks for your answers. Most of them look fine now.

Only a few concerns here:

1. Author mentioned add P-R definition in figure 8 paragraph, but I did not find yet or I just missed it. Please make sure you added it.

2. Extension of point 6, may be just add a few words let reader know the grand truth can be seen figure 6, which may easier for understanding.

Author Response

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Reviewer 3 Report

The authors improved their article according to the comments of the reviewer. The article looks better. However, I recommend re-reading the article in order to remove punctuation and grammatical errors.

Author Response

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Reviewer 4 Report

Thank you for corrected your formulas and other my remarks. But I have remarks to references 5, 7, 9, 11, 12, 17, 19, 22, 23, 25 where absent a year of publication.

Author Response

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