Modified RPWM Strategy Based on Level-Shifted Random Carrier and Power Balance to Reduce the PWM Voltage Noise in Three-Phase CHB Inverters

Abstract

Aimed at the pulse width modulation (PWM) voltage noise and power imbalance in three-phase cascaded H-Bridge (CHB) inverters, a modified random PWM (RPWM) strategy, named the power-balanced RPWM (PB-RPWM) strategy, is proposed in this paper. The PB-RPWM strategy mainly includes three steps: (1) random pulse signals are generated by compared modulation wave with level-shifted random carriers; (2) the random pulse signals are circularly distributed between CHB units by a logic operation method, and then the driving pulse signals of switching devices are produced; (3) the driving pulse signals are used to control the inverter. Under the PB-RPWM strategy, the spectra of the line voltage become uniform and continuous, that is, the PWM voltage noise of the line voltage can be effectively reduced. The output voltage of a single H-bridge unit can contain three basic voltages within 3/2 T_A, that is, the power balance between CHB units can be realized. When compared with conventional non-random and random PWM strategies, the PB-RPWM strategy has a lower PWM voltage noise and smaller total harmonic distortion (THD). When compared with the level-shifted PWM (LS-PWM) strategy, the PB-RPWM strategy has a balanced power performance. The effectiveness and feasibility of the PB-RPWM strategy is verified by abundant simulations and experiments.

1. Introduction

In modern AC drive systems, PWM technology has been widely used with the continuous development of power electronics [1,2]. In three-phase inverters controlled by PWM technology, the line voltage contains PWM harmonic voltages related to the carrier frequency. These PWM harmonic voltages not only cause the waveform distortion of the line voltage, but also make the motor produce a harsh acoustic noise in AC drive systems [3]. Although raising the switching frequency to more than 15 kHz can avoid the hearing range of human ears, a high switching frequency reduces the efficiency of inverters [4]. When the switching frequency is low, the spectra of the line voltage can be continuous and uniform with RPWM strategies. This effectively reduces the peak value of the PWM voltage noise, so as to suppress the acoustic noise of the motor [5,6,7].

At present, CHB inverters has been widely used in medium and high voltage AC drive systems [8,9,10]. For H-bridge inverters, the current research focuses on how to reduce the PWM voltage noise in single H-bridge inverters. For example, an improved random SHE method was proposed to eliminate the specific PWM voltage noise in [11]. Taking random and non-random PS-PWM strategies as an example, the thermal impact of random and fixed switching frequency is studied in [12], which shows that the two switching modes have a similar thermal impact. The carrier sequences of phase-shifted random carriers in the RPWM strategies were researched in [13], which points out that optimized carrier sequences of phase-shifted random carriers help to further reduce the PWM voltage noise. These studies above improve the performance of the RPWM strategies based on a phase-shifted carrier from a random algorithm, carrier sequence and switching loss. Thus, these modified PS-RPWM strategies can effectively reduce the PWM voltage noise in single H-bridge inverters.

Generally, when compared with single H-bridge inverters, not only do CHB inverters have better waveform quality, but they are also more suitable for high voltage inverters [14,15]. When compared with the PS-PWM strategy, the LS-PWM strategy has a better waveform quality of the line voltage [16,17]. However, the RPWM strategies used for CHB inverters are very scarce at the moment, which will restrict the development of reducing the PWM voltage noise in H-bridge inverters. Therefore, in this paper the PB-RPWM strategy is proposed to further improve the waveform quality and reduce the PWM voltage noise in three-phase CHB inverters.

When compared with the studies above, this research does not optimize the RPWM strategies for single H-bridge inverters from a random algorithm and carrier sequence, but it optimizes the RPWM strategy for CHB inverters using a modulation strategy itself. Thus, the significant contribution of this study can be summarized with two points: (1) a RPWM strategy based on level-shifted random carrier is proposed for CHB inverters, which has a better performance of PWM voltage noise reduction; (2) a power balance method based on logic operation is proposed, which solves the power imbalance between cascaded H-bridge units.

In Section 2, the principle and implementation of the PB-RPWM strategy is introduced in detail. In Section 3, the characteristics and performances of the PB-RPWM strategy are analyzed through simulation and contrast. In Section 4, the effectiveness and feasibility of the PB-RPWM strategy is verified through an experimental platform of the three-phase CHB inverter.

2. Introduction of the PB-RPWM Strategy

The topology of the three-phase CHB inverter is shown in Figure 1. From this figure, the single-phase inverter in this topology is composed of cascaded 3 H-bridge units. The principle and implementation of the PB-RPWM strategy is introduced by taking the A-phase CHB inverter as an example in this paper. Of course, the PB-RPWM strategy for the B-phase or C-phase CHB inverter can be obtained by replacing v_A with v_B or v_C.

2.1. PWM Voltage Noise Reduction

In general, the LS-PWM strategy has smaller THD of the line voltage than the PS-PWM strategy. Accordingly, the LS-RPWM strategy based on a level-shifted random carrier is proposed as shown in Figure 2, which is expected to further reduce the THD and PWM voltage noise of the line voltage. In Figure 2, the random carriers of the cascaded H-bridge units A1, A2 and A3 are v_Ac1±, v_Ac2± and v_Ac3±, respectively. v_Ac1±, v_Ac2± and v_Ac3± are random carriers with the same frequency. The output voltage of the cascaded H-bridge units A1, A2 and A3 is u_A1, u_A2 and u_A3, respectively. v_A is the modulation wave of the A-phase CHB inverter, and u_AN is the output voltage of the A-phase CHB inverter. The random pulse signals X_A11 and X_A13, X_A21 and X_A23, and X_A31 and X_A33 can be obtained by comparing v_A with v_Ac1±, v_Ac2±, and v_Ac3±, respectively.

The random frequency f_c of v_Aci± (i = 1, 2, 3) can be expressed as:

$$f_{\mathrm{c}}=f_{\mathrm{c}0}+R_n\Delta f$$

(1)

In (1), f_c0 is the center frequency, and Δf is the bandwidth of random frequency, both of which are constants. The period of a random carrier is T_c = 1/f_c. R_n is a random number in [−1, 1], which can be generated by uniform distribution random algorithms such as Logistic, Chebyshev, and Xorshift. v_A can be expressed as:

$$v_{\mathrm{A}}(t)=3M_{\mathrm{a}}E\sin ({\omega }_{\mathrm{A}}t)$$

(2)

Then, the average output voltage $\overline{u}$_Ai of u_Ai (i = 1, 2, 3) within T_c is

$${\overline{u}}_{\mathrm{A}i}=\left\{\begin{array}{cc}{d}_{i}E& v_{\mathrm{A}}\ge 0\\ -d_{i}E& v_{\mathrm{A}}<0\end{array}\right.$$

(3)

In (4), d_i (i = 1, 2, 3) is the ratio between the output time of the H-bridge unit Ai and T_c, and its value range is in [0, 1]. In the positive period of u_AN, when f_c >> f_A (f_A = ω_A/2π), d_i can be expressed as:

$$d_i=\left\{\begin{array}{cc}\hfill 0\hfill & \hfill 0\le v_{\mathrm{A}}<(3-i)E\hfill \\ \hfill \frac{v_{\mathrm{A}}}{E}-(3-i)\hfill & \hfill (3-i)E\le v_{\mathrm{A}}<(4-i)E\hfill \\ \hfill 1\hfill & \hfill (4-i)E\le v_{\mathrm{A}}\le 3E\hfill \end{array}\right.$$

(4)

According to (3) and (4), the average output voltage $\overline{u}$_AN within T_c can be expressed as:

$${\overline{u}}_{\mathrm{AN}}={\displaystyle \sum _{i=1}^3{\overline{u}}_{\mathrm{A}i}}=E{\displaystyle \sum _{i=1}^3{d}_i=v_{\mathrm{A}}}$$

(5)

According to (5), under the LS-RPWM strategy, $\overline{u}$_AN within T_c is equal to the instantaneous value of v_A. Similarly, the same conclusion can be obtained in a negative period of u_AN.

2.2. Power Balance Optimization

Under the proposed LS-RPWM strategy, when the power factor angle φ is 0 P_Ai/P_A-M_a (i = 1, 2, 3), the curves are shown in Figure 3a, and when the modulation degree M_a is 0.85 P_Ai/EI_A-φ (i = 1, 2, 3), the curves are shown in Figure 3b. In Figure 3, P_A1, P_A2 and P_A3 is the average output power of the cascaded H-bridge units A1, A2, and A3, respectively, and P_A is the average output power of the A-phase CHB inverter. From Figure 3a, P_A1/P_A, P_A2/P_A, and P_A3/P_A curves do not coincide with the power balance curve under any M_a. From Figure 3b, P_A1/EI_A, P_A2/EI_A, and P_A3/EI_A curves do not coincide with the power balance curve under any φ. This shows that average output power of the H-bridge units A1, A2 and A3 is not equal under any M_a and φ, that is, there is power imbalance between the cascaded H-bridge units A1, A2 and A3. The power imbalance leads to large differences in the utilization ratio of H-bridge units and DC voltage sources. These differences seriously reduce the reliability of the inverters and increase their maintenance cost [18,19,20]. Therefore, it is necessary to realize power balance between cascaded H-bridge units under the LS-RPWM strategy.

To facilitate the analysis of power distribution, v_A within T_A is divided to regions I and II, as shown in Figure 4. In region I, the comparison between v_A and v_Aci+ (i = 1, 2, 3) can control the H-bridge unit Ai output basic voltage $\overline{u}$_A1i+. In region II, the comparison between v_A and v_Aci− (i = 1, 2, 3) can control the H-bridge unit Ai output basic voltage $\overline{u}$_A2i−. In regions I and II, $\overline{u}$_A1i+ and $\overline{u}$_A2− are the average output voltages of H-bridge unit Ai.

In region I, $\overline{u}$_A1i+ can be expressed as:

$${\overline{u}}_{\mathrm{A}11+}=\left\{\begin{array}{cc}\hfill 3M_{\mathrm{a}}E\sin (\omega t)\hfill & 0\le \omega t<{\beta }_1\hfill \\ \hfill E\hfill & {\beta }_1\le \omega t<\mathsf{\pi }-{\beta }_1\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)\hfill & \mathsf{\pi }-{\beta }_1\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(6)

$${\overline{u}}_{\mathrm{A}12+}=\left\{\begin{array}{cc}\hfill 0\hfill & 0\le \omega t<{\beta }_1\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-E\hfill & {\beta }_1\le \omega t<{\beta }_2\hfill \\ \hfill E\hfill & {\beta }_2\le \omega t<\mathsf{\pi }-{\beta }_2\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-E\hfill & \mathsf{\pi }-{\beta }_2\le \omega t<\mathsf{\pi }-\beta \hfill \\ \hfill 0\hfill & \mathsf{\pi }-{\beta }_1\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(7)

$${\overline{u}}_{\mathrm{A}13+}=\left\{\begin{array}{cc}\hfill 0\hfill & 0\le \omega t<{\beta }_2\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-2E\hfill & {\beta }_2\le \omega t<\mathsf{\pi }-{\beta }_2\hfill \\ \hfill 0\hfill & \mathsf{\pi }-{\beta }_2\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(8)

In region II, $\overline{u}$_A2i− can be expressed as:

$${\overline{u}}_{\mathrm{A}11+}=\left\{\begin{array}{cc}\hfill 3M_{\mathrm{a}}E\sin (\omega t)\hfill & 0\le \omega t<{\beta }_1\hfill \\ \hfill E\hfill & {\beta }_1\le \omega t<\mathsf{\pi }-{\beta }_1\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)\hfill & \mathsf{\pi }-{\beta }_1\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(9)

$${\overline{u}}_{\mathrm{A}12+}=\left\{\begin{array}{cc}\hfill 0\hfill & 0\le \omega t<{\beta }_1\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-E\hfill & {\beta }_1\le \omega t<{\beta }_2\hfill \\ \hfill E\hfill & {\beta }_2\le \omega t<\mathsf{\pi }-{\beta }_2\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-E\hfill & \mathsf{\pi }-{\beta }_2\le \omega t<\mathsf{\pi }-\beta \hfill \\ \hfill 0\hfill & \mathsf{\pi }-{\beta }_1\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(10)

$${\overline{u}}_{\mathrm{A}13+}=\left\{\begin{array}{cc}\hfill 0\hfill & 0\le \omega t<{\beta }_2\hfill \\ \hfill 3M_{\mathrm{a}}E\sin (\omega t)-2E\hfill & {\beta }_2\le \omega t<\mathsf{\pi }-{\beta }_2\hfill \\ \hfill 0\hfill & \mathsf{\pi }-{\beta }_2\le \omega t\le \mathsf{\pi }\hfill \end{array}\right.$$

(11)

In (6)–(11), β₁ and β₂ are, respectively:

$$\left\{\begin{array}{c}{\beta }_1=\arcsin (\frac{1}{3M_{\mathrm{a}}})\\ {\beta }_2=\arcsin (\frac{2}{3M_{\mathrm{a}}})\end{array}\right.$$

(12)

Assuming i_A is output current of the A-phase inverter, and its expression is:

$$i_{\mathrm{A}}=I_{\mathrm{A}}\sin (\omega t-\phi )$$

(13)

In (13), I_A is the current amplitude and φ is the power factor angle. Under basic voltage $\overline{u}$_Aji± (j = 1, 2; i = 1, 2, 3), the average output power P_Aji± can be expressed as:

$$P_{\mathrm{A}ji\pm }=\frac{1}{\mathsf{\pi }}{\displaystyle {\int }_{j-\mathsf{\pi }}^{j\mathsf{\pi }}{\overline{u}}_{ji\pm }{i}_{\mathrm{A}}}d(\omega t)$$

(14)

According to (6), (13) and (14), P_A11+ is:

$$P_{\mathrm{A}11+}=\frac{1}{\mathsf{\pi }}{\displaystyle {\int }_0^{\mathsf{\pi }}{\overline{u}}_{11+}{i}_{\mathrm{A}}}d(\omega t)=\frac{E{I}_{\mathrm{A}}\cos (\phi )}{\mathsf{\pi }}[2\cos ({\beta }_1)-1.5M_{\mathrm{a}}\sin (2{\beta }_1)+3M_{\mathrm{a}}{\beta }_1]$$

(15)

and P_A21− is:

$$P_{\mathrm{A}21-}=\frac{1}{\mathsf{\pi }}{\displaystyle {\int }_{\mathsf{\pi }}^{2\mathsf{\pi }}{\overline{u}}_{21-}{i}_{\mathrm{A}}}d(\omega t)=\frac{E{I}_{\mathrm{A}}\cos (\phi )}{\mathsf{\pi }}[2\cos ({\beta }_1)-1.5M_{\mathrm{a}}\sin (2{\beta }_1)+3M_{\mathrm{a}}{\beta }_1]$$

(16)

It can be seen from (15) and (16) that P_A11+=P_A21−. Similarly,

$$\begin{array}{cc}{P}_{\mathrm{A}12+}=P_{\mathrm{A}22-}=\hfill & \frac{E{I}_{\mathrm{A}}\cos (\phi )}{\mathsf{\pi }}[4\cos ({\beta }_2)-2\cos ({\beta }_1)+1.5M_{\mathrm{a}}\sin (2{\beta }_1)\hfill \\ \hfill & -1.5M_{\mathrm{a}}\sin (2{\beta }_2)-3M_{\mathrm{a}}{\beta }_1+3M_{\mathrm{a}}{\beta }_2]\hfill \end{array}$$

(17)

$$P_{\mathrm{A}13+}=P_{\mathrm{A}23-}=\frac{E{I}_{\mathrm{A}}\cos (\phi )}{\mathsf{\pi }}[1.5\mathsf{\pi }{M}_{\mathrm{a}}-3M_{\mathrm{a}}{\beta }_2+1.5M_{\mathrm{a}}\sin (2{\beta }_2)-4\cos ({\beta }_2)]$$

(18)

From (16)–(18), P_A11+ = P_A21− under $\overline{u}$_A11+ and $\overline{u}$_A21−, P_A12+ = P_A22− under $\overline{u}$_A12+ and $\overline{u}$_A22−, and P_A13+ = P_A23− under $\overline{u}$_A13+ and $\overline{u}$_A23−. Therefore, the power balance can be realized as long as u_Ai (i = 1, 2, 3) contains three basic voltages ($\overline{u}$_A11+ or $\overline{u}$_A21−, $\overline{u}$_A12+ or $\overline{u}$_A22−, $\overline{u}$_A13+ or $\overline{u}$_A23−) within 3/2 T_A. According to above analysis, a logic operation method is proposed to realize power balance. Under this method, the driving pulse signals S_A11, S_A13, S_A21, S_A23, S_A31 and S_A33 are obtained by the logic operation between pulse signals L₁, L₂, L₃, L₄, L₅ and L₆, and random pulse signals X_A11, X_A13, X_A21, X_A23, X_A31 and X_A33. The logic operation method to obtain S_A11, S_A12, S_A13 and S_A14 of H-bridge unit A1 is shown in Figure 5. From this figure, the logic expressions of S_A11, S_A12, S_A13 and S_A14 in H-bridge unit A1 are:

$$\left\{\begin{array}{c}{S}_{\mathrm{A}11}=X_{\mathrm{A}11}·L_1+X_{\mathrm{A}31}·L_3+X_{\mathrm{A}21}·L_5\hfill \\ S_{\mathrm{A}12}=\overline{S_{\mathrm{A}11}}\hfill \\ S_{\mathrm{A}13}=X_{\mathrm{A}23}·L_2+X_{\mathrm{A}13}·L_4+X_{\mathrm{A}33}·L_6\hfill \\ S_{\mathrm{A}14}=\overline{S_{\mathrm{A}13}}\hfill \end{array}\right.$$

(19)

Similarly, the logic expressions of S_A21, S_A22, S_A23 and S_A24 in H-bridge unit A2 are:

$$\left\{\begin{array}{c}{S}_{\mathrm{A}21}=X_{\mathrm{A}21}·L_1+X_{\mathrm{A}11}·L_3+X_{\mathrm{A}31}·L_5\hfill \\ S_{\mathrm{A}22}=\overline{S_{\mathrm{A}21}}\hfill \\ S_{\mathrm{A}23}=X_{\mathrm{A}33}·L_2+X_{\mathrm{A}23}·L_4+X_{\mathrm{A}13}·L_6\hfill \\ S_{\mathrm{A}24}=\overline{S_{\mathrm{A}23}}\hfill \end{array}\right.$$

(20)

The logic expressions of S_A31, S_A32, S_A33 and S_A34 in H-bridge unit A3 are:

$$\left\{\begin{array}{c}{S}_{\mathrm{A}31}=X_{\mathrm{A}31}·L_1+X_{\mathrm{A}21}·L_3+X_{\mathrm{A}11}·L_5\hfill \\ S_{\mathrm{A}32}=\overline{S_{\mathrm{A}31}}\hfill \\ S_{\mathrm{A}33}=X_{\mathrm{A}13}·L_2+X_{\mathrm{A}33}·L_4+X_{\mathrm{A}23}·L_6\hfill \\ S_{\mathrm{A}34}=\overline{S_{\mathrm{A}33}}\hfill \end{array}\right.$$

(21)

Under the driving pulse signals S_Amn (m = 1, 2, 3; n = 1, 2, 3, 4), the contained basic voltages in u_Ai (i = 1, 2, 3) are shown in Figure 6. From this figure, in [0, 3π], u_A1 contains the basic voltages $\overline{u}$_A11+, $\overline{u}$_A22− and $\overline{u}$_A13+, u_A2 contains the basic voltages $\overline{u}$_A12+, $\overline{u}$_A23− and $\overline{u}$_A11+, and u_A3 contains the basic voltages $\overline{u}$_A13+, $\overline{u}$_A21− and $\overline{u}$_A12+. According to the above analysis, in [0, 3π],

P_A1 is:

$$P_{\mathrm{A}1}=P_{11+}+P_{22-}+P_{13+}=1.5M_{\mathrm{a}}E{I}_{\mathrm{A}}\cos (\phi )$$

(22)

P_A2 is:

$$P_{\mathrm{A}2}=P_{12+}+P_{23-}+P_{11+}=1.5M_{\mathrm{a}}E{I}_{\mathrm{A}}\cos (\phi )$$

(23)

and P_A3 is:

$$P_{\mathrm{A}3}=P_{13+}+P_{21-}+P_{12+}=1.5M_{\mathrm{a}}E{I}_{\mathrm{A}}\cos (\phi )$$

(24)

Similarly, in [3π, 6π]:

$$P_{\mathrm{A}1}=P_{\mathrm{A}2}=P_{\mathrm{A}3}=1.5M_{\mathrm{a}}E{I}_{\mathrm{A}}\cos (\phi )$$

(25)

2.3. Digital Implementation of the PB-RPWM Strategy

The proposed PB-RPWM strategy can be obtained by combining the LS-RPWM strategy with the logic operation method, and its overall technical framework is shown in Figure 7. It can be seen that the PB-RPWM strategy only has a random number generator module and a power balance module when compared with the LS-PWM strategy. Therefore, the digital implementation of the PB-RPWM strategy is still very simple, and it can still be implemented by high performance microprocessors such as FPGA.

The digital implementation principle based on FPGA is shown in Figure 8. It can be seen that the principle based on FPGA mainly includes a phase-locked loop (PLL), random number generator, triangle carrier generator, sine function table, comparator, L1–L6 pulse signal generator, logic operation module and dead time module. These modules can be implemented in FPGA through Verilog HDL. It should be noted that Figure 8 is a general design framework based on Figure 2. Therefore, the amplitude of the sine wave and carrier wave in Figure 8 should be adjusted according to the actual situation. Generally, in order to avoid complex floating-point operations as much as possible, the amplitude of sine wave and carrier wave should be set to a larger integer, such as 255.

Specifically, (1) a 1 MHz clock signal can be generated through the PLL in FPGA. (2) The random number generator can be designed based on the Logistic or Xorshift random algorithm. When the random number generator receives the enable signal, the random algorithm iterates to generate a random number. (3) The carrier generators can be designed based on up-down counters. The carrier sequences with random frequency can be obtained using a random counting slope. (4) The sine function data generated through Matlab is stored in FPGA to construct the sine function table. When the sine function table receives the sampling signal, a sine value is output to the comparator. (5) In the comparator, the sine value is compared with the carrier to generate the random pulse signals X_Amn (m = 1, 2, 3; n = 1, 2, 3, 4). (6) L₁–L₆ pulse signals can be generated by the fractional frequency of the clock signal. (7) In the logic operation module, the driving signals S_Amn (m = 1, 2, 3; n = 1, 2, 3, 4) can be generated by the logic operation of X_Amn and L₁–L₆. In practical application, it should be noted that the dead-time should be added to the driving signals S_Amn.

3. Simulation and Contrast

A simulation model of the three-phase CHB inverter is built to analyze the characteristics and performances of the proposed PB-RPWM strategy, and its circuit parameters are shown in

Table 1. Circuit parameters of the simulation and experimental.

Parameter	Value
DC voltage	1 H-bridge	72 V
	3 H-bridge	24 V
Carrier frequency	PS	1.5–4.5 kHz
	LS	3–9 kHz
Output frequency	50 Hz
Three-phase Load	R = 15 Ω	L = 3 mH

. In order to contrast under the same line voltage and average equivalent switching frequency, the different circuit parameters of the three-phase CHB inverter are set in Table 1. Specifically, the DC voltage source of a H-bridge unit is 72 V because these modulation strategies (RPWM-SHE [11], PS-RPWM [12] and PC-IRPWM [13]) are used for single H-bridge inverters. The DC voltage sources of H-bridge units are 24 V because these modulation strategies (PS-PWM [2], LS-PWM [19] and PB-RPWM) are used for cascaded 3 H-bridge inverters. The carrier frequency of the LS-PWM strategy is 6 kHz. The carrier frequency of the PS-PWM strategy is 1 kHz. The carrier frequency of the RPWM-SHE, PS-RPWM and PC-IRPWM strategies is 1.5~4.5 kHz. The carrier frequency of the PB-RPWM strategy is 3~9 kHz.

3.1. Characteristics of the PB-RPWM Strategy

Under the PB-RPWM strategy, the simulation waveforms of the line voltage u_AB are shown in Figure 9. From this Figure, when M_a is 0.3, 0.6 and 0.9, the levels of u_AB are 5, 9 and 11, the THD of u_AB is 39.13%, 17.37% and 12.86%, and the fundamental of u_AB is 37.38 V, 74.72 V and 112.2 V, respectively. To sum up, the level, THD, and fundamental amplitude of the line voltage changes with M_a. When M_a increases, the level and fundamental of the line voltage is increased, and the THD of the line voltage is decreased.

Since the three-phase CHB inverter in this paper is symmetrical, the A-phase inverter is used as an example to show the power balance performance of the PB-RPWM strategy. When the load is RL (15 Ω–3 mH), simulation waveforms of output voltage u_Ai, output current i_Ai and output power p_Ai (i = 1, 2, 3) are shown in Figure 10. In this figure, u_Ai is the output voltage of H-bridge unit i (i = 1, 2, 3), i_Ai is the output current of H-bridge unit i and p_Ai is the output power of H-bridge unit i. From Figure 9, when M_a is 0.3, P_A1 is 15.5 W, P_A2 is 15.51 W and P_A3 is 15.49 W. When M_a is 0.6, P_A1 is 61.98 W, P_A2 is 61.99 W and P_A3 is 61.98 W. When M_a is 0.9, P_A1 is 139.3 W, P_A2 is 139.3 W and P_A3 is 139.3 W. As can be seen, the average output power of the H-bridge units A1, A2, and A3 are basically equal in 3/2 T_A. This indicates that the proposed PB-RPWM strategy can solve the power imbalance between the H-bridge units A1, A2, and A3. This will effectively balance the utilization ratio of H-bridge units and DC voltage sources, thereby improving the inverter’s reliability and reducing the inverter’s maintenance cost.

3.2. Contrast

When M_a = [0.1:0.1:1], the THD of the line voltage u_AB under different modulation strategies is shown in

Table 2. THD of line voltage u_AB under different modulation strategies.

Ma	0.1	0.2	0.3	0.4	0.5	0.6	0.7	0.8	0.9	1
PS-RPWM	3.69	2.52	1.98	1.64	1.39	1.20	1.05	0.914	0.796	0.685
PC-IRPWM	3.72	2.52	1.98	1.63	1.39	1.21	1.05	0.916	0.797	0.687
RPWM-SHE	3.71	2.52	1.98	1.64	1.39	1.20	1.05	0.917	0.796	0.685
PS-PWM	1.70	0.967	0.538	0.258	0.292	0.287	0.240	0.198	0.183	0.150
LS-PWM	1.21	0.493	0.392	0.255	0.234	0.174	0.166	0.132	0.128	0.107
PB-RPWM	1.20	0.493	0.391	0.255	0.233	0.174	0.166	0.133	0.129	0.107

. It can be seen that the PB-RPWM strategy has a significantly smaller THD of the line voltage when compared with the RPEM-SHE, PS-RPWM, PC-IRPWM and PS-PWM strategies. Simultaneously, the PB-RPWM strategy has almost the same THD of the line voltage when compared with the LS-PWM strategy. This shows that the PB-RPWM strategy has the same optimal harmonic performance of the line voltage as the LS-PWM strategy.

When M_a is 0.9, the spectra under different modulation strategies are shown in Figure 11. From this figure, under the PS-RPWM, PC-IRPWM, RPWM-SHE, PS-PWM, LS-PWM and PB-RPWM strategies, the 1st PWM voltage noise of u_AB is 16.65 dBV, 16.69 dBV, 16.58 dBV, 12.97 dBV, 2.92 dBV and −7.24 dBV, and the 2nd PWM voltage noise of u_AB is 12.39 dBV, 10.93 dBV, 12.68 dBV, 2.05 dBV, 2.04 dBV and −10.9 dBV, respectively. Furthermore, the 1st and 2nd PWM voltage noise when M_a = [0.1:0.1:1] are recorded. According to the obtained data, the Amp of u_AB-M_a curves are drawn, as shown in Figure 12. It can be seen that the proposed PB-RPWM strategy has the minimum 1st and 2nd PWM voltage noises.

In order to better demonstrate the performance of PWM voltage noise reduction, the PWM voltage noise increment ΔdB_1st,x and ΔdB_2nd,x of the x (PC-IRPWM, RPWM-SHE, LS-PWM, and PB-RPWM) strategy is defined based on the 1st and 2nd PWM voltage noises of the PS-PWM strategy. The expressions of ΔdB_1st,x and ΔdB_2nd,x are:

$$\Delta \mathrm{d}{\mathrm{B}}_{1\mathrm{st},x}=\mathrm{d}{\mathrm{B}}_{1\mathrm{st},x}-\mathrm{d}{\mathrm{B}}_{1\mathrm{st},\mathrm{PS}-\mathrm{PWM}}$$

(26)

$$\Delta \mathrm{d}{\mathrm{B}}_{2\mathrm{nd},x}=\mathrm{d}{\mathrm{B}}_{2\mathrm{nd},x}-\mathrm{d}{\mathrm{B}}_{2\mathrm{nd},\mathrm{PS}-\mathrm{PWM}}$$

(27)

In (26) and (27), dB_1st,x and dB_2nd,x are the 1st and 2nd PWM voltage noises of the x strategy, respectively. dB_1st,PS-PWM and dB_2nd,PS-PWM are the 1st and 2nd PWM voltage noises of the PS-PWM strategy, respectively.

Under different modulation strategies, ΔdB_1st,x and ΔdB_2nd,x are shown in

Table 3. ΔdB_1st,x and ΔdB_2nd,x under different modulation strategies.

Ma	x	0.1	0.2	0.3	0.4	0.5	0.6	0.7	0.8	0.9	1
dB1st,x/dBV	PS-PWM	14.88	17.34	14.5	3.04	11.38	12.93	13.81	11.56	12.97	11.80
ΔdB1st,x/dBV	PS-RPWM	−7.58	−5.64	−0.57	11.87	4.78	4.78	4.41	5.08	3.68	2.06
	PC-IRPWM	−10.19	−5.63	−0.19	13.24	5.89	5.23	4.92	4.09	3.72	3.15
	RPWM-SHE	−9.20	−7.12	−1.12	11.81	4.15	2.91	4.00	4.25	3.61	0.28
	LS-PWM	−8.1	−10.8	−7.95	−2.19	−5.9	−8.72	−10.85	−6.24	−10.05	−9.53
	PB-RPWM	−18.63	−21.28	−20.99	−10.16	−20.70	−20.38	−21.80	−17.53	−20.21	−20.73
dB2nd,x/dBV	PS-PWM	11.66	−3.08	6.84	5.52	5.78	3.40	5.64	5.17	2.05	4.49
ΔdB2nd,x/dBV	PS-RPWM	−6.56	11.26	2.95	3.86	5.42	6.76	3.98	5.10	10.34	4.04
	PC-IRPWM	−7.83	11.35	1.57	7.21	4.41	6.96	4.14	6.63	8.34	3.73
	RPWM-SHE	−7.26	11.16	4.37	3.46	4.55	6.89	5.95	5.99	10.63	3.79
	LS-PWM	0.01	010	0.14	0.06	0.06	0	−0.04	−2.24	−0.01	0
	PB-RPWM	−18.56	−5.94	−15.59	−13.80	−17.10	−13.05	−18.36	−13.31	−12.95	−17.17

. In this table, when M_a is 0.6, ΔdB_1st,PB-RPWM and ΔdB_2nd,PB-RPWM is −20.38 dBV and −13.05 dBV, that is, the PB-RPWM strategy can reduce the 1st and 2nd PWM voltage noise of the PS-PWM strategy by 20.38dBV and 13.05 dBV, respectively. Similarly, when M_a is 0.6, ΔdB_1st,LS-PWM and ΔdB_2nd,LS-PWM is −8.72 dBV and 0 dBV, that is, the LS-PWM strategy can reduce the 1st and 2nd PWM voltage noise of the PS-PWM strategy by 8.72 dBV and 0 dBV, respectively. Therefore, it can be seen that the proposed PB-RPWM has the best performance of PWM noise reduction when compared with the other modulation strategies above.

To sum up, not only can the proposed PB-RPWM reduce PWM voltage noise and the THD of the line voltage, but it can also realize a power balance between cascaded H-bridge units. In addition, the following two enlightenments can be obtained. First, CHB inverters obviously have z higher waveform quality and lower PWM voltage noise when compared with single H-bridge inverters. Second, RPWM strategies based on a level-shifted random carrier can further improve waveform quality and reduce PWM voltage noise when compared with RPWM strategies based on phase-shifted random carrier.

4. Experimental Verification

An experimental platform of the three-phase CHB inverter is built as shown in Figure 13 to further verify the effectiveness and feasibility of the PB-RPWM strategy, and its circuit parameters are shown in Table 1. Under the PS-PWM strategy, the experimental waveforms and spectra of the line voltage u_AB are shown in Figure 14. From this figure, when M_a is 0.9, 0.6 and 0.3, the 1st PWM voltage noise is 13.12 dBV, 12.98 dBV and 14.88 dBV, and the 2nd PWM noise is 2.18 dBV, 3.56 dBV and 6.97 dBV, respectively. Under the PB-RPWM strategy, the experimental waveforms and spectra of the line voltage u_AB are shown in Figure 15. From this figure, when M_a is 0.9, 0.6 and 0.3, the 1st PWM voltage noise is −8.96 dBV, −9.12 dBV and −8.86 dBV, and the 2nd PWM noise is −9.98 dBV, −10.03 dBV and −9.94 dBV, respectively. According to these data, when M_a is 0.9, 0.6 and 0.3, ΔdB_1st,PB-RPWM is −22.08 dBV, −22.10 dBV and −23.74 dBV, and ΔdB_2nd,PB-RPWM is −12.16 dBV, −13.59 dBV and −16.91 dBV, respectively. It can be seen that the performance of PWM voltage noise reduction in the experimental platform is basically consistent with it in the simulation model. This verifies the superior performance of the proposed PB-RPWM strategy in reducing PWM voltage noise of the line voltage.

When the load is RL (15 Ω–3 mH), the experimental waveforms of output voltage u_Ai, output current i_Ai and output power p_Ai (i = 1, 2, 3) are shown in Figure 16, Figure 17 and Figure 18. In Figure 16, when M_a is 0.3, P_A1, P_A2 and P_A3 are 14.73 W, 14.74 W, and 14.76 W, respectively. In Figure 17, when M_a is 0.6, P_A1, P_A2, and P_A3 are 59.19 W, 59.20 W, and 59.19 W, respectively. In Figure 18, when M_a is 0.9, P_A1, P_A2, and P_A3 are 135.40 W, 135.39 W, and 135.40 W, respectively. It can be seen that the average output power of the H-bridge units A1, A2 and A3 are basically the same. Thus, the proposed PB-RPWM strategy can effectively realize the power balance between the cascaded H-bridge units A1, A2 and A3.

5. Conclusions

In this paper, the PB-RPWM strategy is proposed to reduce the PWM voltage noise of the line voltage and improve the power distribution between cascade H-bridge units in three-phase CHB inverters. The level-shifted carrier, random carrier frequency, and power balance are combined using the proposed level-shifted random carrier and logic operation method in this strategy. Thus, the PB-RPWM strategy not only has the optimal harmonic performance of the line voltage, but it can also reduce the PWM voltage noise of the line voltage and realize a power balance between cascaded H-bridge units. In addition, CHB inverters naturally have a better waveform quality and lower PWM voltage noise when compared with single H-bridge inverters. Therefore, CHB topologies and RPWM strategies based on a level-shifted random carrier and power balance can be given priority to obtain higher waveform quality and lower PWM voltage noise. The simulation and experimental results strongly verify the effectiveness and feasibility of the proposed PB-RPWM strategy.