Fast Synthesis Method for High-Dimensional Electromagnetic Bandgap Structure Using Deep Neural Network for Power/Ground Noise Suppression

Abstract

A deep neural network (DNN)-based method is proposed for the fast synthesis of a high-dimensional electromagnetic bandgap structure (HD-EBG) suppressing the power/ground noise in high-speed packages and printed circuit boards (PCBs). In recent EBG structures, a highly flexible design with high dimensionality is required, which is challenging to rapidly achieve an optimal solution. The proposed synthesis method is developed to solve this issue efficiently. The DNN hyperparameter optimization (HPO) associated with the HD-EBG structure is devised using the orthogonal array of the Taguchi method. By using this approach, the search space for HPO is reduced. For the efficient synthesis of the HD-EBG structure, an inverse modeling approach based on a DNN forward model and genetic algorithm optimization is proposed. The proposed DNN inverse modeling (DIM) is applied to two design examples where the HD-EBG structures with a constant fractional bandwidth and stopband bandwidth extension are synthesized. In the demonstration cases, the proposed DIM achieves the fast and accurate synthesis of the HD-EBG structures compared to the conventional method. With the proposed method, the synthesis time is maximally reduced up to 99.8% compared to conventional synthesis based on the forward model of full-wave simulation.

1. Introduction

Power/ground noise in microwave and high-speed digital circuits has received substantial attention in recent years. The suppression of high-frequency power/ground noise in high-speed packages and printed circuit boards (PCBs) is necessary to achieve high performance and reliability in high-speed digital and microwave systems. An electromagnetic bandgap structure (EBG) has been introduced as an effective way to mitigate high-frequency power/ground noise in high-speed packages and PCBs.

The overall performances and benefits of EBG structures are comprehensively summarized in [1]. The mushroom-type and coplanar EBG structures are revisited, and their noise suppression characteristics and dispersion analysis are explained, providing insight into the EBG structure for a better understanding. In [2], the initial study of the mushroom-type EBG structure was presented to suppress parallel-plate noise in power/ground planes. To improve the mushroom-type EBG structure, high-dielectric constant material was employed in [3]. Embedded capacitance material is placed between the power and ground planes of the EBG structure. The effective capacitance increases without enlarging the size of the EBG structure. This results in a wideband stopband with miniaturization. However, the use of high-dielectric constant materials in the EBG structure poses challenges such as high manufacturing costs and reduced reliability. To overcome this problem, a technique based on a defected ground structure (DGS) was presented in [4,5,6]. The implementation of the DGS is simple and cost-effective, as it involves etching copper in a metal layer during the manufacturing process. Various-shaped DGS patterns were applied to the metal plane connecting with an EBG patch to improve the stopband of the EBG structure. The rectangular-shaped DGS in [4] substantially broadens the stopband bandwidth by increasing the high cutoff frequency. The circular-shaped DGS is presented in [5] to improve a stopband with a reduced DGS area. Although rectangular- and circular-shaped DGSs improve the stopband of the EBG structure, they mainly increase the high cutoff frequency of the stopband rather than reduce the low cutoff frequency. In [6], a spiral-shaped pattern is devised for decreasing the low cutoff frequency of a stopband, leading to the miniaturization of the EBG structure. The compact EBG structure is beneficial for the implementation of noise suppression filters in integrated circuit packages. In [2,3,4,5,6], EBG structures require a significant amount of space to form a periodic structure. To reduce the occupied area, researchers have proposed a technique that partially employs the EBG structure [7]. This approach provides a trade-off solution between the stopband characteristics and the areas of the EBG structure on the board.

The coplanar EBG structure is another prominent type of EBG structure. It has been utilized to suppress the power/ground noise in high-speed circuits, as demonstrated in [8]. The structure comprises a stepped impedance resonator with both high and low characteristic impedances, which can be achieved by etching copper on the power or ground plane. The EBG structure described in [8] achieves a stopband in a simple manner; however, its ability to suppress power/ground noise over the wideband frequency range is limited. Therefore, an embedded thin film with a high-dielectric constant material is adopted, as demonstrated in [9,10]. The use of a high-dielectric constant material increases the capacitance of each EBG unit cell, resulting in efficiently broadening a stopband. However, due to the difficulty in handling the embedded thin film sheet and its low reliability, implementing this technique in manufacturing remains a significant challenge. To address this issue, the use of a rod-shaped structure made of a high-dielectric constant material is presented in [11], which not only improves the stopband of the EBG structure but also ensures high reliability in the manufacturing process. As described in previous studies, EBG structures exhibit the advantages of wideband suppression, substrate integration, high rejection level, and various analysis methods.

Bandgap characteristics are among the critical factors of the performance of an EBG structure for power/ground noise suppression, namely, a stopband consisting of low and high cutoff frequencies (fL and fH). In the design of EBG applications, the primary objective is to form a stopband covering a target frequency range where the power/ground noise should be mitigated. Considering the various target frequencies of recent and emerging applications of EBG structures, the synthesis of an EBG structure covering a target frequency range is quite a challenging problem. To achieve this objective, the f_L and f_H of a stopband must be adjusted with a high degree of flexibility. Consequently, a high-dimensional EBG structure (HD-EBG) should be considered that includes more design parameters than conventional EBG structures. Thus, it implements a massive design space.

A large design space ensures the existence of proper values of the design parameters that form a stopband, satisfying a target frequency band. However, this increase challenges the search for an optimized value in a limited timeframe. Extracting a one-to-one mapping function between the geometric variables and cutoff frequencies is more challenging in an HD-EBG structure because of the high dimensionality induced by many variables. It is hindered in obtaining an analytical solution and constructing an inverse model for the fast synthesis of HD-EBG structures.

Numerical approaches have been introduced to overcome the challenges of inverse modeling [12,13,14]. In [12], a stepped impedance EBG structure was synthesized using the f_L and f_H equations based on cavity mode resonances. Since the fundamentals governing the EBG structure in [12] are simple, a closed-form expression for physical dimensions can be obtained. However, this approach is limited to an EBG structure with low dimensionality, and it is difficult to extend this to an HD-EBG structure.

In [13], a highly flexible approach was presented. This study combines an optimization technique based on a genetic algorithm (GA) and forward model constructed using electromagnetic simulation, such as the finite difference method (FDM). An arbitrary-shaped perforation was formed in a patch with low characteristic impedance. Therefore, high dimensionality was implemented for EBG synthesis. However, the coupling effect within the perforation pattern cannot be captured by FDM, resulting in an inaccurate prediction of f_L and f_H. Moreover, GA optimization based on FDM requires an extremely long computation time.

In [14], a full-wave simulation of the finite element method (FEM) was employed for the forward modeling of the HD-EBG structure. The FEM simulation sufficiently increased the flexibility of the structural design and the accuracy of the simulation results. To obtain the HD-EBG structure satisfying the target frequency band, an FEM simulation was repeated numerous times in the GA optimization. This iterative process requires a long time for EBG synthesis because each full-wave simulation requires a significant computation time. Although combining an optimization technique with a full-wave simulation is effective for inverse modeling, the synthesis time should be substantially reduced.

To minimize the synthesis time and overcome the challenges in inverse modeling of an HD-EBG structure, a synthesis method based on a deep neural network (DNN) is proposed in this study. A DNN is defined as an artificial neural network consisting of many hidden layers. Recently, numerous studies on applying a DNN model to microwave and high-speed digital applications, such as microwave filters and high-speed interconnect systems, have been introduced. In [15,16,17], initial studies on the modeling of microwave circuits using artificial neural networks (ANNs) have been introduced. In the early stages of the study, researchers primarily focused on the computer-aided design of microwave circuits using the shallow neural network consisting of one or two hidden layers. ANN-based modeling achieves fast and accurate prediction of circuit performances and reduces the effort required for developing costly model libraries. To tackle the limitations imposed by a small number of hidden layers, the utilization of DNN is considered and the modeling method based on neural networks is extended to include more complex types of microwave circuits. In [18], the dynamic non-linearity of a wideband power amplifier is predicted using ANNs. The feedforward DNN is applied to microwave passive components such as a three-pole H-plane filter and a fifth-order waveguide bandpass filter in [19]. The mode recognition of dielectric resonator antenna is performed using a DNN technique to improve the antenna’s performance in [20]. The DNN-based approach has proven to be highly effective in modeling microwave circuits, and the researchers are additionally exploring the application of the DNN-based approach in a high-speed interconnect design in [21,22,23]. The design of the high-speed channel, including the analysis of eye diagrams, is effectively demonstrated with high accuracy and efficient computation. Moreover, the DNN-based approach in [24] finds application in the domain of power integrity design, specifically for utilizing the EBG structure to mitigate the power/ground noise in high-speed packages and PCBs. Clearly, the DNN-based method demonstrates notable features in modeling various microwave applications. However, the introduction of more input parameters and complicated network structures gives rise to the challenge of high dimensionality. This problem is extensively tackled in [25,26,27], where comprehensive solutions are provided.

In previous studies, DNN-based approaches have shown the ability to efficiently solve the inverse modeling problems of circuits with high dimensionality. However, relevant studies reporting the synthesis of HD-EBG structures using a DNN-based approach for power/ground noise suppression in high-speed packages and PCBs are challenging to find. Moreover, the hyperparameter optimization (HPO) of a DNN model dedicated to an HD-EBG structure is not observed, which is significant for achieving the fast and accurate synthesis of an HD-EBG structure.

The primary contribution of this study is the development and analysis of a dedicated DNN-based synthesis method for high-dimensional EBG structures, aiming to mitigate the power/ground noise in high-speed packages and PCBs. To ensure efficient synthesis, an effective approach for reducing the design space is devised using the Taguchi method. Additionally, an optimization method for the ANN structure is developed. The proposed method exhibits its remarkable capabilities compared to the conventional method, as demonstrated via full-wave simulations. In this study, a DNN-based synthesis method is proposed for the fast design of an HD-EBG structure that suppresses power/ground noise in high-speed packages and PCBs. A hybrid model of DNN and GA optimization for inverse modeling and an HPO method for reducing dimensionality are performed. Various HD-EBG structures were considered to verify and demonstrate the proposed synthesis method.

The remainder of this paper is organized as follows. In Section 2, the proposed synthesis method and DNN model with HPO are described. The proposed method is validated and demonstrated using specific cases of HD-EBG structures in Section 3. Finally, in Section 4, we conclude the paper.

2. Proposed EBG Synthesis Method

2.1. Hybrid Model for Inverse Modeling

The proposed EBG synthesis method mainly consists of two parts: the Taguchi-method-based HPO (TM-HPO) and DNN-based inverse modeling (DIM), as shown in Figure 1. In both steps, the hybrid model containing the DNN forward model and GA optimization is adopted. The proposed hybrid model efficiently achieves an indirect inverse model for the HD-EBG structure. A DNN forward model is constructed, as shown in Figure 2. The input of the DNN model is the binary array s of the design parameters for an HD-EBG structure. The output is the array f of the low and high cutoff frequencies (fL and fH) expressed in decimals. The DNN model in the proposed EBG synthesis method contains fully connected layers comprising an input layer with N_b neurons, M hidden layers with N_L(i) neurons, and an output layer with two neurons. The input array s is used as the binary-coded chromosome in the GA, and its size is denoted as N_b. k represents the kth run of the orthogonal array (OA) of L_j(S_i) obtained via the Taguchi method, which is used in the TM-HPO. The Taguchi method is proposed for the robust design of engineering problems. By using the Taguchi method, experiment sets are given, which consist of a variety of design parameters that require investigation by changing them from one value to another. The results obtained from completing Taguchi experiments provide insight into the effects of various design parameters. This leads to the efficient design of complex problems suffering from extensive design space. Taguchi experiments are designed using an orthogonal array. The number of design variables and their levels determine the size of the orthogonal array. In this study, we employ the Taguchi method to efficiently reduce the design space. ELU is employed as an activation function. It enables one to avoid a vanishing gradient problem and improve learning characteristics [28].

In addition to the DNN model, the GA was adopted in the proposed DIM. To explain this, a multi-slot patch EBG structure was employed as an example of an HD-EBG structure, as shown in Figure 3. The unit cell of the multi-slot EBG structure consisted of a power plane, ground plane, and perforated patch, where six different slots were etched. In the design of the HD-EBG structure, the values of the unit cell size d_c, via radius r_v and length h_v, and the distance hc between the patch and the ground plane were employed. These variables are typically preferred not to change because they are constrained by the stack-up and layout of high-speed packages and boards. Consequently, the slot dimensions were determined as the primary design variables because they rarely affect stack-up and layout. The slot dimensions were width wsi and length L_si of the ith slot. They were adjusted to obtain the EBG design satisfying the targets f_L and f_H, which are represented as f_LT and f_HT. The dimensions of the slots were encoded as a binary array, as shown in Figure 3, since the values of the input layer in the DNN model were updated using the optimization method based on the binary GA. The length of the input binary array was 54 bits. It consisted of six subarrays, where three and six bits were used to denote the width and length of each slot, respectively.

A binary array of slot dimensions for the DNN input layer was randomly generated and used as the initial population of the GA. The population consisted of 1000 chromosomes. To generate offspring, 30% of chromosomes from parents with lower error values were selected in the selection step. In a crossover step, the cross points were 1, 4, 10, 13, 19, 22, 28, 31, 37, 40, 48, and 54 bits. A bit flip with 50% probability was employed in the mutation step. The GA was repeated until the iteration reached the maximum number of 1000.

The GA objective is to minimize the fitness of the error between f_LD and f_HD, estimated via the DNN model, and target f_LT and f_HT, as follows:

$$\left(fitness\right)=\frac{\left(\left|f_{LD}-f_{LT}\right|+\left|f_{HD}-f_{HT}\right|\right)}{2}$$

(1)

At the end of the GA, the optimal estimation for slot dimensions s* was acquired.

2.2. TM-HPO and DIM

The TM-HPO was performed to obtain the best configuration of the DNN model and increase the accuracy of the hybrid model. In the proposed method, the Taguchi method was adopted to optimize the architecture of a neural network by reducing the search space for the HPO. In general, acquiring an optimized set of hyperparameters depends considerably on the researcher’s experience. Moreover, this is a time-consuming process due to the huge search space. The Taguchi method lowers the technological threshold of initializing the HPO and reduces the effort of searching for the hyperparameters to achieve maximum accuracy. The search space is determined based on the OA of the Taguchi method. Consider that the HPO variables consist of i factors with S levels, and S_i cases should be considered in a full factorial approach. The Taguchi method yields only j cases to be considered, based on the OA of L_j(S_i), which substantially reduces the number of cases to be considered. Although OA cases do not ensure a global optimum in certain cases, they provide a reasonable solution and enable a systematic approach.

In the proposed synthesis method, four hyperparameters of (1) a neural network structure, (2) the number of neurons in a hidden layer, (3) the number of hidden layers, and (4) the learning rate (LR) were selected as variables for HPO since they significantly affect the DNN model accuracy and computation time. Regarding the first hyperparameter, a neural network structure employs three alternatives which comprise the different neuron numbers in the hidden layers. The first configuration, C₁, is a neural network with a constant number of neurons in each hidden layer. The other DNN network structures exhibit a linear decrease C₂ and stepped decrease C₃. The DNN configuration is represented as follows:

$$C_1: N_{L\left(i\right)}=N_{L1}, for i=1, 2, \dots , M$$

(2a)

$$C_2: N_{L\left(i\right)}=\lceil \frac{\left(N_{LM}-N_{L1}\right)i+\left(M{N}_{L1}-N_{LM}\right)}{M-1}\rceil , for i=1, 2, \dots , M,$$

(2b)

$$C_3: N_{L\left(i\right)}=\{\begin{array}{cc}{N}_{L1},& for i\le \lceil \left(M+1\right)/2\rceil \\ N_{L1}/2,& for i>\lceil \left(M+1\right)/2\rceil \end{array}$$

(2c)

The second hyperparameter to be considered was the number of neurons in the first hidden layer N_L1. Three values of 54, 64, and 74 were employed for N_L1 in TM-HPO. Third, the hidden layer numbers M were selected as 4, 8, and 16. The last hyperparameter to be considered was LRs, which are closely associated with model training. Their values were 0.001, 0.005, and 0.01. The factors and corresponding levels for the TM-HPO are summarized in

Table 1. Design variables and their levels for TM-HPO.

Factors	Levels
	1	2	3
Neuron configuration	Constant	Linear decrease	Stepped decrease
Number of neurons in L1 (NL1)	54	64	74
Number of hidden layers (M)	4	8	16
Learning rate	0.001	0.005	0.01

. The factors and levels yielded an OA of L₉(34), as shown in

Table 2. Orthogonal array for TM-HPO.

Run	Neuron Configuration	NL1	M	Learning Rate
1	Constant	54	4	0.001
2	Linear decrease	54	8	0.005
3	Stepped decrease	54	16	0.01
4	Linear decrease	64	4	0.01
5	Stepped decrease	64	8	0.001
6	Constant	64	16	0.005
7	Stepped decrease	74	4	0.005
8	Constant	74	8	0.01
9	Linear decrease	74	16	0.001

. The OA consisted of nine runs. The search space for HPO was substantially reduced compared to the full factorial design. For every run in OA, DNN model training and validation were, respectively, performed under the corresponding hyperparameter configurations.

Afterward, we completed the training and validation of the DNN model under the condition of each run in the OA. Furthermore, verification was performed to reduce the error in the DNN model. The target f_LT,HPO and f_HT,HPO were selected for additional verification of the DNN model. The trained DNN model constructed an aforementioned hybrid model that provided the optimal slot dimensions ${\mathit{s}}_{HPO}^{\left(i\right)}$ for the synthesis of the EBG structure with f_LT,HPO and f_HT,HPO. i represents the ith run of OA. Dispersion analysis of the HD-EBG structure according to ${\mathit{s}}_{HPO}^{\left(i\right)}$ was conducted using a full-wave simulation in the further verification step. The cutoff frequencies of the HD-EBG structure with slot dimensions ${\mathit{s}}_{HPO}^{\left(i\right)}$ were obtained, and they are denoted as $f_{LE,HPO}^{\left(i\right)}$ and $f_{HE,HPO}^{\left(i\right)}$. For comprehensive analysis, the EBG synthesis under the conditions of the same f_LT,HPO and f_HT,HPO was repeated N_HPO times. Afterward, the number of obtained values of $f_{LE,HPO\left(N\right)}^{\left(i\right)}$ and $f_{HE,HPO\left(N\right)}^{\left(i\right)}$ was N_HPO. For the ith run of the OA, the accuracy was judged by the values of the root mean square error (RMSE), as follows:

$$RMS{E}_{f_{LE,HPO} or f_{HE,HPO}}=\frac{1}{N}{\sum }_{j=1}^{N_{HPO}}\sqrt{{\left(f_{LE or HE,HPO\left(j\right)}-f_{LT or HT, HPO}\right)}^2},$$

(3)

$$k_{error}=\frac{1}{2}\left(\frac{RMS{E}_{f_{LE,HPO}}}{f_{LT}}+\frac{RMS{E}_{f_{HE,HPO}}}{f_{HT}}\right)\times 100 (\%).$$

(4)

Finally, the best hyperparameters were determined by comparing the error values of all runs, as shown in (4). The optimal hyperparameters were employed in the hybrid model of DIM, which was primarily used for EBG synthesis. With these best hyperparameters, the HD-EBG structures were synthesized in the DIM part, as shown in Figure 1. DIM mainly contains two steps: the DNN-GA hybrid model and further verification based on the dispersion analysis with full-wave simulation. The DNN-GA hybrid model yielded the optimal values of the slot dimensions ${\mathit{s}}_{DIM}$ for the given objectives of f_LT and f_HT. In the further verification step of DIM, f_LE and f_HE were acquired by conducting dispersion analysis with the full-wave simulation of the HD-EBG structure corresponding to ${\mathit{s}}_{DIM}$. Although the optimal hyperparameters were extracted in TM-HPO, errors between the target values (i.e., f_LT and f_HT) and the synthesis results (i.e., f_LE and f_HE) can exist due to the uncertainty of the DNN model. This problem was solved by employing a further verification step using a full-wave simulation. This led to an increase in the synthesis time. However, the time increase was quite small compared to a conventional method, which fully adopts full-wave simulation as a forward model. In the further verification step, the DIM step was repeated N_DIM times until the errors of both f_LE and f_HE reached <5%. Afterward, the final solution of the slot dimensions for the HD-EBG structure was obtained.

3. Results of HD-EBG Synthesis

3.1. DNN Model and TM-HPO

To verify and demonstrate the proposed synthesis method, two design cases, a constant fractional bandwidth (FBW) and stopband extension, were considered in DIM. Prior to performing the design cases implemented by DIM, the TM-HPO should be completed for both design cases. In this subsection, DNN model training, validation, and TM-HPO are explained, and design cases are described in the following subsections.

The specific dimensions of the HD-EBG structure were considered, as listed in

Table 3. Design parameters and dimensions of HD-EBG structure in Figure 3.

Parameters	Dimensions	Parameters	Dimensions
dc	5.2 mm	s4	0.1 mm
dp	5.0 mm	s5	0.9 mm
hv	0.2 mm	s6	0.9 mm
hc	0.1 mm	rv	0.2 mm
s1	0.1 mm	ws1, ⋯, ws6	0.1–0.5 mm
s2	0.9 mm	Ls1, ⋯, Ls6	0.1–4.8 mm
s3	0.9 mm

, and were used in the design cases. The unit cell length d_c and patch length d_p were 5.2 mm and 5.0 mm, respectively. Both radius r_v and length h_v were 0.2 mm. The distance h_c between the patch and ground plane was 0.1 mm. The slot widths for the six slots varied from 0.1 to 0.5 mm, while the slot lengths changed from 0.1 to 4.8 mm. As described in Section 2, the width and length of each slot were encoded into 3- and 6-bit binary values in a binary slot dimension array $\mathit{s}$. The step values for the width and lengths were 0.4/7 and 4.7/63 mm (i.e., approximately 0.057 and 0.075 mm), respectively. These variations in the slots were applied to both dataset generation for a DNN model used in TM-HPO and DIM.

Regarding the datasets for the training and validation of a DNN model, the datasets were obtained using 1D dispersion analysis and a full-wave simulation of various slot dimensions. Furthermore, 4212 and 1052 simulation results were acquired for the training and validation of the DNN model, respectively. The relationship between f_L and f_H for the datasets is shown in Figure 4. As shown in the datasets, the design space of the HD-EBG structure is not a simple linear curve. It exhibits multiple solutions that reflect its ability to tune cutoff frequencies and its non-unique characteristics.

For tunability, an independent adjustment between f_L and f_H can be achieved by selecting alternative dimensions. For example, suppose that the HD-EBG structure (i.e., test vehicle (TV) A) is initially designed to have an f_L of 3.18 GHz and f_H of 4.94 GHz, and its f_L needs to be lowered to 2.8 GHz whilst maintaining f_H. Subsequently, the slot dimensions must be redesigned. Selecting the slot dimensions corresponding to TV B₁ in

Table 4. Design parameters and dimensions of HD-EBG structure in Figure 4.

Parameters	A	B1	B2	C
Ls1	2.56	4.65	2.56	4.35
ws1	0.44	0.44	0.50	0.33
Ls2	4.05	0.92	3.38	1.89
ws2	0.10	0.33	0.27	0.27
Ls3	4.58	2.41	2.93	3.76
ws3	0.27	0.21	0.10	0.50
Ls4	3.61	4.80	3.53	3.08
ws4	0.27	0.50	0.16	0.21
Ls5	4.58	3.08	2.49	2.41
ws5	0.10	0.39	0.16	0.27
Ls6	3.98	4.73	3.68	2.41
ws6	0.21	0.33	0.33	0.16

enables us to obtain the HD-EBG structure with an f_L of 2.77 GHz and f_H of 4.95 GHz, which shows the f_L reduction with a similar f_H. Moreover, a solution exists for this issue. Additionally, selecting the slot dimensions corresponding to TV B₂ in Table 4 can yield a similar result. It is shown that multiple solutions exist in the design of the HD-EBG structure due to the non-unique characteristics of the HD-EBG design.

Considering the other scenario, we assume that the f_H of TV A should be increased without changing f_L. The initial design of TV A can be replaced by the design of TV C. As shown in Figure 4, f_H is extended from 4.94 (TV A) to 5.91 GHz (TV C), while the f_L values of TV A and C are approximately the same. Therefore, the design of the f_H extension without changing f_L is achieved. We observed from the two scenarios that an EBG structure with high dimensionality has the advantage of enabling a flexible design that is challenging to achieve in a low-dimensional EBG structure. However, high dimensionality and non-uniqueness lead to conflicts between flexible design and inverse modeling. This contradictory issue is solved using the proposed synthesis method as described in Section 2.

Now, the TM-HPO was applied and the results were obtained. The OA values are presented in Table 2. For further verification, the values of f_LT,HPO and f_HT,HPO were set to 3.2 and 5.4 GHz, respectively, which are commonly required to suppress power/ground noise in the high-speed package and PCB applications. In each run of the OA, 15 f_LE and f_HE values were acquired (i.e., N = 15) for the same f_LT,HPO and f_HT,HPO. The results of 15 f_LE and f_HE values for all runs are summarized using box plots in Figure 5. The box plots indicate that the different configurations of the hyperparameter significantly affect the estimated results of f_LE and f_HE. Observing the results of run 1, the minimum Q₁, median Q₃, and maximum of f_LE are 3.14, 3.17, 3.24, 3.33, and 3.57 GHz, respectively, while those of f_HE are 5.13, 5.32, 5.62, 5.95, and 6.67 GHz. The results of the other runs exhibit similarly distributed values. It is observed that the interquartile ranges of f_LE in runs 3, 6, and 8 are relatively narrow, while that of f_HE in run 6 is narrower than that in all runs. This characteristic was further examined using RMSE as shown in Figure 6.

To quantitatively determine the best hyperparameters, the RMSE values of Equation (3) were calculated for all runs. The RMSE values of f_LE for all runs were 0.16, 0.29, 0.1, 0.1, 0.18, 0.15, 0.18, 0.10, and 0.15 GHz, and those of f_HE were 0.48, 0.45, 0.22, 0.23, 0.51, 0.12, 0.45, 0.33, and 0.48 GHz. The error values in (4) for each run were 6.94, 8.70, 3.60, 3.69, 7.53, 3.45, 6.98, 4.65, and 6.79%, as summarized in

Table 5. Summary of RMSE and error values for TM-HPO.

	OA Runs
	1	2	3	4	5	6	7	8	9
RMSEfLE (GHz)	0.16	0.29	0.10	0.10	0.18	0.15	0.18	0.10	0.15
RMSEfHE (GHz)	0.48	0.45	0.22	0.23	0.51	0.12	0.45	0.33	0.48
kerror (%)	6.94	8.70	3.60	3.69	7.53	3.45	6.98	4.65	6.79

. Since the sixth run showed the lowest value, the hyperparameters of the sixth run of the OA were chosen as the best hyperparameters for DIM. The configuration of the sixth run is the constant neuron structure, including N_L1 of 64, M of 16, and LR of 0.005.

3.2. Synthesis Case 1: HD-EBG Structure with Constant FBW

With the best hyperparameter determined for TM-HPO, the first demonstration of the HD-EBG synthesis method was performed. The design case considered here was the synthesis of HD-EBG structures comprising different stopbands with a constant FBW. For the constant FBW case, the FBW of the HD-EBG structure was assumed to be 0.53, which is typically required in high-speed packages and PCBs. Three TVs with f_LT and f_HT values of (2.50 GHz, 4.30 GHz), (3.10 GHz, 5.33 GHz), and (3.50 GHz, 6.02 GHz) were considered, which are represented as TVs 1, 2, and 3. HD-EBG structures for TVs 1, 2, and 3 were synthesized using the proposed DIM. The slotted patches and slot dimensions are presented in Figure 7 and

Table 6. Summary of synthesis results in Figure 7 (units: mm).

	Conventional Method			Proposed Method
	TV1	TV2	TV3	TV1	TV2	TV3
Ls1	3.40	2.29	3.88	0.24	3.38	0.10
ws1	0.23	0.33	0.41	0.10	0.44	0.38
Ls2	2.47	2.06	1.29	1.96	3.15	3.60
ws2	0.43	0.39	0.30	0.44	0.44	0.38
Ls3	4.09	4.75	4.18	4.50	3.45	1.59
ws3	0.47	0.23	0.36	0.38	0.10	0.44
Ls4	4.12	2.76	1.14	4.80	4.2	2.48
ws4	0.28	0.30	0.12	0.32	0.21	0.32
Ls5	0.25	3.34	0.65	2.86	4.27	4.72
ws5	0.22	0.20	0.27	0.10	0.38	0.44
Ls6	2.56	3.56	2.72	3.90	0.17	3.3
ws6	0.18	0.37	0.35	0.32	0.50	0.10
NDIM	N/A	N/A	N/A	9	6	8
fL (GHz)	2.45	3.09	3.48	2.49	3.07	3.53
fH (GHz)	4.31	5.36	6.04	4.33	5.27	6.06
fL error (%)	2.0	0.3	0.6	0.4	1.0	0.9
fH error (%)	0.2	0.6	0.3	0.7	1.1	0.7
FBW	0.550	0.537	0.538	0.539	0.528	0.528
Synthesis time (s)	50,946	55,111	45,909	767	520	706

, respectively. One must note that TM-HPO was not repeated because the best hyperparameters had already been acquired. The f_L error values (|f_{LE(N_DIM)} − f_LT|/f_LT × 100) of TVs 1, 2, and 3 were 0.4, 1.0, and 0.9%, while the f_H error values (|f_{HE(N_DIM)} − f_HT|/f_HT × 100) were 0.7, 1.1, and 0.7%, respectively. All errors were less than 5%. The FBW of the synthesized TVs 1, 2, and 3 was 0.539, 0.528, and 0.528, respectively. Therefore, DIM achieved the synthesis of HD-EBG structures for a constant FBW objective.

Additionally, HD-EBG synthesis using a conventional method was performed for comparison with the DIM results. The conventional method comprises a forward model based on full-wave simulation and GA optimization, as described in [14]. Unlike the proposed method, f_L and f_H were iteratively estimated using only the FEM solver. The chromosome and population sizes are the same as those used in the proposed method. In the conventional method, GA optimization is repeated 1000 times, and it does not require a verification step. The best solution is chosen as the one with the lowest f_L and f_H errors among the GA results in the conventional method.

The results of the conventional method are presented in Figure 7 and Table 6. The f_L and f_H errors of the conventional method were <5.0%. The FBW values of the conventional method for TVs 1, 2, and 3 were 0.550, 0.537, and 0.538, respectively, whereas those of the proposed method were 0.539, 0.528, and 0.528, respectively. The results verified that the proposed DIM synthesizes the HD-EBG structures with different stopbands, while they are constant for FBW. Interestingly, due to the non-uniqueness of the HD-EBG structure, the conventional and proposed methods synthesize different HD-EBG structures, as shown in Figure 7. However, they have the same cutoff frequencies. This was confirmed by comparing the dispersion results, as shown in Figure 8. The dispersion characteristics of TVs 1, 2, and 3 were extracted from the HD-EBG structures obtained using conventional and proposed methods. The stopband characteristics of the proposed method were similar to those of the conventional method, even though they exhibited different slot dimensions, which shows multiple solutions for HD-EBG synthesis.

3.3. Synthesis Case 2: HD-EBG Structure with f_H Extension

The other design case for the DIM demonstration is to extend the stopband bandwidth by increasing f_H with a constant f_L. The design change in this scenario is challenging in the practical design of EBG structures. Consider that the HD-EBG structure with an f_LT of 3.2 GHz and f_HT of 5.0 GHz (i.e., TV 4) was initially designed, and f_H should have been changed to 5.4 (i.e., TV 5) and 5.8 GHz (i.e., TV 6). First, the initial design of the HD-EBG structure (TV 4) was synthesized using the proposed DIM. The synthesized slot dimensions ${\mathit{s}}_{DIM}$ (L_s1, w_s1, L_s2, w_s2, L_s3, w_s3, L_s4, w_s4, L_s5, w_s5, L_s6, and w_s6) are 2.56, 0.50, 0.10, 0.27, 0.10, 0.10, 4.65, 0.44, 4.80, 0.27, 2.33, and 0.15 mm. The f_LE and f_HE of TV 4 are 3.17 and 4.94 GHz, respectively. The errors are only 0.9 and 1.2%.

To extend a stopband bandwidth from the initial design, DIM synthesizes the HD-EBG structures with f_H values of 5.4 (TV 5) and 5.8 GHz (TV 6), respectively. Their slot dimensions ${\mathit{s}}_{DIM}$ are summarized in

Table 7. Summary of synthesis results in Figure 9 (units: mm).

	Conventional Method			Proposed Method
	TV4	TV5	TV6	TV4	TV5	TV6
Ls1	2.34	0.52	4.66	2.56	0.92	3.90
ws1	0.12	0.20	0.41	0.50	0.44	0.21
Ls2	1.23	2.71	1.62	0.10	1.81	1.21
ws2	0.29	0.26	0.41	0.27	0.32	0.27
Ls3	2.33	0.58	3.15	0.10	0.39	3.45
ws3	0.38	0.26	0.11	0.10	0.38	0.10
Ls4	4.63	4.59	3.48	4.65	4.50	3.30
ws4	0.48	0.13	0.29	0.44	0.32	0.27
Ls5	3.75	3.85	3.20	4.80	3.30	2.56
ws5	0.19	0.20	0.16	0.27	0.21	0.44
Ls6	1.53	1.70	2.71	2.33	0.99	1.66
ws6	0.26	0.13	0.37	0.15	0.10	0.21
NDIM	N/A	N/A	N/A	5	1	3
fL (GHz)	3.13	3.18	3.18	3.17	3.21	3.14
fH (GHz)	5.07	5.43	5.79	4.94	5.40	5.81
fL error (%)	2.2	0.6	0.6	0.9	0.3	1.9
fH error (%)	1.4	0.6	0.2	1.2	0	0.2
Synthesis time (s)	25,206	43,494	46,750	400	80	239

. It is shown in the synthesized results that the f_LE and f_HE of TV 5 are 3.21 and 5.39 GHz, respectively. The errors regarding f_LT and f_HT are 0.3 and 0.2%, respectively. For TV 6, the f_LE and f_HE are 3.14 and 5.80 GHz. The errors are 1.9 and 0%. All of the errors in the synthesized results are <5.0%.

Examining the synthesis results of the conventional method, the f_L and f_H errors for TVs 4, 5, and 6 are 2.2, 1.4, 0.6, 0.6, 0.6, and 0.2%, respectively. Compared to the maximum error in the conventional method, it is concluded that the proposed DIM achieves accurate results. In this design challenge, it is interesting that the solutions of the DIM and conventional methods are different, as shown in Figure 9, although their dispersion characteristics are quite similar, as shown in Figure 10. As shown here, it is demonstrated that the proposed DIM solves the design challenge of extending the stopband bandwidth while maintaining f_L.

A crucial advantage of the proposed method is the substantial reduction in synthesis time, as shown in Figure 11. In the scenario of constant FBW, the synthesis times of TVs 1, 2, and 3 using the conventional method are 50,946, 55,111, and 45,909 s, respectively, while those of the DIM are 767, 520, and 706 s, respectively. The proposed DIM remarkably achieves a reduction in the synthesis time of 98.5, 99.1, and 98.5%, compared to the conventional method. In the second scenario of f_H extension, the conventional method took 25,206 s for TV 4, 43,494 s for TV 5, and 46,750 s for TV 6. However, using the proposed DIM, the synthesis times for TVs 4, 5, and 6 were 400, 80, and 239 s, respectively. The DIM achieves 98.4, 99.8, and 99.5% reductions in computation time for synthesizing TVs 4, 5, and 6, respectively. The proposed DIM shows excellent performance in terms of the computation time for synthesizing the HD-EBG structure. The proposed DIM successfully demonstrates its ability to rapidly synthesize HD-EBG structures and solve the challenging problem of complex design.

4. Conclusions

We presented a DNN-based approach for the rapid synthesis of the HD-EBG structure, which suppresses power/ground noise in high-speed packages and PCBs. The optimal architecture of the neural network for the HD-EBG structure with multiple slots was determined using the OA of the Taguchi method. The neural network structure, learning rate, number of neurons, and hidden layers were considered as factors for hyperparameter optimization. Inverse modeling to solve the synthesis problem was developed by combining a forward model based on DNN and GA optimization. To demonstrate and verify the proposed synthesis method, complicated design problems were considered, namely, the objectives of synthesizing HD-EBG structures with constant FBW and f_H extension. The proposed method shows the outstanding characteristics in terms of reducing the synthesis time while solving the problems compared to the conventional method. Using the proposed method, the maximum synthesis time was reduced by 99.8%. The proposed method achieves a fast and accurate synthesis of the HD-EBG structure. The proposed method efficiently overcomes complex design challenges requiring flexible design capabilities. We can extend the proposed method to other EBG structures by considering more datasets including other design variables such as unit cell length, patch size, and position. The proposed method also reduces the threshold of the design of EBG structures and enables engineers in other fields to adopt it for noise problems in high-speed packages and PCBs. Further research can explore the optimization of ANN configurations to reduce the amount of training data while maintaining synthesis result accuracy. Additionally, the proposed method can be experimentally demonstrated for EBG arrays in high-speed packages and PCBs.