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Article

Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map

by
Rodrigo Picos
1,2,*,
Stavros G. Stavrinides
3,
Mohamad Moner Al Chawa
4,
Carola de Benito
1,2,
Salvador Dueñas
5,
Helena Castan
5,
Euripides Hatzikraniotis
6 and
Leon O. Chua
7
1
Industrial Engineering and Construction Department, Balearic Islands University, 07122 Palma, Spain
2
Health Institute of the Balearic Islands, 07120 Palma, Spain
3
School of Science and Technology, International Hellenic University, Thermi, 57001 Thessaloniki, Greece
4
Institute of Circuits and Systems, Technische Universität Dresden, 01062 Dresden, Germany
5
Facultad de Ciencias, Universidad de Valladolid, 47011 Valladolid, Spain
6
Physics Department, Aristotle University of Thessaloniki, 54124 Thessaloniki, Greece
7
Department of Electrical Engineering and Computer Sciences, University of Californa, Berkeley, CA 94720, USA
*
Author to whom correspondence should be addressed.
Electronics 2022, 11(11), 1672; https://doi.org/10.3390/electronics11111672
Submission received: 11 April 2022 / Revised: 19 May 2022 / Accepted: 23 May 2022 / Published: 24 May 2022
(This article belongs to the Special Issue Resistive Memory Characterization, Simulation, and Compact Modeling)

Abstract

:
Memristors were proposed in the early 1970s by Leon Chua as a new electrical element linking charge to flux. Since that first introduction, these devices have positioned themselves to be considered as possible fundamental ones for the generations of electronic devices to come. In this paper, we propose a new way to investigate the effects of the electrical variables on the memristance of a device, and we successfully apply this technique to model the behavior of a TiN/Ti/HfO 2 /W ReRAM structure. To do so, we initially apply the Dynamic Route Map technique in the general case to obtain an approximation to the differential equation that determines the behaviour of the device. This is performed by choosing a variable of interest and observing the evolution of its own temporal derivative versus both its value and the applied voltage. Then, according to this technique, it is possible to obtain an approach to the governing equations with no need to make any assumption about the underlying physical mechanisms, by fitting a function to this. We have used a polynomial function, which allows accurate reproduction of the observed electrical behavior of the measured devices, by integrating the resulting differential equation system.

1. Introduction

At the beginning of the 1970s, Leon Chua noticed a symmetry in the pattern formed by the equations relating current i, voltage v, charge q, and flux φ , within the frame of the electric theory [1]. As a consequence of this symmetry, the existence of a fourth element emerged, next to the three already known passive elements, namely capacitor, inductor, and resistor. Each one of the latter three elements relates a pair of electrical variables: charge with voltage, flux with current, and current with voltage, respectively. Then, Chua suggested the existence of “memristor” as the new fourth electrical element, and this way the missing relation between charge and flux could be fulfilled, by attributing to the introduced element (nonlinear) dynamics that allowed it to behave as a resistor with a memory.
In fact, the first experimental description of such elements had already been performed long time ago [2], but they did not manage to become part of the circuit theory mainstream. The theoretical introduction of these devices paved the way to develop a generalized description of a class of devices and systems: the memristive devices or systems. These devices (or systems) are intrinsically nonlinear and defined by a set of differential equations relating the electrical magnitudes to a set of internal state variables [3].
Currently, this novel kind of device is considered as one of the most promising for the next generation of integrated circuits, those beyond Moore [4]. For instance, these devices are expected to be a path for alleviating the classical problem of the Von Neumman architecture, caused by the need to transferr data between memories and processors, enabling in-memory computing [5]. As a result, an increasing number of applications using memristors have been been proposed, such as innovative memories (ReRAMs, MRAM, etc.) [6,7,8], new sensor devices [9,10,11,12], elementary blocks for artificial neural networks (ANNs), and other bioinspired systems [13,14,15], to mention a few.
Related to fabrication technologies, memristive devices are currently being implemented in many different flavors, ranging from spintronics [16] to many different oxides [17,18,19,20], organic materials [21,22], and even emulators [23,24,25,26,27]. However, due to the relative immaturity of the current technology, only a handful of foundries are providing memristors in their libraries as standard blocks. As an example, we mention that as far as we know, RRAMs are offered by TSMC, Intel, and Towerjazz (where this last one seems to be in the process of being acquired by Intel), but they use old nodes. This implies that they can be implemented in cheaper designs, allowing their use in low-cost edge IoT platforms [28]. This low level of technological maturity also leads to the same problems that were also encountered in other technologies, such as reliability or forms of variability: the usual device–to–device, plus a cycle to cycle variability [29,30].
Simulating these devices is also a hot topic inside the modeling community [31,32], and there are two main approaches to this task. The first approach uses current and voltage [33,34,35,36,37] as the electrical variables of interest. The second approach, in line with Chua’s original proposal, uses charge and flux instead [38,39,40,41,42,43,44,45,46,47].
An interesting way to examine a model is using a tool named the Dynamic Route Map (DRM). This technique helps to represent how the system’s governing variable evolves versus its rate of change (the temporal derivative). As discussed in the corresponding section, this representation can provide a significant insight into how state variables evolve and project their relations as well. The DRM method can also be understood within the formalism proposed by Corinto [48], as the equation relating the internal variables with their derivatives.
The DRM technique has already been used to represent experimental ReRAM device measurements [49] and PCM devices [50]. Furthermore, in [51], it was shown how memristive devices with a well-known behavior (i.e., thermistors) can be discussed and represented using DRM. In this paper, we move this work a step forward and show how DRM can be used with experimental measurements to obtain an approximation to the differential equations defining the behavior of the device.

2. Memristor Modelling Framework

As mentioned in the introduction, a framework for memristor modeling was proposed by Corinto and Chua in [48], as an expansion of the previous work in [38]. In that work, the authors proposed a consolidated theoretical framework that allows a unified approach to modeling, and they also examined the possible advantages of the flux–charge ( φ -q) variables used in this context. In this proposal, they defined the different memristors presented in the taxonomy by [52] (the ideal, the generic, and the extended memristor) as being different approximations in the equations. The most general type in this classification is the extended memristor, which is a memristor described by additional state variables X = ( X 1 , X 2 , ) (other than just the electrical φ and q, or v and i). These state variables can be, for instance, the physical dimensions of a conductive filament, the temperature of the device, or anything else that may be needed for a complete description of the device. The most general expression relating all these variables can be expressed as follows:
Q = f ( φ , v , X )
where the flux ( φ ) and the charge (Q) are linked to the voltage (v) and the current (i), respectively, as follows
d φ d t = v
d Q d t = i
In addition, the evolution of the internal variables X , is described by a differential equation:
d X d t = g φ ( φ , v , X )
In order to obtain an equivalent expression to Ohm’s law, Equation (1) can be derived with respect to time:
i = d Q d t = f ( φ , v , X ) φ d φ d t + f ( φ , v , X ) v d v d t + j f ( φ , v , X ) X j d X j d t
The above equation can be further simplified using the Lagrangian L and the Jacobian J , as expressed in Equations (6) and (7), respectively:
L ( φ , v , x ) = g φ ( φ , v , x ) v
J ( φ , v , X ) = g φ ( φ , v , X ) X 1 , , g φ ( φ , v , X ) X n
i = f ( φ , v , X ) φ v + L ( φ , v , x ) d v d t + J ( φ , v , x ) · d X d t
It is interesting to point out that the two last right terms in Equation (8) have a clear physical meaning, being identified as parasitic elements [48]. Iin particular, the part including the term d v / d t can be connected to an inductive element, while the term d X j / d t can be identified as a current source. In the case where parasitic elements are present, the most general (i.e., extended) memristors may be reduced to generic memristors (plainly, just memristors). This is caused by function g φ being dependent only on flux φ and the state variables x ; thus, L = 0 . Moreover, the original memristors, as defined in [1] are generic memristors that do not depend on any internal state variable (i.e., J = 0 ). It has also to be noticed that it has been demonstrated in [48] that the following relation has to hold:
L ( φ , v , x ) d v d t + J ( φ , v , x ) · d X d t = 0
Therefore, we can determine the memristance M to be as follows
M ( φ , v , X ) = f ( φ , v , X ) φ = f M ( φ , v , X )
The above expressions can also be formulated in terms of charge and current as in [51]. In this case, the parasitic elements would have been inductors and voltage sources [48].
In brief, the relevant relations for a flux-controlled memristor can be described using Equations (3), (4), and (11):
v = M ( Q , i , X ) · i
The latter, Equation (11), shows the dependence of memristance in the most general case (the extended memristor). In this equation, the voltage across the terminals is named v, while i is the current and Q the charge (the first momentum of the current, as in [48]). The internal variables are included in the form of a vector x , and their dynamics are defined by g Q and Equation (4).
The framework described above has already been employed to successfully model various sorts of memristive systems, additionally enhancing the generalized framework for compact modeling in the flux–charge space [53]. Some interesting works utilising this approach may be found in the literature, as in [54] where a memristor model was developed using a charge-dependent mobility. A model for PCM was proposed in [39] and in [40] or [43], where the authors proposed semi-empirical models for ReRAMs, considered to behave as memristors, and in [55,56], where a Monte Carlo model for ReRAMs was presented. A delay model for memristive crossbars was derived in [57] utilizing a flux–charge definition. Finally, in [58], light bulbs based on incandescent filaments were shown to be generic memristors, while in [59,60], an experimental characterization of a memristive system was performed by using the flux–charge notation, and they present a discussion of the influence of the waveform’s frequency and shape.

3. The Dynamic Route Map

The use of state space to study dynamics was initially introduced by J. Liouville [61] and further utilized by H. Poincaré to study the three-body problem [62]. Since then, the study of nonlinear systems and the relevant methods in nonlinear dynamics have been developed within the phase space approach. This was due to the fact that important features and attributed of nonlinear systems are clearly emerging within the state space. It should be noted that the case of the two-dimensional phase space, also mentioned as phase portrait (x vs. d x / d t ), had been utilized as early as the beginning of the 20th century by the Ehrenfests [63].
On the other hand, the study of memristors is conducted within the previously described framework (Section 2), where the dynamics of an extended memristor that is flux-controlled is presented. It is apparent that due to the principle of duality, the corresponding charge-controlled extended memristor could be easily described within the same frame. Clearly, memristors are nonlinear elements, and that is due to their hysteretic behaviour, which is their main fingerprint [64]. As a result, phase space emerges as the proper space for studying memristor dynamics, and this way useful information on their dynamical properties can be provided. Toward this, a new tool in the phase space, the recently introduced novel technique of the Dynamic Route Map, has been proposed for studying memristor devices. This technique allows for acquiring information regarding their switching properties and features in general [65].
The dynamic route concept within the phase space, applied in the case of memristors, considers the definition of the trajectory of one of the system’s state variables as the voltage or the current through the device (according to whether the memristor is flux or charge controlled), which obtains a specific value.
This procedure can be considered to be equivalent to plotting Equation (4). Expanding this concept from a specific trajectory to a family of trajectories, the Dynamic Route Map is defined as a a parametric collection of a theoretically infinite number of dynamic routes [65]. An illustration of a typical DRM is presented in Figure 1, where three representative cases of DRM are presented. The one in the middle is a characteristic case that includes one stable and two unstable equillibria. It is apparent that the DRM is infinitely dense and that for proper visualization usually only a finite number is presented.
A comprehensive apposition of the features demonstrated by the DRM technique appears in [65]. For the reader’s convenience, we present the most important here:
  • Any point belonging to the positive half-plane, i.e., d x / d t > 0 , moves to the right of its dynamic route, thus increasing the value of variable x.
  • any point belonging to the negative half-plane, i.e., d x / d t < 0 , moves to the left of its dynamic route, thus decreasing the value of variable x.
  • The higher a dynamic route is located, the faster a point will move along it, as long as this route belongs to the upper half-plane (thus, its points move to the right).
  • The lower a dynamic route is, the faster a point will travel along it, as long as this route belongs to the lower half-plane (thus, its points move to the left).
  • All the points with null velocity d x / d t = 0 , i.e., those found on the horizontal axis, define equilibrium states of the system and are called equilibrium points.
  • Equilibrium points may be stable or unstable. This means that the dynamic routes that lead to them may converge towards them or diverge from them, correspondingly.
It is very important to mention that the dynamic route corresponding to a null parameter value (i.e., for memristors that would be a voltage v = 0 or a current i = 0) defines the so-called Power-Off Plot (POP), which provides the stability points [49]. Specifically, memristors having one stable and two unstable equilibria appear to be volatile, while memristors with one unstable and two stable equilibrium points appear to be nonvolatile.
As a final point, we would like to mention that the DRM can be used to study the dynamics of the switching process in a memristive device (i.e., the setting and resetting procedures). These dynamics can be visualized on the DRM, since these two operations are achieved when the operation point is obliged to shift its dynamic route, during some time; this is something that happens when positive or negative voltage pulses are applied, further resulting in switching between two equilibria.

4. Experimental Results

4.1. Description of the Used Devices

The devices used in this paper were TiN/Ti/HfO 2 /W metal–insulator–metal (MIM) stacks [66]. They were made on a 100 mm-diameter Si-n + + wafer by first creating a deposition of a 200 nm-thick Ti adherence layer, which was then followed by a deposition of a 50 nm-thick W layer. Both of those layers were grown using Magnetron sputtering. A plasma-enhanced chemical vapor deposition (PECVD) using silane (SiH 4 ) as the precursor process was used to create a 100 nm SiO 2 isolation oxide. This was in turn patterned using photolithography and dry etching. The apertures of the SiO 2 layer define the active area of the MIM devices. After that, the 10 nm HfO 2 film was deposited by atomic layer deposition (ALD) at 225 °C using Tetrakis(dimethylamino)hafnium (TDMAH) and H2O as precursors and N 2 as the carrier and purge gas. Magnetron sputtering was used again to define the top electrode as a metal layer of 10 nm-thick Ti and a 200 nm-thick TiN. The electrode was patterned by a lift-off process.
During the last step, the magnetron sputtering was used to deposit a 500 nm Al layer on the back of the wafer for electrically contacting the bottom electrode through the Si-n + + substrate. The final TiN/Ti/HfO 2 /W devices presented a square shape, and the fabricated areas ranged between 2 × 2 μ m 2 and 120 × 120 μ m 2 .
A typical curve representing the evolution of the conductance G for a set of different amplitudes of a triangular input waveform is presented in Figure 2.

4.2. Model Generation

Following the work published in [51], we propose an approach that utilizes experimental approximation to the variation of the memristance:
i = 1 M v s . = G v
where the dynamics of the memconductance G are determined by a differential equation:
d G d t = g G ( G , v )
It is clear that Equation (13) corresponds to a possible DRM. Due to our election of G as the variable of interest, it is possible to calculate an approximation for d G / d t from the experimental data, plotting it as a function of G and v.
As a first step, we have approximated the temporal variation of G by a discrete approximation:
d G d t G ( t ) G ( t d t ) d t
where d t is the time interval between two samples. Once this is calculated, we can plot the DRM for this data in the form of a 3D picture, as shown in Figure 3. This figure shows a subset of the data, marked as the lines with an ‘x’ symbol. This subset of data has been then used to obtain an approximation to Equation (13) with a polynomial function (using MATLAB polyfit55).
g G ( G , v ) i = 0 . . 5 , j = 0 . . 3 p i , j v i G j
The value of each coefficient p i , j is provided in Table 1, together with the 95% confidence interval, as provided by MATLAB. Notice that this polynomial is actually an approximation to g G . Figure 4 shows the surface defined by this approximation and the original data.
The validity of the proposed method has been tested using the fitted polynomial approximation to predict the response of the system to a specific input. This has been performed by integrating the differential equation system formed by Equations (12) and (13), where g M is the fitted approximation using the coefficients from Table 1, and the initial condition was chosen as the experimental initial value of G. The results of this integration are depicted in Figure 5, where the thick lines are the model and the thin lines featuring symbols correspond to the experimental data.

5. Discussion

The goal of this paper was to show how the DRM technique can be used to provide insight into the governing equations of a memristor or a memristive device. To do so, we first established a working framework that can be naturally linked to DRM [48]. Using this framework, we defined a variable of interest (in this case, this was conductance), and we represented the experimental measurements in the phase space. As a result, we plotted d G / d t as a function of both G and v. Notice that this plot provided us with the required information to approximate the differential equation that included the underlying physical and chemical mechanisms that determine the behavior of the device. Approximating this plot by the polynomial function defined by Equation (15) and the corresponding coefficients in Table 1, we generated a semi-empirical model of the device. It is noted that this was due to information provided by the DRM technique.
Then the model was used to reproduce the observed electrical curves. To do so, we integrated the resulting set of differential equations, using a time-dependent voltage-input, defined as a ramp, just as in the real measurements. Notice that this is required, since the use of a different input signal would provide a different curve [59,67]. Comparison between the model and the experimental data showed a fairly good agreement, justifying the use of the DRM approach. The modeling could be improved by using a different approximation to the DRM instead of a polynomial, using for instance the so-called hysterons proposed in [68].
Further work related to this should be performed to check this conclusion. In particular, the effect of the input signal velocity has to be tested, as well as the variability in the cycle to cycle switching characteristics.

Author Contributions

Conceptualization, R.P., S.G.S. and M.M.A.C.; methodology, R.P., S.G.S. and L.O.C.; software, R.P. and M.M.A.C.; validation, R.P., S.D. and H.C.; formal analysis, R.P., S.G.S. and M.M.A.C.; investigation, R.P., S.G.S., C.d.B., S.D. and H.C.; resources, R.P., S.D., H.C. and E.H.; data curation, R.P., S.D. and H.C.; writing—original draft preparation, R.P., S.G.S. and M.M.A.C.; writing—review and editing, R.P., S.G.S., M.M.A.C., C.d.B., S.D., H.C., E.H. and L.O.C.; visualization, R.P. and S.G.S.; supervision, R.P. and M.M.A.C.; project administration, R.P.; funding acquisition, R.P., S.D. and H.C. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Data Availability Statement

Data may be obtained from the authors by reasonable request.

Conflicts of Interest

The authors declare no conflict of interest. The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.

References

  1. Chua, L.O. Memristor-the missing circuit element. Circuit Theory IEEE Trans. 1971, 18, 507–519. [Google Scholar] [CrossRef]
  2. Prodromakis, T.; Toumazou, C.; Chua, L. Two centuries of memristors. Nat. Mater. 2012, 11, 478–481. [Google Scholar] [CrossRef]
  3. Chua, L.; Kang, S.M. Memristive devices and systems. Proc. IEEE 1976, 64, 209–223. [Google Scholar] [CrossRef]
  4. Tetzlaff, R. Memristors and Memristive Systems; Springer: Berlin/Heidelberg, Germany, 2013. [Google Scholar]
  5. Sebastian, A.; Le Gallo, M.; Khaddam-Aljameh, R.; Eleftheriou, E. Memory devices and applications for in-memory computing. Nat. Nanotechnol. 2020, 15, 529–544. [Google Scholar] [CrossRef]
  6. Kim, H.; Sah, M.P.; Yang, C.; Chua, L.O. Memristor-based multilevel memory. In Proceedings of the Cellular Nanoscale Networks and Their Applications (CNNA), 2010 12th International Workshop, Berkeley, CA, USA, 3–5 February 2010; pp. 1–6. [Google Scholar]
  7. Stathopoulos, S.; Khiat, A.; Trapatseli, M.; Cortese, S.; Serb, A.; Valov, I.; Prodromakis, T. Multibit memory operation of metal-oxide bi-layer memristors. Sci. Rep. 2017, 7, 17532. [Google Scholar] [CrossRef] [Green Version]
  8. Eshraghian, K.; Cho, K.R.; Kavehei, O.; Kang, S.K.; Abbott, D.; Kang, S.M.S. Memristor MOS content addressable memory (MCAM): Hybrid architecture for future high performance search engines. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2011, 19, 1407–1417. [Google Scholar] [CrossRef] [Green Version]
  9. Gouder, A.; Jimenez-Solano, A.; Vargas-Barbosa, N.M.; Podjaski, F.; Lotsch, B.V. Photo-memristive sensing with charge storing 2D carbon nitrides. arXiv 2021, arXiv:2109.06964. [Google Scholar]
  10. Carrara, S. The Birth of a New Field: Memristive Sensors. A Review. IEEE Sens. J. 2020, 21, 12370–12378. [Google Scholar] [CrossRef]
  11. Carrara, S.; Sacchetto, D.; Doucey, M.A.; Baj-Rossi, C.; De Micheli, G.; Leblebici, Y. Memristive-biosensors: A new detection method by using nanofabricated memristors. Sens. Actuators Chem. 2012, 171, 449–457. [Google Scholar] [CrossRef] [Green Version]
  12. Gupta, I.; Serb, A.; Khiat, A.; Zeitler, R.; Vassanelli, S.; Prodromakis, T. Memristive integrative sensors for neuronal activity. arXiv 2015, arXiv:1507.06832. [Google Scholar]
  13. Yao, P.; Wu, H.; Gao, B.; Tang, J.; Zhang, Q.; Zhang, W.; Yang, J.J.; Qian, H. Fully hardware-implemented memristor convolutional neural network. Nature 2020, 577, 641–646. [Google Scholar] [CrossRef]
  14. Pershin, Y.V.; Di Ventra, M. Experimental demonstration of associative memory with memristive neural networks. Neural Netw. 2010, 23, 881–886. [Google Scholar] [CrossRef] [Green Version]
  15. Li, C.; Belkin, D.; Li, Y.; Yan, P.; Hu, M.; Ge, N.; Jiang, H.; Montgomery, E.; Lin, P.; Wang, Z.; et al. Efficient and self-adaptive in situ learning in multilayer memristor neural networks. Nat. Commun. 2018, 9, 2385. [Google Scholar] [CrossRef] [Green Version]
  16. Grollier, J.; Querlioz, D.; Stiles, M.D. Spintronic Nanodevices for Bioinspired Computing. Proc. IEEE 2016, 104, 2024–2039. [Google Scholar] [CrossRef] [Green Version]
  17. Strukov, D.B.; Snider, G.S.; Stewart, D.R.; Williams, R.S. The missing memristor found. Nature 2008, 453, 80–83. [Google Scholar] [CrossRef]
  18. Dias, C.; Lv, H.; Picos, R.; Aguiar, P.; Cardoso, S.; Freitas, P.; Ventura, J. Bipolar resistive switching in Si/Ag nanostructures. Appl. Surf. Sci. 2017, 424, 122–126. [Google Scholar] [CrossRef]
  19. Brivio, S.; Tallarida, G.; Cianci, E.; Spiga, S. Formation and disruption of conductive filaments in a HfO2/TiN structure. Nanotechnology 2014, 25, 385705. [Google Scholar] [CrossRef]
  20. Mohammad, B.; Jaoude, M.A.; Kumar, V.; Al Homouz, D.M.; Nahla, H.A.; Al-Qutayri, M.; Christoforou, N. State of the art of metal oxide memristor devices. Nanotechnol. Rev. 2016, 5, 311–329. [Google Scholar] [CrossRef]
  21. Sun, B.; Zhang, X.; Zhou, G.; Li, P.; Zhang, Y.; Wang, H.; Xia, Y.; Zhao, Y. An organic nonvolatile resistive switching memory device fabricated with natural pectin from fruit peel. Org. Electron. 2017, 42, 181–186. [Google Scholar] [CrossRef]
  22. Battistoni, S.; Dimonte, A.; Erokhin, V. Organic memristor based elements for bio-inspired computing. In Advances in Unconventional Computing; Springer: Berlin/Heidelberg, Germany, 2017; pp. 469–496. [Google Scholar]
  23. Kalomiros, J.; Stavrinides, S.G.; Corinto, F. A two-transistor non-ideal memristor emulator. In Proceedings of the Modern Circuits and Systems Technologies (MOCAST), 5th International Conference, Thessaloniki, Greece, 12–14 May 2016; pp. 1–4. [Google Scholar]
  24. Camps, O.; Al Chawa, M.M.; de Benito, C.; Roca, M.; Stavrinides, S.G.; Picos, R.; Chua, L.O. A purely digital memristor emulator based on a flux-charge model. In Proceedings of the 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Bordeaux, France, 9–12 December 2018; pp. 565–568. [Google Scholar]
  25. Al Chawa, M.M.; de Benito, C.; Roca, M.; Picos, R.; Stavrinides, S. Design and implementation of passive memristor emulators using a charge-flux approach. In Proceedings of the 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 27–30 May 2018; pp. 1–5. [Google Scholar]
  26. Camps, O.; Picos, R.; de Benito, C.; Al Chawa, M.M.; Stavrinides, S.G. Emulating memristors in a digital environment using stochastic logic. In Proceedings of the 2018 7th International Conference on Modern Circuits and Systems Technologies (MOCAST), Thessaloniki, Greece, 7–9 May 2018; pp. 1–4. [Google Scholar]
  27. Camps, O.; Stavrinides, S.G.; Picos, R. Stochastic Computing Implementation of Chaotic Systems. Mathematics 2021, 9, 375. [Google Scholar] [CrossRef]
  28. Yu, S.; Jiang, H.; Huang, S.; Peng, X.; Lu, A. Compute-in-Memory Chips for Deep Learning: Recent Trends and Prospects. IEEE Circuits Syst. Mag. 2021, 21, 31–56. [Google Scholar] [CrossRef]
  29. Picos, R.; Roldan, J.; Al Chawa, M.; Jimenez-Molinos, F.; Garcia-Moreno, E. A physically based circuit model to account for variability in memristors with resistive switching operation. In Proceedings of the 2016 Conference on Design of Circuits and Integrated Systems (DCIS), Granada, Spain, 23–25 November 2016; pp. 1–6. [Google Scholar]
  30. Naous, R.; Al-Shedivat, M.; Salama, K.N. Stochasticity modeling in memristors. IEEE Trans. Nanotechnol. 2016, 15, 15–28. [Google Scholar] [CrossRef] [Green Version]
  31. Panda, D.; Sahu, P.P.; Tseng, T.Y. A collective study on modeling and simulation of resistive random access memory. Nanoscale Res. Lett. 2018, 13, 1–48. [Google Scholar] [CrossRef]
  32. Kolka, Z.; Biolek, D.; Biolkova, V.; Biolek, Z. Evaluation of memristor models for large crossbar structures. In Proceedings of the Radioelektronika (RADIOELEKTRONIKA), 2016 26th International Conference, Kosice, Slovakia, 19–20 April 2016; pp. 91–94. [Google Scholar]
  33. Messaris, I.; Serb, A.; Khiat, A.; Nikolaidis, S.; Prodromakis, T. A compact Verilog-A ReRAM switching model. arXiv 2017, arXiv:1703.01167. [Google Scholar]
  34. Georgiou, P.S.; Yaliraki, S.N.; Drakakis, E.M.; Barahona, M. Window functions and sigmoidal behaviour of memristive systems. Int. J. Circuit Theory Appl. 2016, 44, 1685–1696. [Google Scholar] [CrossRef] [Green Version]
  35. Ascoli, A.; Tetzlaff, R.; Chua, L. Continuous and differentiable approximation of a TaO memristor model for robust numerical simulations. In Emergent Complexity from Nonlinearity, in Physics, Engineering and the Life Sciences; Springer: Berlin/Heidelberg, Germany, 2017; pp. 61–69. [Google Scholar]
  36. Jimenez-Molinos, F.; Villena, M.; Roldan, J.; Roldan, A. A SPICE Compact Model for Unipolar RRAM Reset Process Analysis. IEEE Trans. Electron Devices 2015, 62, 955–962. [Google Scholar] [CrossRef]
  37. Li, Q.; Serb, A.; Prodromakis, T.; Xu, H. A memristor SPICE model accounting for synaptic activity dependence. PLoS ONE 2015, 10, e0120506. [Google Scholar] [CrossRef] [Green Version]
  38. Orlowski, M.; Secco, J.; Corinto, F. Chua’s Constitutive Memristor Relations for Physical Phenomena at Metal–Oxide Interfaces. IEEE J. Emerg. Sel. Top. Circuits Syst. 2015, 5, 143–152. [Google Scholar] [CrossRef]
  39. Secco, J.; Corinto, F.; Sebastian, A. Flux–charge memristor model for phase change memory. IEEE Trans. Circuits Syst. II Express Briefs 2018, 65, 111–114. [Google Scholar] [CrossRef]
  40. Picos, R.; Roldan, J.B.; Al Chawa, M.M.; Garcia-Fernandez, P.; Jimenez-Molinos, F.; Garcia-Moreno, E. Semiempirical Modeling of Reset Transitions in Unipolar Resistive-Switching Based Memristors. Radioengineering 2015, 24, 421. [Google Scholar] [CrossRef]
  41. Chawa, M.M.A.; Picos, R.; Tetzlaff, R. A Compact Memristor Model for Neuromorphic ReRAM Devices in Flux-Charge Space. IEEE Trans. Circuits Syst. I Regul. Pap. 2021, 68, 3631–3641. [Google Scholar] [CrossRef]
  42. Garcia-Moreno, E.; Picos, R.; Al-Chawa, M.M. SPICE model for unipolar RRAM based on a flux-controlled memristor. In Proceedings of the Power, Electronics and Computing (ROPEC), 2015 IEEE International Autumn Meeting, Ixtapa, Zihuatanejo, Mexico, 4–6 November 2015; pp. 1–4. [Google Scholar]
  43. Al Chawa, M.M.; Picos, R.; Roldan, J.B.; Jimenez-Molinos, F.; Villena, M.A.; de Benito, C. Exploring resistive switching-based memristors in the charge–flux domain: A modeling approach. Int. J. Circuit Theory Appl. 2018, 46, 29–38. [Google Scholar] [CrossRef]
  44. Al Chawa, M.M.; Picos, R. A Simple Quasi-Static Compact Model of Bipolar ReRAM Memristive Devices. IEEE Trans. Circuits Syst. II Express Briefs 2020, 67, 390–394. [Google Scholar] [CrossRef]
  45. Al Chawa, M.M.; de Benito, C.; Picos, R. A Simple Piecewise Model of Reset/Set Transitions in Bipolar ReRAM Memristive Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 2018, 65, 3469–3480. [Google Scholar] [CrossRef]
  46. Al Chawa, M.M.; Picos, R.; Tetzlaff, R. A simple memristor model for neuromorphic ReRAM devices. In Proceedings of the 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 12–14 October 2020; p. 1. [Google Scholar] [CrossRef]
  47. Al Chawa, M.M.; Tetzlaff, R.; Picos, R. A flux-controlled memristor model for neuromorphic ReRAM devices. In Proceedings of the 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Virtual Conference, 23–25 November 2020; pp. 1–4. [Google Scholar] [CrossRef]
  48. Corinto, F.; Civalleri, P.P.; Chua, L.O. A theoretical approach to memristor devices. IEEE J. Emerg. Sel. Top. Circuits Syst. 2015, 5, 123–132. [Google Scholar] [CrossRef] [Green Version]
  49. Maldonado, D.; Gonzalez, M.B.; Campabadal, F.; Jimenez-Molinos, F.; Al Chawa, M.M.; Stavrinides, S.G.; Roldan, J.B.; Tetzlaff, R.; Picos, R.; Chua, L.O. Experimental evaluation of the dynamic route map in the reset transition of memristive ReRAMs. Chaos Solitons Fractals 2020, 139, 110288. [Google Scholar] [CrossRef]
  50. Marrone, F.; Secco, J.; Kersting, B.; Le Gallo, M.; Corinto, F.; Sebastian, A.; Chua, L.O. Experimental validation of state equations and dynamic route maps for phase change memristive devices. Sci. Rep. 2022, 12, 6488. [Google Scholar] [CrossRef]
  51. Picos, R.; Al Chawa, M.M.; de Benito, C.; Stavrinides, S.G.; Chua, L.O. Using Self-heating Resistors as a case study for Memristor Compact Modelling. IEEE J. Electron Devices Soc. 2022; in press. [Google Scholar]
  52. Chua, L.O. Everything you wish to know about memristors but are afraid to ask. Radioengineering 2015, 24, 319. [Google Scholar] [CrossRef]
  53. Shin, S.; Kim, K.; Kang, S.M. Compact models for memristors based on charge-flux constitutive relationships. Comput.-Aided Des. Integr. Circuits Syst. IEEE Trans. 2010, 29, 590–598. [Google Scholar] [CrossRef]
  54. Picos, R.; Al Chawa, M.M.; Roca, M.; Garcia-Moreno, E. A charge-dependent mobility memristor model. In Proceedings of the 10th Spanish Conference on Electron Devices, CDE’2015, Aranjuez-Madrid, Spain, 11–13 February 2015. [Google Scholar]
  55. Picos, R.; Roldan, J.B.; Al Chawa, M.M.; Jimenez-Molinos, F.; Villena, M.; Garcia-Moreno, E. Exploring ReRAM-based memristors in the charge-flux domain, a modeling approach. In Proceedings of the International Conference on Memristive Systems, MEMRISYS’2015, Paphos, Cyprus, 8–10 November 2015. [Google Scholar]
  56. Al Chawa, M.M.; Tetzlaff, R.; Picos, R. A Simple Monte Carlo MODEL for the cycle-to-cycle reset transition variation of ReRAM memristive devices. In Proceedings of the 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), Bremen, Germany, 7–9 September 2020; pp. 1–4. [Google Scholar] [CrossRef]
  57. de Benito, C.; Al Chawa, M.M.; Picos, R.; Garcia-Moreno, E. A procedure to calculate a delay model for memristive switches. In Proceedings of the Workshop on Memristor Technology, Design, Automation and Computing, Stockholm, Sweden, 23–25 January 2017. [Google Scholar]
  58. Theodorakakos, A.; Stavrinides, S.G.; Hatzikraniotis, E.; Picos, R. A non-ideal memristor device. In Proceedings of the Memristive Systems (MEMRISYS) 2015 International Conference, Paphos, Cyprus, 8–10 November 2015; pp. 1–2. [Google Scholar]
  59. Al Chawa, M.M.; Rodriguez-Fernandez, A.; Bargallo, M.; Campabadal, F.; de Benito, C.; Stavrinides, S.; Garcia-Moreno, E.; Picos, R. Waveform and frequency effects on reset transition in bipolar ReRAM in flux-charge space. In Proceedings of the Memristive Systems (MEMRISYS) 2017 International Conference on Memristive Materials, Devices & Systems, Athens, Greece, 3–6 April 2017. [Google Scholar]
  60. Al Chawa, M.M.; Picos, R.; Covi, E.; Brivio, S.; Garcia-Moreno, E.; Spiga, S. Flux-charge characterizing of reset transition in bipolar resistive-switching memristive devices. In Proceedings of the 11th Spanish Conference on Electron Devices, Barcelona, Spain, 8–10 February 2017. [Google Scholar]
  61. Liouville, J. Sur la Théorie de la Variation des constantes arbitraires. J. Des Mathématiques Pures Appl. 1838, 3, 342–349. [Google Scholar]
  62. Poincaré, H. Les Méthodes Nouvelles de la Mécanique Céleste; 1892-99; Gauthier-Villars: Paris, France, 1892; Volume 3. [Google Scholar]
  63. Ehrenfest, P.; Ehrenfest, T. Encyklopadie der Mathematischen Wis-Senschaften; B. G. Teubner: Liepzig, Germany, 1911; Volume 4. [Google Scholar]
  64. Chua, L.O. If it’s pinched it’s a memristor. Semicond. Sci. Technol. 2014, 29, 104001. [Google Scholar] [CrossRef]
  65. Chua, L.O. Five non-volatile memristor enigmas solved. App. Physics A 2018, 124, 563. [Google Scholar] [CrossRef]
  66. Poblador, S.; Maestro-Izquierdo, M.; Zabala, M.; Gonzalez, M.B.; Campabadal, F. Methodology for the characterization and observation of filamentary spots in HfOx-based memristor devices. Microelectron. Eng. 2020, 223, 111232. [Google Scholar] [CrossRef]
  67. Rodriguez-Fernandez, A.; Suñé, J.; Miranda, E.; Gonzalez, M.B.; Campabadal, F.; Al Chawa, M.M.; Picos, R. SPICE model for the ramp rate effect in the reset characteristic of memristive devices. In Proceedings of the 2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS), Barcelona, Spain, 22–24 November 2017; pp. 1–4. [Google Scholar]
  68. Miranda, E. Compact model for the major and minor hysteretic I–V loops in nonlinear memristive devices. IEEE Trans. Nanotechnol. 2015, 14, 787–789. [Google Scholar] [CrossRef]
Figure 1. Example of an arbitrary typical DRM. The three curves correspond to three different situations: the blue line presents three intersection points with zero, thus showing that the system, for that case, has two unstable and a stable points. The red line shows a case where the variable x is always decreasing, while the green line shows the opposite case where x is always growing.
Figure 1. Example of an arbitrary typical DRM. The three curves correspond to three different situations: the blue line presents three intersection points with zero, thus showing that the system, for that case, has two unstable and a stable points. The red line shows a case where the variable x is always decreasing, while the green line shows the opposite case where x is always growing.
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Figure 2. Measured values of the conductance G (in S), for different amplitudes of the applied input waveform.
Figure 2. Measured values of the conductance G (in S), for different amplitudes of the applied input waveform.
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Figure 3. Experimental DRM showing only a subset of the measured curves. Notice that this figure can be reduced to Figure 2 if the dG/dt axis is ignored.
Figure 3. Experimental DRM showing only a subset of the measured curves. Notice that this figure can be reduced to Figure 2 if the dG/dt axis is ignored.
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Figure 4. Surface fitting of the data in Figure 3 using a polynomial function. The lines correspond to the measured data, while the mesh corresponds to the fitting.
Figure 4. Surface fitting of the data in Figure 3 using a polynomial function. The lines correspond to the measured data, while the mesh corresponds to the fitting.
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Figure 5. Results obtained using Equation (15) with the coefficients in Table 1 into Equation (13). Lines correspond to the model, while the crossed are the measured data.
Figure 5. Results obtained using Equation (15) with the coefficients in Table 1 into Equation (13). Lines correspond to the model, while the crossed are the measured data.
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Table 1. Coefficients for the approximation of g G in Equation (15). The units for coeffient p i j are s 1 V i Ω j 1 .
Table 1. Coefficients for the approximation of g G in Equation (15). The units for coeffient p i j are s 1 V i Ω j 1 .
CoefficientValue95% Confidence
p 00 −3.19 × 10 4 (−5.93 × 10 4 , −4.56 × 10 5 )
p 10 3.77 × 10 4 (−1.03 × 10 4 , 8.57 × 10 4 )
p 01 3.42 × 10 1 (−7.88 × 10 2 , 7.63 × 10 1 )
p 20 1.96 × 10 3 (1.04 × 10 3 , 2.88 × 10 3 )
p 11 −4.70 × 10 1 (−9.22 × 10 1 , −1.84 × 10 2 )
p 02 −1.24 × 10 2 (−3.43 × 10 2 , 9.56 × 10 1 )
p 30 3.52 × 10 3 (2.18 × 10 3 , 4.87 × 10 3 )
p 21 2.68 × 10 1 (−2.57 × 10 1 , 7.93 × 10 1 )
p 12 2.28 × 10 2 (8.40 × 10 1 , 3.72 × 10 2 )
p 03 1.33 × 10 4 (−3.44 × 10 4 , 6.10 × 10 4 )
p 40 2.26 × 10 3 (1.37 × 10 3 , 3.14 × 10 3 )
p 31 −1.41 × 10 1 (−5.16 × 10 1 , 2.34 × 10 1 )
p 22 −1.62 × 10 2 (−2.46 × 10 2 , −7.74 × 10 1 )
p 13 −3.65 × 10 4 (−5.37 × 10 4 , −1.93 × 10 4 )
p 04 −4.13 × 10 4 (−4.57 × 10 6 , 4.49 × 10 6 )
p 50 4.40 × 10 4 (2.31 × 10 4 , 6.48 × 10 4 )
p 41 −2.46 × 10 1 (−3.50 × 10 1 , −1.42 × 10 1 )
p 32 −2.41 × 10 1 (−4.71 × 10 1 , −9.93 × 10 1 )
p 23 1.15 × 10 4 (7.47 × 10 3 , 1.55 × 10 4 )
p 14 1.80 × 10 6 (1.11 × 10 6 , 2.49 × 10 6 )
p 05 −3.56 × 10 7 (−1.92 × 10 8 , 1.20 × 10 8 )
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MDPI and ACS Style

Picos, R.; Stavrinides, S.G.; Al Chawa, M.M.; de Benito, C.; Dueñas, S.; Castan, H.; Hatzikraniotis, E.; Chua, L.O. Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map. Electronics 2022, 11, 1672. https://doi.org/10.3390/electronics11111672

AMA Style

Picos R, Stavrinides SG, Al Chawa MM, de Benito C, Dueñas S, Castan H, Hatzikraniotis E, Chua LO. Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map. Electronics. 2022; 11(11):1672. https://doi.org/10.3390/electronics11111672

Chicago/Turabian Style

Picos, Rodrigo, Stavros G. Stavrinides, Mohamad Moner Al Chawa, Carola de Benito, Salvador Dueñas, Helena Castan, Euripides Hatzikraniotis, and Leon O. Chua. 2022. "Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map" Electronics 11, no. 11: 1672. https://doi.org/10.3390/electronics11111672

APA Style

Picos, R., Stavrinides, S. G., Al Chawa, M. M., de Benito, C., Dueñas, S., Castan, H., Hatzikraniotis, E., & Chua, L. O. (2022). Empirical Characterization of ReRAM Devices Using Memory Maps and a Dynamic Route Map. Electronics, 11(11), 1672. https://doi.org/10.3390/electronics11111672

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