1. Introduction
At present, monolithic microwave integrated circuits (MMICs) are designed and produced using electronic design automation (EDA) tools (
Figure 1) [
1,
2,
3]. Large factories offering MMIC production services (called foundries) must provide their customers with a process design kit, so that the customers can design MMICs for their own applications.
The Institute of Nanoengineering in Electronics, Spintronics and Photonics of MEPhI University has developed a semiconductor process for the production of different types of circuits and semiconductor devices, including RF transistors and MMICs. There is a need to develop a PDK for the available processes for its own and collaborating design centers (by analogy with foundries).
As the researchers and engineers of MEPhI developed a 0.15 μm GaAs pHEMT process for low-noise MMICs, we decided to make a PDK for this process first. This research was partially funded by JSC ICC Milandr (Russia).
The fundamentals of modeling semiconductor devices and integrated circuits are described in books [
4,
5,
6,
7,
8]. Some of the applied techniques can be found in [
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22]. This article discusses the methodology, techniques, and procedure used for PDK development. Comparison of experimental measurement values and simulation results obtained with the developed models showed good agreement. Several low-noise amplifiers with different topologies were designed using the developed PDK, and the parameters were calculated using EDA AWR Microwave Office.
2. Materials and Methods
MMIC consists of different elements: active (transistor, diode) and passive ones (resistor, capacitor, inductor, transmission line, contact pad, via hole, and others); see
Figure 2.
Typically, a PDK consists of electrical models of active and passive elements, topological element cells, material parameters (for electromagnetic analysis), topological tolerances, topology check rules, special objects and symbols, and support information for the user.
In this paper, the PDK was developed through the following steps:
Detailed study of the process and topological design rules;
Design of topology templates for elements;
Development of test structures for characterization of elements;
Development of circuit fragments for initial verification of element models;
Fabrication of test structures and circuit fragments;
Measurement of test structures and circuit fragments, mathematical processing of measurement results;
Development of electrical and topological models of elements;
Initial verification of element models;
Development of library structure of elements, setting up electromagnetic analysis and topology verification tools;
Preparation of reference information;
Release of the first version of PDK;
Design of test microwave devices for validation of the first version of PDK.
After the first release of the PDK, this cycle is repeated several times to increase the accuracy of the models, add new elements, actualize the process changes, etc.
3. Results
The first PDK development stage included a detailed investigation of the technology. The MEPhI technology has the following features: AlGaAs/InGaAs pHEMT structure, 3-inch substrate diameter, metalized via holes to the backside of the substrate, backside metallization, substrate thinning up to 100 microns, a depletion-mode transistor with a gate length of 0.15 μm, three levels of metallization, MIM capacitors (250 pF/mm
2), semiconductor resistors (170 ohm/square), and thin-film resistors (50 ohm/square). The main parameters of the transistor are listed in
Table 1.
In the next step, we developed topology templates of basic MMIC elements.
These were used to design test structures to characterize active and passive elements, as well as fragments of matching and correcting networks to verify passive element models at the first iteration of PDK development.
Then, GaAs pHEMT wafers were produced and processed. Each wafer consists of repeated frames (
Figure 3) that include:
Active elements;
Passive elements;
Transmission line segments;
Structures for de-embedding;
Fragments of circuits for verification of electromagnetic analysis;
Process control monitor (PCM) tests.
After production, on-wafer probe measurements of the test structures and circuit fragments were carried out. S-parameters were measured for passive test structures. For active test structures, we measured the following parameters:
IV-curves;
S-parameters;
Noise-figure.
The measurement results for each element were processed by:
The next step was to construct electrical models of active elements for amplifier applications:
Small-signal noise models of transistors (
Figure 4);
Non-linear models of transistors (
Figure 5).
The measured and simulated small-signal S-parameters and 50-ohm noise figures for a 4 × 50 μm transistor are shown in
Figure 6.
Equivalent circuit models were constructed for the passive elements, e.g., a spiral inductor equivalent circuit shown in
Figure 7.
The calculated parameters of models of several inductors are given in
Table 2.
The methods used to extract the parameters of active and passive element models are described in detail in [
23,
24,
25].
To stimulate the microstrip transmission lines, we set the following substrate parameters and inhomogeneities: relative dielectric constant 12.9, substrate thickness 100 μm, conductor thickness 3 μm, and loss tangent of dielectric 0.001.
After constructing the electrical models of active and passive elements, we developed the topology models with fixed and scalable geometry. Some examples of element topological models (shown in AWR Microwave Office) are presented in
Figure 8.
The developed electrical and topological models of passive elements were verified using the following datasets:
S-parameter measurement results of test structures of individual elements;
S-parameter measurement results of network fragments for matching and correction (consist of several passive elements);
Electromagnetic analysis results;
Topological design rules.
At this stage, the final settings of electromagnetic analysis tools were adjusted.
The final stages were the compilation of support information for the user and the release of the first version of PDK.
Figure 9 illustrates an example of an AWR Microwave Office project with the developed PDK.
For validation of the first version of PDK, three low-noise amplifiers (LNA) were designed:
Single-stage LNA;
Two-stage LNA;
Three-stage LNA.
As an example, the electrical scheme, designed topology, and simulated S-parameters of the three-stage LNA are shown in
Figure 10,
Figure 11 and
Figure 12, respectively. The main parameters of MMIC, obtained through simulation, are presented in
Table 3.
The three developed LNAs were included in the production frame along with the line fragments, test structures, and process supplement symbols (
Figure 13).
Then, this frame was multiplied on the wafer. Several wafers are now in production.
4. Discussion
As was shown in the previous section, the parameters and curves that were simulated for the PDK elements showed good agreement with the experimental data. The developed PDK contains models and information that are enough for the development and production of low-noise amplifiers using the MEPhI GaAs 0.15 pHEMT process.
Further research proposals are suggested to extend the PDK to other MMICs:
Buffer amplifiers;
Switches;
Attenuators;
Phase shifters;
Frequency converters;
Power limiters.
The developed PDK can be used in well-known and widespread EDA tools from AWR. The PDK will simplify the technology transfer to other production sites, if this is needed in the future. It can also be used to make a complete design–production–testing cycle to educate MMIC design engineers. The obtained results showed that the methods used in this paper are suitable for PDK development and can be applied in other, similar technologies at other production or research sites.
Author Contributions
Conceptualization, D.D.Z., I.M.D. and I.S.V.; methodology, I.M.D. and I.S.V.; measurement result processing, A.S.S., A.A.P. and I.M.D.; modeling of electronic components, A.S.S., A.A.P. and I.M.D.; design of MMICs and test structures, I.M.D., A.S.S.; data curation, A.A.G.; writing—original draft preparation, D.D.Z.; writing—review and editing, I.M.D. and D.S.B.; supervision, N.I.K.; project administration, D.D.Z. and D.S.B.; funding acquisition, D.D.Z. and D.S.B. All authors have read and agreed to the published version of the manuscript.
Funding
The article was prepared as part of implantation of the «Leading research center (LRC) «Trusted Sensor Systems», financial support provided by Ministry of Digital Development, Communications and Mass Media of the Russian Federation and Russian Venture Company (RVC JSC) (Agreement №009/20 dated 04/10/2020).
Acknowledgments
The authors express their gratitude to the AVK Design Team and its leading engineer Alexey V. Kondratenko for technical support during the development and testing of PDK.
Conflicts of Interest
The authors declare no conflict of interest.
Abbreviations
pHEMT | Pseudomorphic high-electron mobility transistor |
PDK | Process design kit |
MMIC | Monolithic microwave integrated circuit |
EDA | Electronic design automation |
RF | Radio frequency |
MIM | Metal insulator metal |
PCM | Process control monitor |
LNA | Low-noise amplifiers |
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Figure 1.
MMIC development process.
Figure 1.
MMIC development process.
Figure 2.
MMIC topology example.
Figure 2.
MMIC topology example.
Figure 3.
One of the 3-inch wafers (left-upper corner), wafer fragment (right side), transistor topology on the wafer (left-down corner).
Figure 3.
One of the 3-inch wafers (left-upper corner), wafer fragment (right side), transistor topology on the wafer (left-down corner).
Figure 4.
Small-signal equivalent circuit for the simulation of GaAs pHEMT.
Figure 4.
Small-signal equivalent circuit for the simulation of GaAs pHEMT.
Figure 5.
Equivalent circuit for a nonlinear model of GaAs pHEMT.
Figure 5.
Equivalent circuit for a nonlinear model of GaAs pHEMT.
Figure 6.
A comparison between measured and simulated S-parameters, and 50-ohm noise figure for a 4 × 50 μm pHEMT at the bias point Vds = 3 V, Ids = 20 mA: (a) S11—input reflection coefficient, S22—output reflection coefficient; (b) 50-ohm noise figure; (c) S21—small-signal gain; (d) S12—reverse transmission coefficient.
Figure 6.
A comparison between measured and simulated S-parameters, and 50-ohm noise figure for a 4 × 50 μm pHEMT at the bias point Vds = 3 V, Ids = 20 mA: (a) S11—input reflection coefficient, S22—output reflection coefficient; (b) 50-ohm noise figure; (c) S21—small-signal gain; (d) S12—reverse transmission coefficient.
Figure 7.
Equivalent circuit of a circular spiral inductor.
Figure 7.
Equivalent circuit of a circular spiral inductor.
Figure 8.
Topological models, as shown in AWR Microwave Office, from left to right: pHEMT, circular spiral inductor, capacitor, resistors, transmission line.
Figure 8.
Topological models, as shown in AWR Microwave Office, from left to right: pHEMT, circular spiral inductor, capacitor, resistors, transmission line.
Figure 9.
Several windows in AWR Microwave Office showing different aspects of the developed PDK in EDA.
Figure 9.
Several windows in AWR Microwave Office showing different aspects of the developed PDK in EDA.
Figure 10.
Electrical scheme of the three-stage LNA developed using the first release of PDK.
Figure 10.
Electrical scheme of the three-stage LNA developed using the first release of PDK.
Figure 11.
Designed topology of the three-stage LNA developed using the first release of PDK.
Figure 11.
Designed topology of the three-stage LNA developed using the first release of PDK.
Figure 12.
Simulated S-parameters of the three-stage LNA developed using the first release of PDK.
Figure 12.
Simulated S-parameters of the three-stage LNA developed using the first release of PDK.
Figure 13.
The composed frame (7.7 mm × 10.2 mm) that contains three LNAs, different line fragments, and test structures.
Figure 13.
The composed frame (7.7 mm × 10.2 mm) that contains three LNAs, different line fragments, and test structures.
Table 1.
The main transistor parameters.
Table 1.
The main transistor parameters.
Parameter | Value | Units | Note |
---|
Drain current | 270 | mA/mm | At 0 gate-source voltage |
Transconductance | 500 | mS/mm | |
Drain breakdown voltage | 7 | V | |
Gate threshold voltage | −0.8 | V | |
Maximum generation frequency | 120 | GHz | For 4 × 50 μm |
Minimum noise figure | 1.3 | dB | For 4 × 50 μm at 12 GHz |
Table 2.
Parameters of equivalent circuit models of circular spiral inductors.
Table 2.
Parameters of equivalent circuit models of circular spiral inductors.
Name | Lpr, nH | Lsr, nH | Rsr, ohm | Cfb, pF | Csub1, pF | Rsub1, ohm | Csub2, pF | Rsub2, ohm |
---|
L10101P5 | 0.2 | 0.269 | 0.8 | 0.0018 | 0.02016 | 5 | 0.02016 | 5 |
L10102P5 | 0.316 | 0.8194 | 1.8 | 0.00228 | 0.03531 | 7.5 | 0.02931 | 7.5 |
L10103P5 | 0.41 | 1.773 | 2.8 | 0.002 | 0.05 | 9 | 0.0388 | 7 |
L10104P5 | 0.71 | 3.065 | 4 | 0.002 | 0.0632 | 9 | 0.047 | 9 |
L10105P5 | 0.75 | 5 | 6 | 0.0015 | 0.07456 | 14 | 0.05536 | 10 |
L10106P5 | 0.75 | 7.5 | 6.4 | 0.002 | 0.0917 | 12 | 0.068 | 11 |
L10107P5 | 0.79 | 10.4 | 8.14 | 0.0022 | 0.1176 | 12 | 0.08558 | 12 |
Table 3.
The main parameters of the three-stage LNA developed using the first release of PDK.
Table 3.
The main parameters of the three-stage LNA developed using the first release of PDK.
Parameter | Simulated Value | Units |
---|
Frequency range | 8–12 | GHz |
Small-signal gain, min | 26 | dB |
Input and output reflection coefficient, max | −20 | dB |
Noise figure, max | 1.7 | dB |
Output power at 1 dB compression point, min | 13 | dBm |
Supply voltage | 5 | VDC |
DC current for supply bus | 85 | mA |
Die size | 1.2 × 2.2 | mm2 |
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