# Influence of Parasitic Resistances on the Input Resistance of Buck and Boost Converters in Maximum Power Point Tracking (MPPT) Systems

^{*}

## Abstract

**:**

## 1. Introduction

_{IN}to be equal to the internal resistance of the panel. When an MPPT system features a DC/DC converter, the input resistance is modified by the duty cycle of the PWM signal. However, since the internal resistance of a PV panel changes with the temperature and irradiance level, the MPPT system needs to constantly monitor the output power of the PV panel and modify the duty cycle of the converter in order to drain the maximum amount of energy [5].

_{IN}of buck and boost converters involves a function of their load resistance R

_{LOAD}and the duty cycle D

_{A}as shown in Equations (1) and (2) [5]:

_{IN}> R

_{LOAD}). A similar statement exists for boost converters, except that its input resistance is always smaller than its load resistance (R

_{IN}< R

_{LOAD}). This implies some restrictions regarding the implementation of these converters, which were previously explained and discussed in detail [5].

## 2. Parasitic Resistances in DC/DC Converters and Their Impact on Converter Input Resistance

_{L}is the ESR of an inductor, R

_{D}is the static resistance of a diode, and R

_{T}is the ON resistance of a transistor.

_{IN}depends on the relation between the load resistance R

_{LOAD}and the value R

_{Z}, described in Equation (5). Since the parasitic resistances should be kept relatively small to achieve high converter efficiency, their influence on the converter input resistance is negligible in most cases. However, for heavy loads, the influence might be noticeable.

_{L}= 1 Ω, R

_{D}= 0.141 Ω, R

_{T}= 0.012 Ω, and R

_{LOAD}= 10 Ω. The parasitic values were chosen based on the measurement of the real components using an RLC bridge PM6306 (Fluke Corporation, Everett, WA, USA). To minimize the influence of any additional resistance, the PCB layout incorporated relatively wide and short traces. The results of the calculations are presented in Figure 4a.

_{L}= 0.5 Ω, R

_{D}= 0.141 Ω, R

_{T}= 0.012 Ω, and R

_{LOAD}= 10 Ω. All of the parameters are visualized in Figure 4b.

_{MPP}. An example of a panel maximum power point resistance change caused by temperature fluctuations is provided in Figure A3. The provided example shows a 30% drop in the R

_{MPP}over a 60 °C change in temperature which, combined with the influence of the parasitic resistances, can lead to a less efficient MPPT system.

## 3. Materials and Methods

_{PWM}= 100 kHz, L = 1000 μH, C

_{IN}= 100 μF, C = 330 μF, R

_{L}= 0.9 Ω, R

_{SENSE}= 0.1 Ω, R

_{D}= 0.141 Ω, R

_{T}= 0.012 Ω, an MBRS340T3 diode (ON Semiconductor

^{®}, Phoenix, AZ, USA), and an NVD5867NLT4GT transistor (ON Semiconductor

^{®}, Phoenix, AZ, USA). Each parameter is visualized in Figure 5.

## 4. Results

_{AMPP}hereafter. The solid lines represent the input resistances that were calculated for an ideal converter using the equation that did not include parasitic resistances (Equation (1)). The D

_{A}value in the equation was equal to the duty cycle at the maximum power point D

_{AMPP}, as mentioned above. The same duty cycle was used to calculate the input resistance of a non-ideal converter (including the parasitic resistances), which was described in Equation (3). The calculations for the non-ideal converter are indicated in Figure 8 by the dashed lines. The curves were measured and calculated for two PV panels (5 W and 10 W) and two load resistances (5 Ω and 10 Ω). More details can be found in the caption to Figure 8. Detailed parameters of the PV panels are provided in the Appendix A (Table A1 and Table A2).

## 5. Discussion

_{MPP}experiences an error caused by wrong identification of the maximum power point, it would influence the accuracy and cause differences between the values of the input resistance. The differences would be observed between the values calculated with Equations (1–4) and in the ratio between the measured values of the voltage and current. A more detailed description of this problem is provided in Appendix C.

_{MPP}values), the accuracy of the measurements was acceptable, and they could be used for evaluation of the presented models.

## 6. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## Appendix A

_{in-i}is the theoretical value of the input resistance calculated with Equations (1) or (3) and where R

_{in-ni}is the theoretical value of the input resistance calculated with Equations (2) or (4).

_{A}. The curves were drawn for various ratios (from 0.001 to 0.1) between a parasitic resistance and the load resistance of the converter. Similar calculations were performed for the transistor and diode resistances (Figure A1b,c, respectively). The figures show that the influence of the inductor resistance on the input resistance does not change with the duty cycle, and it depends only on the ratio between the parasitic resistance and the load resistance of the converter. As for the other parasitic resistances, the influence depends on the duty cycle. It seems that the transistor resistance does not have much of an impact on the input resistance of a converter for lower duty cycle values, whereas the diode resistance has less influence for higher values of D

_{A}. Nevertheless, the total error between the input resistances calculated with and without the parasitic resistances does not exceed the ratio between R

_{Z}, calculated with Equation (5), and the load resistance R

_{LOAD}. The analysis shows that if the parasitic resistances of a buck converter are relatively small (i.e., below 1% of the load resistance), then their impact on the input resistance of the buck converter is also small for all duty cycle values. In such cases, the parasitic resistances can be omitted in Equation (3).

**Figure A1.**Influence of a specific parasitic resistance on the input resistance of a buck converter, for different duty cycle values. The figures represent a percentage error calculated with Equation (A1) for different values of: (

**a**) inductor resistance R

_{L}; (

**b**) transistor resistance R

_{T}; (

**c**) diode resistance R

_{D}.

_{A}= 75%, it can reach up to 16%. This indicates that boost converters are more sensitive to parasitic resistances than buck converters. The influence of the parasitic resistances on the input resistances of a boost converter is noticeable for higher duty cycles even if the parasitic resistances are relatively small.

**Figure A2.**Influence of a specific parasitic resistance on the input resistance of a boost converter, for different duty cycle values. The figures represent a percentage error calculated with Equation (A1) for different values of: (

**a**) inductor resistance R

_{L}; (

**b**) transistor resistance R

_{T}; (

**c**) diode resistance R

_{D}.

**Figure A3.**Change in the panel’s maximum power point resistance caused by temperature (measured for a 10 W panel).

Name | Symbol | Value | Unit |
---|---|---|---|

Dimension | W × L | 290 × 330 | mm |

Peak power | P_{max} | 10 | W |

Maximum power current | I_{mp} | 0.57 | A |

Maximum power voltage | V_{mp} | 17.49 | V |

Short circuit current | I_{sc} | 0.61 | A |

Open circuit voltage | V_{oc} | 21.67 | V |

Name | Symbol | Value | Unit |
---|---|---|---|

Dimension | W × L | 231 × 186 | mm |

Peak power | P_{max} | 5 | W |

Maximum power current | I_{mp} | 0.30 | A |

Maximum power voltage | V_{mp} | 16.5 | V |

Short circuit current | I_{sc} | 0.34 | A |

Open circuit voltage | V_{oc} | 21.0 | V |

## Appendix B

^{2}was achieved at 70% of the bulbs’ maximum power and a distance of 55 cm from the light source.

**Figure A5.**A measuring system incorporating a PIC32MZ microcontroller, used to control the buck converter and measure the input current, input voltage, and temperature of the panel.

## Appendix C. Analysis of the Errors

- δ
_{m-i}: error between the measurement results and the model of an ideal converter (Equation (1)); - δ
_{m-ni}: error between the measurement results and the model of a non-ideal converter (Equation (3)).

_{th}is the theoretical value of input resistance calculated with Equations (1) or (3) and R

_{m}is the input resistance calculated as the ratio between the measured values of the voltage and the current.

Irradiance W/m ^{2} | 5 Ω Load Resistance | 10 Ω Load Resistance | ||
---|---|---|---|---|

δ_{m-i}% | δ_{m-ni}% | δ_{m-i}% | δ_{m-ni}% | |

85 | - | - | 19.8 | 10.8 |

115 | 33 | 17.9 | 15.2 | 5.71 |

153 | 27.5 | 11.3 | 16 | 6.69 |

193 | 25.7 | 9.08 | 14.5 | 5.04 |

237 | 23.3 | 6.16 | 13.8 | 4.32 |

289 | 22.5 | 5.25 | 12.9 | 3.33 |

345 | 22.1 | 4.85 | 12.1 | 2.4 |

406 | 21.5 | 4.17 | 12 | 2.31 |

465 | 21 | 3.57 | 11.4 | 1.75 |

540 | 20.8 | 3.3 | 11.2 | 1.47 |

617 | 20.2 | 2.64 | 11 | 1.30 |

692 | 20.3 | 2.82 | 10.9 | 1.26 |

776 | 19.8 | 2.23 | 10.8 | 1.20 |

860 | 19.7 | 2.14 | 10.6 | 0.995 |

940 | 19.6 | 2.01 | 10.5 | 0.908 |

Irradiance W/m ^{2} | 5 Ω Load Resistance | 10 Ω Load Resistance | ||
---|---|---|---|---|

δ_{m-i}% | δ_{m-ni}% | δ_{m-i}% | δ_{m-ni}% | |

85 | 29 | 13.1 | 18 | 8.95 |

115 | 25.8 | 9.22 | 15.9 | 6.56 |

153 | 24.1 | 7.22 | 14 | 4.57 |

193 | 23 | 5.89 | 13.1 | 3.56 |

237 | 22.2 | 5 | 12.3 | 2.76 |

289 | 21.7 | 4.41 | 11.8 | 2.19 |

345 | 20.7 | 3.31 | 11.1 | 1.46 |

406 | 20.3 | 2.86 | 10.9 | 1.32 |

465 | 20.1 | 2.66 | 11 | 1.48 |

540 | 19.9 | 2.42 | 11 | 1.47 |

617 | 19.6 | 2.13 | 10.7 | 1.15 |

692 | 19.5 | 2.08 | 11.2 | 1.74 |

776 | 19.7 | 2.39 | 11.8 | 2.42 |

860 | 20 | 2.76 | 11.7 | 2.38 |

940 | 19.5 | 2.29 | 11.8 | 2.52 |

## Appendix D

_{MPP}(Figure A7b), an adjacent duty cycle (Figure A7c) can be taken as the maximum power point value). If the duty cycle has a relatively large value, the error caused by the input resistance miscalculation is not significant. However, if the duty cycle is low, then a wrong D

_{MPP}value can cause large differences between the measured and calculated input resistances.

**Figure A7.**Impact of fluctuations in the power curve on the identification of the duty cycle at the maximum power point. (

**a**) A power fluctuation. (

**b**) Duty cycle at the actual maximum power point. (

**c**) Duty cycle at the fluctuation.

**Figure A8.**Influence of 0.5% deviation in the duty cycle on the input resistance calculations of a buck converter.

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**Figure 4.**Input resistance of the (

**a**) buck and (

**b**) boost converters as a function of the duty cycle. The solid line is the ideal model, and the dashed line is the model with parasitic resistances.

**Figure 5.**A dedicated system for the measurement of the I-V characteristics of a photovoltaic panel and searching for the maximum power point resistance.

**Figure 8.**Input resistance of a buck converter at the maximum power point for different irradiance levels: (

**a**) PV 10 W, R

_{LOAD}= 10 Ω; (

**b**) PV 10 W, R

_{LOAD}= 5 Ω; (

**c**) PV 5 W, R

_{LOAD}= 10 Ω; and (

**d**) PV 5 W, R

_{LOAD}= 5 Ω. The solid line is the ideal model, the dashed lines are the model with parasitic resistances, and the dots represent the experimental data (measurements).

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**MDPI and ACS Style**

Walczak, M.; Bychto, L.
Influence of Parasitic Resistances on the Input Resistance of Buck and Boost Converters in Maximum Power Point Tracking (MPPT) Systems. *Electronics* **2021**, *10*, 1464.
https://doi.org/10.3390/electronics10121464

**AMA Style**

Walczak M, Bychto L.
Influence of Parasitic Resistances on the Input Resistance of Buck and Boost Converters in Maximum Power Point Tracking (MPPT) Systems. *Electronics*. 2021; 10(12):1464.
https://doi.org/10.3390/electronics10121464

**Chicago/Turabian Style**

Walczak, Marcin, and Leszek Bychto.
2021. "Influence of Parasitic Resistances on the Input Resistance of Buck and Boost Converters in Maximum Power Point Tracking (MPPT) Systems" *Electronics* 10, no. 12: 1464.
https://doi.org/10.3390/electronics10121464