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Review

Memcapacitor and Meminductor Circuit Emulators: A Review

1
Department of Electronics and Computer Technology, Faculty of Sciences, University of Granada, 18071 Granada, Spain
2
Pervasive Electronics Advanced Research Laboratory, University of Granada, 18071 Granada, Spain
3
Institute of Space and Astronautical Science, Japan Aerospace Exploration Agency, Kanagawa 252-5210, Japan
4
Biochemistry and Electronics as Sensing Technologies Group, University of Granada, 18071 Granada, Spain
*
Authors to whom correspondence should be addressed.
Electronics 2021, 10(11), 1225; https://doi.org/10.3390/electronics10111225
Submission received: 15 April 2021 / Revised: 16 May 2021 / Accepted: 18 May 2021 / Published: 21 May 2021
(This article belongs to the Special Issue Memristive Devices and Systems: Modelling, Properties & Applications)

Abstract

:
In 1971, Prof. L. Chua theoretically introduced a new circuit element, which exhibited a different behavior from that displayed by any of the three known passive elements: the resistor, the capacitor or the inductor. This element was called memristor, since its behavior corresponded to a resistor with memory. Four decades later, the concept of mem-elements was extended to the other two circuit elements by the definition of the constitutive equations of both memcapacitors and meminductors. Since then, the non-linear and non-volatile properties of these devices have attracted the interest of many researches trying to develop a wide range of applications. However, the lack of solid-state implementations of memcapacitors and meminductors make it necessary to rely on circuit emulators for the use and investigation of these elements in practical implementations. On this basis, this review gathers the current main alternatives presented in the literature for the emulation of both memcapacitors and meminductors. Different circuit emulators have been thoroughly analyzed and compared in detail, providing a wide range of approaches that could be considered for the implementation of these devices in future designs.

1. Introduction

Prof. Leon L. Chua presented in 1971 the theoretical definition of the two terminal device which defined the relation between the time-integral of its input voltage (ϕ, flux) and its electric charge (q) [1]. This element was called memristor given that its behavior corresponds to a nonlinear resistor in which the current through its terminals at an instant t1 depends not only on the input voltage at t1, but also on the input voltage from t = −∞ to t = t1 (i.e., a resistor whose resistance depends on the history of its input). It was also demonstrated that this element was passive and that, contrary to capacitors and inductors, it cannot store energy. Therefore, as a manifestation of these characteristics, the current of the memristor is zero whenever the input voltage is zero and, for a periodic current input, the memristive systems show a “closed pinched hysteretic loop” in their i-v characteristic [2].
However, until 2008 the investigation into the memristor concept was very limited due to the lack of a solid-state implementation of this device [3,4,5,6]. However, it was in 2008 that a group of researchers of Hewlett Packard Labs announced the first solid-state device fulfilling the theoretical definition of the memristor [7], which constituted a turning point in the research of memristors and its applications. Since then, thanks to its non-volatility and non-linear behavior, the memristor is expected to play a disruptive role in diverse fields, such as neuromorphic circuits and neural networks [8,9,10,11,12], analog programmable circuits and arithmetic circuits [13,14,15,16], logic gates [17], crossbar classifiers [18,19,20], adaptive filters [21], chaotic circuits [22,23] and non-volatile memories [24,25,26]. This had led to intensive studies of the memristive behavior in a wide range of materials, such as transition metal oxides (e.g., NiO and TaOx) [27,28], polymers [29], 2D materials [30] or graphene oxide [31,32,33], among others. The success of the memristor led Di Ventra, Pershin and Chua to extended the concept of the memory circuit elements to capacitive and inductive systems, thus defining the memcapacitor and the meminductor, respectively [34]. In this way, together with the memristor, they established the electrical relations between the time-integral of the charge (σ) and the flux (ϕ) with the memcapacitor; and between the time-integral of the flux (ρ) and the charge (q) with the meminductor (see Figure 1).
As in the case of memristors, memcapacitors and meminductors also present a memory ability manifested through a closed pinched hysteresis loop in the characteristic of their two constitutive variables; with the additional advantage of being capable of storing energy in capacitive and inductive forms, respectively [36]. These devices are expected to be the key for the emergence of a new form of computation called neuromorphic computing, since their essential properties are envisaged to allow them to mimic biological computing. Thanks to their ability to both store and process information simultaneously, computers based on these mem-elements would offer capabilities and power consumption comparable to those of the human brain [37,38,39]. However, the lack of solid-state implementations of memcapacitors and meminductors hinders the exploitation of the prominent features of these devices in practical implementations. Due to this, in recent years there has been an emerging line of research dedicated to the development of emulators of these devices, i.e., circuits that satisfy the constitutive equations of the emulated mem-element.
In this context, this work reviews the different models and practical memcapacitor and meminductor emulators presented in the literature. Thus, the different approaches followed for the emulation of the memory effect and nonlinear behavior of these devices have been analyzed in detail and in a comparative way. The manuscript is structured as follows: after this introduction, Section 2 presents the concept of memcapacitance as well as the different approaches proposed for the emulation of memcapacitors. Similarly, Section 3 introduces the concept of meminductive system and the different alternatives adopted for the emulation of meminductors. Moreover, those circuits that based on the same design are able to emulate either a memcapacitor or a meminductor with minimal changes in their design have been grouped in Section 4. Finally, the main conclusions of the different emulation approaches are drawn in Section 5.

2. Memcapacitor Emulators

The general memcapacitance (CM) is defined as the nth-order system that establishes a nonlinear relation between the charge of the device (q) and its input voltage (v) [34]. It can be either voltage-controlled or charge-controlled depending on its constitutive input variable. Therefore, an nth-order voltage-controlled memcapacitive system can be defined by Equation (1):
q ( t ) = C M ( x N ,   v , t ) · v ( t )
whereas the nth-order charge-controlled memcapacitance systems are defined by Equation (2):
v ( t ) = C M 1 ( x N ,   q , t ) · q ( t )
being x N a vector that represents the n internal state variables of the system.
The memcapacitor is a particular case of memcapacitive system with one single state variable; the voltage in the case of voltage-controlled memcapacitors, Equation (3), or the charge in the case of charge-controlled memcapacitors, Equation (4).
q ( t ) = C M [ t 0 t v ( τ ) d τ ] · v ( t )
v ( t ) = C M 1 [ t 0 t q ( τ ) d τ ] · q ( t )
In the previous equations, the initial instant of time, t0, may be selected to ensure that t 0 v ( τ ) d τ = 0 and t 0 q ( τ ) d τ = 0 , respectively.
Therefore, the memcapacitors are nothing but capacitors whose capacitance depends on the history of the constitutive variable that acts as input (either charge or voltage) and whose q-v characteristic presents a closed-pinched hysteresis loop in which v = 0 whenever q = 0 (and vice versa) for bipolar sine wave-like excitations. In this way, the memcapacitor emulators must be able to monitor the control variable (q or v) and then change its input capacitance according to the history of this variable. Therefore, the memcapacitor emulators can also be either voltage- or charge-controlled.
An example of charge-controlled memcapacitor emulator is the one proposed by Fouda and Radwan in Ref. [40], and shown in Figure 2. This circuit is based on the mathematical model of charge-controlled memcapacitance introduced by Biolek et al. [41], which is given by Equation (5):
1 C M ( t ) = 1 C 0 + k 0 t q ( τ ) τ
where C0 corresponds to the initial capacitance and k′ is the mobility factor.
This emulator is designed to achieve the behavior indicated in Equation (5) from the input current of the circuit, then:
v I N ( t ) = 1 C I N i I N ( t ) d t + v F B ( t ) = q ( t ) C I N + v F B ( t ) = q ( t ) C I N + k q ( t ) 0 t q ( τ ) d τ = q ( t ) C I N + q ( t ) R C 2 C 1 2 0 t q ( τ ) d τ
Note that this circuit requires implementing a copy of the injected current in order to obtain the input charge and its integration; besides, it is limited for the emulation of grounded memcapacitors. The circuit of Figure 2 was simulated using SPICE, demonstrating that it certainly behaves as a charge-controlled memcapacitor for a frequency of 10 Hz resulting in a good agreement with the mathematical derivation. However, there is a lack of physical implementation of this design demonstrating its actual performance.
A similar approach, but without the drawback of requiring a copy of the input current, was proposed by Sah et al. in Ref. [42] and it is presented in the circuit of Figure 3 which, following the same principle than the previous design, can be modelled as follows:
v I N ( t ) = 1 C 1 i I N ( t ) d t v F B ( t ) = q ( t ) C 1 v F B ( t ) = q ( t ) C 1 k q ( t ) 0 t q ( τ ) d τ = q ( t ) C 1 + q ( t ) R C 2 C 1 2 0 t q ( τ ) d τ
Their authors validated this proposal through both SPICE simulations and experimental results, demonstrating that this model is able to emulate a charge-controlled memcapacitor at input frequencies ranging from 0.1 Hz to 25 Hz. Hence, this circuit was able to provide a similar behavior to the previous one with a simplified design.
Another alternative to emulate grounded memcapacitors was proposed by Romero et al. in Ref. [43], although in this case for voltage-controlled memcapacitors. This emulator was implemented by relating the memcapacitance concept with the Miller effect, which accounts for the amplification of the feedback capacitance in inverting voltage amplifiers Equation (8).
Z I N = V I N I I N = V I N j ω C 1 ( V I N V O U T ) = 1 j ω C 1 ( 1 + A ) = 1 j ω C I N
On the basis of Equation (8), the authors proposed a gain, A, which depends on the time-integral of the input voltage (i.e., the flux). To do so, they used a voltage-controlled resistor, as shown in Figure 4a, to change the amplifier’s voltage gain according to the flux, hence satisfying the definition of the voltage-controlled memcapacitor, as derived in Equation (9).
d σ I N d t = q I N ( t ) = i I N ( t ) d t = C 1 d v C 1 ( t ) d t d t = C 1 ( v I N ( t ) v o u t ( t ) ) = C 1 ( 1 + A ( ϕ ) ) v i n ( t ) = C M ( ϕ ) v I N ( t )
In the case of the implementation shown in Figure 4a, the resulting memcapacitance is given by:
C M ( ϕ ) = C 1 ( 2 + R 1 R V ( ϕ ) )
Additionally, having a voltage-controlled resistor whose value changes according to the input flux (which is actually the time-integral of its input) makes also feasible the implementation of this circuit by means of a memristor, as depicted in Figure 4b. In this case, the memcapacitance could be expressed as indicated in Equation (11). Circuits such as this one are considered as electrical mutators since, according to Equation (9) and Equation (11), they transform the constitutive equation of the memristor ( R M = d ϕ d q ) into a memcapacitor with its own constitutive relation ( C M = d σ d ϕ ).
C M ( ϕ ) = C 1 ( 2 + R 1 R M ( ϕ ) )
The feasibility of this implementation was demonstrated by SPICE simulations for different input waveforms at a frequency of 50 Hz, as well as by means of its physical implementation in a field-programmable analog array (FPAA) using a controlled-gain amplifier.
Actually, the use of mutators is a common approach for the implementation of memcapacitor emulators. Another example of this kind is the design proposed by Wang et al. in Ref. [44] to emulate voltage-controlled memcapacitors. In this work, the authors relied on the use of two commercially available second-generation current conveyors (CCII) AD844 in combination with a memristor, as shown in Figure 5a.
In this circuit, the capacitor C 1 and the first CCII are used to obtain a voltage proportional to the integration of the input current (i.e., proportional to the charge). After that, the second CCII allows to convert that voltage to current, given that I Z = I and V = V + :
i 2 ( t ) = I Z 2 = v o u t 1 R 1 = 1 R 1 C 1 t 0 t i I N ( τ ) d τ = q ( t ) R 1 C 1
Therefore, the relation between the current and the voltage across the memristor can be expressed as follows:
R M ( ϕ ) = v I N ( t ) i 2 = v I N ( t ) R 1 C 1 q ( t )
As seen, from the constitutive equation of the memristor we can get the equivalent memcapacitance of this circuit, which is given by Equation (14).
C M ( ϕ ) = R 1 C 1 R M ( ϕ )
Moreover, the authors presented in this work a novel approach for dealing with both voltage-dependent resistors and/or voltage-controlled memristors (see Figure 5b). This approach is based on a LED optically coupled with a LDR (light-dependent resistor) and, as it will be shown later, it has been adopted for other authors for the implementation of their emulators. However, it is important to highlight that this approach limits the upper frequency of the emulator, since the LDRs usually suffer from a slow time-response.
The use of current conveyors to implement mutators was theoretically introduced by Pershin and Di Ventra in Ref. [45], and since then it has been adopted by many authors in the literature. One of the benefits of using current conveyors relies on the possibility to implement floating memcapacitors, as shown in Figure 6.
In the circuit of Figure 6, the current through the memristor corresponds to the current through the inductor L 1 , and therefore:
v L 1 ( t ) = i I N ( t ) · R 1 = L 1 · d ( i R M ( t ) ) d t = L 1 R M ( ϕ ) · d ( v 2 ( t ) v 1 ( t ) ) d t = L 1 R M ( ϕ ) · d ( v I N ( t ) ) d t
which indicates that this circuit emulates a voltage-controlled memcapacitor whose memcapacitance is given by Equation (16).
C M ( ϕ ) = L 1 R 1 R M ( ϕ )
A similar approach to the one proposed in this work was followed by Yu et al. for the implementation of a practical emulator based on this model [46]. However, their proposal presents the drawback of requiring the use of a custom implementation of memristor emulator, which does not guarantee the equality between the input and output current of its two terminals.
There are additional works that also make use of current conveyors for the practical implementation of emulators without the requirement of including any memristor or memristor emulator. This is the case of the grounded memcapacitor emulator presented by Yesil and Babacan in Ref. [47] and schematized in Figure 7.
In this emulator, the memcapacitance can be derived from the input current, which can be expressed as:
i I N ( t ) = C 1 d ( v I N ( t ) q ( t ) R 1 C 2 2 C 3 q ( t ) d t ) d t
and, therefore, the equivalent charge-controlled memcapacitance corresponds to the following expression (see Equation (5)):
1 C M ( q ) = 1 C 1 + 1 R 1 C 2 2 C 3 t 0 t q ( t ) d t
Moreover, this emulator could also be implemented by replacing the second CCII with an operational transconductance amplifier (OTA), as shown in Figure 7b. In that case, the resulting memcapacitance would be given by:
1 C M ( q ) = 1 C 1 + g m C 2 2 C 3 t 0 t q ( t ) d t
where g m is the OTA’s transconductance gain.
The experimental results obtained using off-the-shelf components demonstrated that the circuits of Figure 7 was able to emulate a grounded charge-controlled memcapacitor at frequencies up to 48 Hz.
The emulation of mem-elements using OTAs-based circuits is also common in the literature. For instance, in Ref. [48] Vista and Ranjan presented a memcapacitor emulator using a dual X current conveyor differential input transconductance amplifier (DXCCDITA).
Their emulator is based on a DXCCDITA modeled as indicated in Figure 8.
On this basis, the memcapacitance can be derived from the voltage at the three different passive elements, R1, C1 and C2 as:
{ v C 1 = v Z = 1 C 1 t 0 t i C 1 ( t ) d t = 1 C 1 t 0 t i Z ( t ) d t = α C 1 t 0 t i X ( t ) d t = α q I N ( t ) C 1 v C 2 ( t ) = V O + ( t ) = V B O ( t ) = 1 C 2 t 0 t i O + ( t ) d t = g m C 1 t 0 t V Z ( t ) d t = α g m C 2 C 1 t 0 t q I N ( t ) d t V Y ( t ) = V X + ( t ) β = V X ( t ) β = V O ( t ) = I O ( t ) R 1 = g m V Z ( t ) R 1 = g m α q I N ( t ) R 1 C 1
being α and β the current transfer gain and voltage transfer gain, respectively. On the other hand, the transconductance ( g m ) can be expressed as g m = K ( V B O + V D D V t ) , where V D D is the positive supply voltage and both V t and K are parameters that depend on the CMOS technology used.
Therefore, the constitutive equation of this charge-controlled memcapacitor can be obtained as:
v i n ( t ) = V X ( t ) V X + ( t ) = 2 β V Y = 2 α β K R 1 C 1 · q ( t ) · ( V D D V T + α g m C 1 C 2 t 0 t q I N ( t ) d t )
Hence, the charge-controlled memcapacitance is given by:
1 C M ( q ) = 2 α β K R 1 C 1 · ( V D D V T + α g m C 1 C 2 t 0 t q I N ( t ) d t )
The feasibility of this floating charge-controlled memcapacitor model has been verified by means of SPICE simulation, and additionally, the practicability of this model is examined in an adaptative neuromorphic structure [48].
Finally, a brief comparison of the different memcapacitor emulators presented in this section is summarized in Table 1. The comparison has been carried out in terms of their key components and mode of operation (grounded or floating), among other parameters.

3. Meminductor Emulators

The meminductance (LM) is defined as the nth-order system that establishes a nonlinear relation between the current across the terminal of the device (I) and its input flux (ϕ) [34]. It can be either current-controlled or flux-controlled depending on its constitutive input variable. Therefore, the nth-order current-controlled meminductive systems are defined by Equation (23), whereas the flux-controlled ones are defined by Equation (24).
ϕ ( t ) = L M ( x N ,   I , t ) · I ( t )
I ( t ) = L M 1 ( x N ,   ϕ , t ) · ϕ ( t )
being x N a vector which represents the n internal state variables of the system.
The meminductor is a particular case of meminductive system with one single state variable; the current in the case of current-controlled meminductors (Equation (25)) or the flux in the case of flux-controlled meminductors (Equation (26)):
ϕ ( t ) = L M [ t 0 t I ( τ ) d τ ] · I ( t )
I ( t ) = L M 1 [ t 0 t ϕ ( τ ) d τ ] · ϕ ( t )
where the initial instant of time, t0, may be selected to ensure that t 0 I ( τ ) d τ = 0 and t 0 ϕ ( τ ) d τ = 0 , respectively.
Therefore, the meminductance of meminductors depends on either the current or the flux depending on whether they are current-controlled or flux-controlled, respectively. In addition, their i-ϕ characteristic presents a closed-pinched hysteresis loop in which i = 0 whenever ϕ = 0 (and vice versa) for bipolar sine wave-like excitations. The usual approaches followed to implement meminductors emulators are quite similar to those used to emulate memcapacitors. One of these common approaches employs mutators in order to transform memristors into meminductors in both grounded and floating configurations. This is the case of the grounded meminductor shown in Figure 9, which was proposed by Wang in Ref. [49].
In this circuit, the input current can be expressed as follows:
i I N ( t ) = i R 1 + i R 1 = v I N ( t ) · ( 1 R 1 R 2 R 1 R 2 ) + ϕ I N ( t ) 2 R 2 R M ( ϕ ) C 1 · ( R 2 R 2 + 1 )
As seen, Equation (27) can be directly related to the constitutive equation of a flux-controlled meminductor with the condition of cancelling the term associated with the input voltage, i.e., with R 1 = R 1 and R 2 = R 2 . In that case, the resulting input current can be expressed as indicated in Equation (28) and, therefore, the circuit would emulate the behavior of a flux-controlled meminductance modelled by Equation (29).
i I N ( t ) = ϕ I N ( t ) R 2 R M ( ϕ ) C 1
L M ( ϕ ) = R 2 R M ( ϕ ) C 1
This simple model was verified by means of simulations; however, it was studied neither in the frequency-domain nor with an experimental implementation.
Another example of mutator, based on a gyrator, was presented by Romero et al. upon the design of the Antoniou’s circuit, as depicted in Figure 10 [35].
In this case, the meminductance can be derived from the current through R 5 , given that i R 5 = i C 4 . Therefore:
v I N ( t ) R 5 = C 4 R M R 3 R 2 · d ( i t ( t ) ) d t     i I N ( t ) = ϕ I N ( t ) · R 2 R M ( ϕ ) R 3 R 5 C 4
which indicates that the circuit behaves as a flux-controlled meminductor whose value is given by Equation (31).
L M ( ϕ ) = R M ( ϕ ) R 3 R 5 C 4 R 2
This circuit was validated using SPICE simulations for various input signals and frequencies. For the simulations, the memristor was implemented by means of a LDR, as shown in previous implementations. In addition, the practicability of the meminductor model was also exhibited with a long-term potentiation (LTP) and long-term depression (LTD) example [35]. However, this circuit also presents the disadvantage of being restricted to grounded configurations.
Following the same approach, Romero et al. also presented a floating meminductor emulator based on the Riordan gyrator. In this case, the meminductor emulator is based on the schematic shown in Figure 11.
In order to emulate a floating meminductor, the input current at the first terminal must be equal to the output current of terminal two, therefore:
I I N = I O U T = V I N · Z 2 Z 4 Z 5 Z M Z 1 = V I N · ( Z 7 Z 8 Z 6 + Z 2 Z 4 Z 7 Z M Z 5 Z 6 Z 8 1 Z 5 )
Thus, the circuit of Figure 11 needs to fulfill the following condition:
1 Z 5 = 1 Z 1 = Z 7 Z 6 Z 8
where Z i represents the impedance of the passive element i. On this basis, considering R 1 = R 2 = R 5 = R 7 = R 6 = R 8 = R , Equation (32) can be expressed as given in Equation (34).
I I N = V I N s · 1 R C 4 R M ( ϕ ( s ) )
Finally, the constitutive equation of this floating meminductor emulator can be obtained by transforming Equation (34) to the time domain:
i I N ( t ) = ϕ I N ( t ) · 1 R C 4 R M ( ϕ ) = ϕ I N ( t ) · 1 L M ( ϕ )
Therefore, with this implementation we can avoid the drawback of being subject to grounded configurations when implementing a meminductor emulator. The feasibility of this circuit was proved by a practical implementation, besides, an example of application in which the emulator is used in an adaptative low-pass filter was also shown.
As in the case of memcapacitor emulators, some authors also rely on the use of current conveyors for the implementation of their emulators. An example of this practice is the model proposed by Sah et al. in Ref. [51], whose schematic is shown in Figure 12.
In this circuit, the current relations i C 1 = i R 1 and i R 2 = i R 3 allow extracting the constitutive equation of the equivalent flux-controlled meminductor:
i I N ( t ) = ϕ I N ( t ) · R 2 C 1 R 1 R 3 R M ( ϕ )
which results in the following meminductance:
L M ( ϕ ) = C 1 R 1 R 3 R M ( ϕ ) R 2
as it was demonstrated by means of both SPICE and experimental results for different input frequencies. Alternatively, in Ref [52] the same authors presented an equivalent circuit based on two current conveyors (see Figure 13).
In this emulator, the meminductance can be derived from the relation between the current passing through the different passive elements, resistor, capacitor and memristor:
i C 1 = i R 1 = C 1 R M d i I N ( t ) d t = v I N ( t ) R 1
Therefore, the flux-controlled meminductance is given by Equation (39), as demonstrated experimentally by the authors.
i I N ( t ) = ϕ I N ( t )   R 1 R M ( ϕ ) C 1 = ϕ I N ( t ) L M ( ϕ )
Another example of mutator based on current conveyors was the circuit proposed by Liang et al. [36] to emulate floating flux-controlled meminductors (Figure 14).
As it is shown, the equivalent input meminductance of this mutator can be extracted from the current through the memristor:
i R M ( t ) = i R 2 ( t ) = ϕ I N ( t ) R 1 C 1 R M = i I N ( t ) R 3 R 2
Thus, the flux-controlled meminductance can be calculated as:
L M ( ϕ ) = R 2 R 1 C 1 R 3 R M ( ϕ )
Contrary to others practical mutators, in this work, the authors opted for the use of an analog multiplier rather than a LDR for the implementation of the memristor with the goal of achieving a better control over its memristance. Their proposed circuit was validated experimentally using a sinusoidal input voltage for two different frequencies, 28.3 Hz and 36.9 Hz. A similar approach to the followed in this latter work was presented in Ref. [53] by the same authors, and by Sozen and Cam in Ref. [54], although in this latter case the authors made use of an OTA instead of a current conveyor to obtain the input flux.
All the meminductor emulators presented so far require the use of either a memristor or a memristor emulator for their practical implementations. An alternative also based on current conveyors, but without the need of implementing a memristor, can be found in Ref. [55], in which Fouda and Radwan proposed the circuit depicted in Figure 15 to emulate grounded current-controlled meminductors.
This circuit is designed to fulfill the constitutive equation of the current-controlled meminductors as defined in Equation (25) [56]:
ϕ ( t ) = ( L 0 + k q ( t ) ) · i ( t )
being L 0 the initial inductance and k the mobility factor.
Therefore, considering that i R 3 = i C 2 , we can obtain:
ϕ I N ( t ) = ( R 1 R 3 C 2 + R 1 2 R 3 C 2 C 1 R 2 q I N ( t ) ) · i I N ( t )
By comparing the two previous equations, the current-controlled meminductance can be expressed as indicated in Equation (44), which was demonstrated by SPICE simulations and a circuit implementation at a frequency of 10 Hz.
L M ( q ) = L 0 + k q I N ( t ) = R 1 R 3 C 2 + R 1 2 R 3 C 2 C 1 R 2 q I N ( t )
Moreover, as in the case of the memcapacitors emulators, some authors resorted to the use of custom CMOS-based circuits to implement memristor-less meminductor emulators. Some examples of these circuits are the works presented by Konal and Kacar in Ref. [57], where the authors proposed a CMOS realization of multi-output OTAs for the emulation of grounded meminductors; or the work presented by Vistan and Ranjan in Ref. [58], where a voltage difference transconductance amplifier (VDTA) implemented with CMOS technology is revealed to be also used for the emulation of grounded meminductors.
Finally, a brief comparison of the different meminductor emulators presented in this section is given in Table 2. The comparison has been carried out in terms of their key components and mode of operation (grounded or floating), among other parameters.

4. Universal Emulators: Memcapacitors and Meminductor

In this section, we select some of the remarkable circuits available in the literature that are able to emulate either a memcapacitor or a meminductor by minor changes in their structure or by a proper configuration of their passive elements. For instance, the circuits shown in Figure 16a,b were proposed by Babacan for the emulation of memcapacitors and meminductors, respectively [59]. In the first case, the memcapacitance behavior is achieved by the feedback provided by the capacitors connected to the outputs of the OTA:
i I N ( t ) = C 1 d ( v I N ( t ) q I N ( t ) q I N ( t ) d t C 2 2 ) d t
and therefore, the equivalent input charge-controlled memcapacitance can be derived as:
C M ( q ) = 1 C 1 + t 0 t q I N ( τ ) d τ C 2 2
Similarly, in the circuit depicted in Figure 16b, the feedback provided in the negative input of the OTA and the combination of the voltage in both R 1 and C 1 allows to express the input voltage as follows:
v I N ( t ) = L 1 d i I N ( t ) d t + R 1 C 1 · d ( i I N ( t ) · q I N ( t ) ) d t
and therefore, according to Equation (25), the current-controlled equivalent input meminductance of this circuit corresponds to Equation (48).
ϕ I N ( t ) = ( L 1 + R 1 C 1 q I N ( t ) ) i I N ( t ) = L M ( q ) i I N ( t )
The mutation of memristive systems into universal memcapacitive and meminductive emulators have also been considered by some authors, as the case of Taşkiran et al. [60]. In this work, the authors proposed a simple current backward transconductance amplifier (CBTA) to implement a universal mutator based on the scheme exhibited in Figure 17a, whose equivalent input impedance in the Laplace domain can be expressed as:
Z I N ( s ) = V I N I I N   = Z W Z Z · 1 μ W g m α
Thus, by means of the substitutions shown in Figure 17b,c, the circuit of Figure 17a can be used to emulate either a memcapacitor or a meminductor, respectively. In that case, the equivalent input memcapacitance and meminductance can be derived as follows:
Z I N M C ( s ) = 1 R M ( ϕ ( s ) ) C 1 s · 1 μ W g m α C M ( ϕ ) = R M ( ϕ ) C 1 μ W g m α
Z I N M I ( s ) = R M ( ϕ ( s ) ) C 1 s μ W g m α L M ( ϕ ) = R M ( ϕ ) C 1 μ W g m α
where g m , μ W , and α are the transconductance gain and both voltage and current gains, respectively.
Similarly, Yu et al. [61] proposed an universal mutator based on commercial current conveyors for emulating grounded mem-elements (Figure 18a). As in the case of the circuit proposed by in Ref. [60], this mutator can be used to achieve a straightforward transformation between a memristor and either a memcapacitor or a meminductor by just modifying the combination of its different impedances. In both cases, either the memcapacitor (Figure 18b) or the meminductor (Figure 18c), the constitutive equation of the emulated device can be derived from the relation between the current and the voltage in Z 1 . Thus, for the memcapacitive ciruit:
q I N ( t ) = C 1 R 2 R 3 R 4 R M ( ϕ ) v I N ( t ) = C M ( ϕ ) · v I N ( t )
whereas for the meminductive circuit:
i I N ( t ) = R 4 R 1 R 2 R M ( ϕ ) C 3 ϕ I N ( t ) = L M 1 ( ϕ ) · ϕ I N ( t )
Recently, Yu et al. [62] revisited this circuit aiming to emulate not only grounded mem-elements but also their floating configurations, with the additional advantage of avoiding the inclusion of a memristor (or its emulator) for its implementation. The behavior of these circuits is derived from the relation between the current through the resistor R 2 and the varactor diode C V D , given that i R 2 = i C V D . On this basis, the memcapacitance of the circuit displayed in Figure 19a can be extracted as:
i R 2 ( t ) = q I N ( t ) C 1 R 2 = C V D ( ϕ ) d ( ϕ I N ( t ) R 1 C 2 V O F F S E T ) d t = C V D ( ϕ ) v I N ( t ) R 1 C 2   C M ( ϕ ) = C 1 R 2 C V D ( ϕ ) R 1 C 2
In the same way, the equivalent meminductance of the circuit shown in Figure 19b can be expressed as:
i V D ( t ) = C V D ( q ) C 1 · d q I N ( t ) d t = C V D ( q ) C 1 i I N ( t ) = ϕ I N ( t ) R 1 R 2 C 2         L M ( q ) = R 1 R 2 C 2 C V D ( q ) C 1
The feasibility of these circuits has been proved by means of experimental results for sinusoidal input signals and in a wide range of frequencies (up to 22 kHz).
A similar circuit was proposed recently by Zhao et al. [63] as an alternative of this latter emulator. The circuit presented by Zhao et al., shown in Figure 20, makes use of an additional current conveyor and an analog multiplier in order to avoid the inclusion of a varactor diode, thus also escaping from the necessity of an external offset voltage. In both cases, memcapacitor emulator (Figure 20a) and meminductor emulator (Figure 20b), the constitutive equations can be extracted relating the voltage at the output terminal Z of both current conveyors, U3 and U4. Therefore, for the memcapacitor emulator we can write:
v I N ( t ) = v I N + v I N = q I N ( t ) · ( R 4 C 0 R 5 R 2 C 0 R 3 + R 2 C 0 2 C 1 R 1 R 3 t 0 t q ( τ ) d τ )
while for the meminductor emulator:
ϕ I N ( t ) = ϕ I N + ϕ I N = i I N ( t ) · ( R 0 R 4 C 2 R 0 R 2 C 0 + R 0 2 R 2 C 0 R 1 C 1 q I N ( t ) )
Therefore, the equivalent charge-controlled memcapacitance and the current-controlled meminductance of these circuits can be expressed as indicated in Equation (58) and Equation (59), respectively.
C M 1 ( q ) = R 4 C 0 R 5 R 2 C 0 R 3 + R 2 C 0 2 C 1 R 1 R 3 t 0 t q ( τ ) d τ
L M ( q ) = R 0 R 4 C 2 R 0 R 2 C 0 + R 0 2 R 2 C 0 R 1 C 1 q I N ( t )
To sum up, Table 3 presents a brief comparison of the main features of the emulators presented in this section for both memcapacitor and meminductor configurations.

5. Conclusions

In this work, different approaches proposed in the literature for the emulation of memcapacitors and meminductors are reviewed in detail. The selected emulator circuits have been theoretically analyzed to infer their constitutive equations and their equivalent memcapacitance or meminductance. It has been reported that most of the emulators presented in the literature are based on mutators, i.e., circuits that transform the constitutive equation of memristors into the corresponding constitutive equation of the emulated device. Moreover, there are also a set of emulators that does not require the use of a memristor (or its emulator) for their implementation, providing a reliable and simpler alternative to emulate mem-elements. The main features of the analyzed mem-elements emulators have been gathered in three tables to offer a complete overview of the technological options. So that, we firmly consider that this study provides a useful guide for those researchers trying to choose the appropriate emulator restricted by the requirements and constraints of their practical implementations.

Author Contributions

Conceptualization, F.J.R., A.O., A.G., D.P.M. and N.R.; methodology, A.O., D.P.M. and N.R.; formal analysis, F.J.R. and A.O.; investigation, F.J.R. and A.T.-L.; writing—original draft preparation, F.J.R., A.O. and N.R.; writing—review and editing, A.T.-L., A.G. and D.P.M.; funding acquisition, A.O., D.P.M. and N.R. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Japanese KAKENHI through Grant Number JP18k04275 and Spanish Ministry of Education, Culture, and Sport (MECD), through Project TEC2017-89955-P and Grant Numbers: FPU16/01451 and FPU16/04043.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Chua, L. Memristor-The Missing Circuit Element. IEEE Trans. Circuit Theory 1971, 18, 507–519. [Google Scholar] [CrossRef]
  2. Chua, L.O.; Kang, S.M. Memristive Devices and Systems. Proc. IEEE 1976, 64, 209–223. [Google Scholar] [CrossRef]
  3. Chua, L.O.; Kocarev, L.; Eckert, K.; Itoh, M. Experimental Chaos Synchronization in Chua’s Circuit. Int. J. Bifurc. Chaos 1992, 2, 705–708. [Google Scholar] [CrossRef]
  4. Chua, L.O. State Space Theory of Nonlinear Two- Terminal Higher-Order Elements. J. Frankl. Inst. 1983, 316, 1–50. [Google Scholar] [CrossRef]
  5. Chua, L.O. Chua’s Circuit: An Overview Ten Years Later. J. Circuits Syst. Comput. 1994, 4, 117–159. [Google Scholar] [CrossRef]
  6. Süsse, R.; Domhardt, A.; Reinhard, M. Calculation of Electrical Circuits with Fractional Characteristics of Construction Elements. Forsch. Ing. 2005, 69, 230–235. [Google Scholar] [CrossRef]
  7. Strukov, D.B.; Snider, G.S.; Stewart, D.R.; Williams, R.S. The Missing Memristor Found. Nature 2008, 453, 80–83. [Google Scholar] [CrossRef]
  8. Jo, S.H.; Chang, T.; Ebong, I.; Bhadviya, B.B.; Mazumder, P.; Lu, W. Nanoscale Memristor Device as Synapse in Neuromorphic Systems. Nano Lett. 2010, 10, 1297–1301. [Google Scholar] [CrossRef] [PubMed]
  9. Pershin, Y.V.; Di Ventra, M. Experimental Demonstration of Associative Memory with Memristive Neural Networks. Neural Netw. 2010, 23, 881–886. [Google Scholar] [CrossRef] [Green Version]
  10. Azghadi, M.R.; Linares-Barranco, B.; Abbott, D.; Leong, P.H.W. A Hybrid CMOS-Memristor Neuromorphic Synapse. IEEE Trans. Biomed. Circuits Syst. 2017, 11, 434–445. [Google Scholar] [CrossRef] [Green Version]
  11. Prezioso, M.; Merrikh-Bayat, F.; Hoskins, B.D.; Adam, G.C.; Likharev, K.K.; Strukov, D.B. Training and Operation of an Integrated Neuromorphic Network Based on Metal-Oxide Memristors. Nature 2015, 521, 61–64. [Google Scholar] [CrossRef] [PubMed] [Green Version]
  12. Kozma, R.; Pino, R.E.; Pazienza, G.E. (Eds.) Advances in Neuromorphic Memristor Science and Applications; Springer: Dordrecht, The Netherlands, 2012; ISBN 978-94-007-4490-5. [Google Scholar]
  13. Shin, S.; Kim, K.; Kang, S. Memristor Applications for Programmable Analog ICs. IEEE Trans. Nanotechnol. 2011, 10, 266–274. [Google Scholar] [CrossRef]
  14. Merrikh-Bayat, F.; Shouraki, S.B. Memristor-Based Circuits for Performing Basic Arithmetic Operations. Procedia Comput. Sci. 2011, 3, 128–132. [Google Scholar] [CrossRef] [Green Version]
  15. Pershin, Y.V.; Ventra, M.D. Practical Approach to Programmable Analog Circuits With Memristors. IEEE Trans. Circuits Syst. I Regul. Pap. 2010, 57, 1857–1864. [Google Scholar] [CrossRef] [Green Version]
  16. Pershin, Y.V.; Sazonov, E.; Di Ventra, M. Analogue-to-Digital and Digital-to-Analogue Conversion with Memristive Devices. Electron. Lett. 2012, 48, 73. [Google Scholar] [CrossRef] [Green Version]
  17. Vourkas, I.; Sirakoulis, G.C. Emerging Memristor-Based Logic Circuit Design Approaches: A Review. IEEE Circuits Syst. Mag. 2016, 16, 15–30. [Google Scholar] [CrossRef]
  18. Chen, S.; Mahmoodi, M.R.; Shi, Y.; Mahata, C.; Yuan, B.; Liang, X.; Wen, C.; Hui, F.; Akinwande, D.; Strukov, D.B.; et al. Wafer-Scale Integration of Two-Dimensional Materials in High-Density Memristive Crossbar Arrays for Artificial Neural Networks. Nat. Electron. 2020, 3, 638–645. [Google Scholar] [CrossRef]
  19. Yuan, B.; Liang, X.; Zhong, L.; Shi, Y.; Palumbo, F.; Chen, S.; Hui, F.; Jing, X.; Villena, M.A.; Jiang, L.; et al. 150 Nm × 200 Nm Cross-Point Hexagonal Boron Nitride-Based Memristors. Adv. Electron. Mater. 2020, 6, 1900115. [Google Scholar] [CrossRef]
  20. Zhu, K.; Liang, X.; Yuan, B.; Villena, M.A.; Wen, C.; Wang, T.; Chen, S.; Hui, F.; Shi, Y.; Lanza, M. Graphene–Boron Nitride–Graphene Cross-Point Memristors with Three Stable Resistive States. ACS Appl. Mater. Interfaces 2019, 11, 37999–38005. [Google Scholar] [CrossRef]
  21. Driscoll, T.; Quinn, J.; Klein, S.; Kim, H.T.; Kim, B.J.; Pershin, Y.V.; Di Ventra, M.; Basov, D.N. Memristive Adaptive Filters. Appl. Phys. Lett. 2010, 97, 093502. [Google Scholar] [CrossRef] [Green Version]
  22. Buscarino, A.; Fortuna, L.; Frasca, M.; Valentina Gambuzza, L. A Chaotic Circuit Based on Hewlett-Packard Memristor. Chaos 2012, 22, 023136. [Google Scholar] [CrossRef] [PubMed]
  23. Muthuswamy, B.; Kokate, P.P. Memristor-Based Chaotic Circuits. IETE Tech. Rev. 2009, 26, 417–429. [Google Scholar] [CrossRef] [Green Version]
  24. Xu, C.; Dong, X.; Jouppi, N.P.; Xie, Y. Design Implications of Memristor-Based RRAM Cross-Point Structures. In Proceedings of the 2011 Design, Automation Test in Europe, Grenoble, France, 14–18 March 2011; pp. 1–6. [Google Scholar]
  25. Secco, J.; Corinto, F.; Sebastian, A. Flux–Charge Memristor Model for Phase Change Memory. IEEE Trans. Circuits Syst. II Express Briefs 2018, 65, 111–114. [Google Scholar] [CrossRef]
  26. Almurib, H.A.F.; Kumar, T.N.; Lombardi, F. Design and Evaluation of a Memristor-Based Look-up Table for Non-Volatile Field Programmable Gate Arrays. IET Circuits Devices Syst. 2016, 10, 292–300. [Google Scholar] [CrossRef]
  27. Ting, Y.-H.; Chen, J.-Y.; Huang, C.-W.; Huang, T.-K.; Hsieh, C.-Y.; Wu, W.-W. Observation of Resistive Switching Behavior in Crossbar Core–Shell Ni/NiO Nanowires Memristor. Small 2018, 14, 1703153. [Google Scholar] [CrossRef] [PubMed]
  28. Miao, F.; Yi, W.; Goldfarb, I.; Yang, J.J.; Zhang, M.-X.; Pickett, M.D.; Strachan, J.P.; Medeiros-Ribeiro, G.; Williams, R.S. Continuous Electrical Tuning of the Chemical Composition of TaOx-Based Memristors. ACS Nano 2012, 6, 2312–2318. [Google Scholar] [CrossRef] [PubMed]
  29. Chen, Y.; Liu, G.; Wang, C.; Zhang, W.; Li, R.-W.; Wang, L. Polymer Memristor for Information Storage and Neuromorphic Applications. Mater. Horiz. 2014, 1, 489–506. [Google Scholar] [CrossRef]
  30. Zhang, L.; Gong, T.; Wang, H.; Guo, Z.; Zhang, H. Memristive Devices Based on Emerging Two-Dimensional Materials beyond Graphene. Nanoscale 2019, 11, 12413–12435. [Google Scholar] [CrossRef]
  31. Romero, F.J.; Toral, A.; Medina-Rull, A.; Moraila-Martinez, C.L.; Morales, D.P.; Ohata, A.; Godoy, A.; Ruiz, F.G.; Rodriguez, N. Resistive Switching in Graphene Oxide. Front. Mater. 2020, 7. [Google Scholar] [CrossRef] [Green Version]
  32. Romero, F.J.; Toral-Lopez, A.; Ohata, A.; Morales, D.P.; Ruiz, F.G.; Godoy, A.; Rodriguez, N. Laser-Fabricated Reduced Graphene Oxide Memristors. Nanomaterials 2019, 9, 897. [Google Scholar] [CrossRef] [Green Version]
  33. Sahu, D.P.; Jetty, P.; Jammalamadaka, S.N. Graphene Oxide Based Synaptic Memristor Device for Neuromorphic Computing. Nanotechnology 2021, 32, 155701. [Google Scholar] [CrossRef] [PubMed]
  34. Ventra, M.D.; Pershin, Y.V.; Chua, L.O. Circuit Elements With Memory: Memristors, Memcapacitors, and Meminductors. Proc. IEEE 2009, 97, 1717–1724. [Google Scholar] [CrossRef] [Green Version]
  35. Romero, F.J.; Escudero, M.; Medina-Garcia, A.; Morales, D.P.; Rodriguez, N. Meminductor Emulator Based on a Modified Antoniou’s Gyrator Circuit. Electronics 2020, 9, 1407. [Google Scholar] [CrossRef]
  36. Liang, Y.; Chen, H.; Yu, D.S. A Practical Implementation of a Floating Memristor-Less Meminductor Emulator. IEEE Trans. Circuits Syst. II Express Briefs 2014, 61, 299–303. [Google Scholar] [CrossRef]
  37. The Computer That Stores and Processes Information at the Same Time. Available online: https://www.technologyreview.com/2012/11/21/181520/the-computer-that-stores-and-processes-information-at-the-same-time/ (accessed on 15 May 2021).
  38. Pershin, Y.V.; Di Ventra, M. Memcomputing: A Computing Paradigm to Store and Process Information on the Same Physical Platform. In Proceedings of the 2014 International Workshop on Computational Electronics (IWCE), Paris, France, 3–6 June 2014; pp. 1–2. [Google Scholar]
  39. Di Ventra, M.; Pershin, Y.V. The Parallel Approach. Nat. Phys. 2013, 9, 200–202. [Google Scholar] [CrossRef]
  40. Fouda, M.E.; Radwan, A.G. Charge Controlled Memristor-Less Memcapacitor Emulator. Electron. Lett. 2012, 48, 1454–1455. [Google Scholar] [CrossRef]
  41. Biolek, D.; Biolek, Z.; Biolkova, V. SPICE Modelling of Memcapacitor. Electron. Lett. 2010, 46, 520–522. [Google Scholar] [CrossRef]
  42. Sah, M.P.; Yang, C.; Budhathoki, R.K.; Kim, H.; Yoo, H.J. Implementation of a Memcapacitor Emulator with Off-the-Shelf Devices. Elektron. Elektrotechnika 2013, 19, 54–58. [Google Scholar] [CrossRef]
  43. Romero, F.J.; Morales, D.P.; Godoy, A.; Ruiz, F.G.; Tienda-Luna, I.M.; Ohata, A.; Rodriguez, N. Memcapacitor Emulator Based on the Miller Effect. Int. J. Circuit Theory Appl. 2019, 47, 572–579. [Google Scholar] [CrossRef]
  44. Wang, X.Y.; Fitch, A.L.; Iu, H.H.C.; Qi, W.G. Design of a Memcapacitor Emulator Based on a Memristor. Phys. Lett. A 2012, 376, 394–399. [Google Scholar] [CrossRef]
  45. Pershin, Y.V.; Ventra, M.D. Emulation of Floating Memcapacitors and Meminductors Using Current Conveyors. Electron. Lett. 2011, 47, 243–244. [Google Scholar] [CrossRef] [Green Version]
  46. Yu, D.S.; Liang, Y.; Chen, H.; Iu, H.H.C. Design of a Practical Memcapacitor Emulator Without Grounded Restriction. IEEE Trans. Circuits Syst. II Express Briefs 2013, 60, 207–211. [Google Scholar] [CrossRef]
  47. Yesil, A.; Babacan, Y. Electronically Controllable Memcapacitor Circuit with Experimental Results. IEEE Trans. Circuits Syst. II Express Briefs 2021, 68, 1443–1447. [Google Scholar] [CrossRef]
  48. Vista, J.; Ranjan, A. Simple Charge Controlled Floating Memcapacitor Emulator Using DXCCDITA. Analog. Integr. Circuits Signal Process. 2020, 104, 37–46. [Google Scholar] [CrossRef]
  49. Wang, S.-F. The Gyrator for Transforming Nano Memristor into Meminductor. Circuit World 2016, 42, 197–200. [Google Scholar] [CrossRef]
  50. Romero, F.J.; Medina-Garcia, A.; Escudero, M.; Morales, D.P.; Rodriguez, N. Design and Implementation of a Floating Meminductor Emulator upon Riordan Gyrator. AEU Int. J. Electron. Commun. 2021, 133, 153671. [Google Scholar] [CrossRef]
  51. Sah, M.P.; Budhathoki, R.K.; Yang, C.; Kim, H. Mutator-Based Meminductor Emulator for Circuit Applications. Circuits Syst. Signal Process. 2014, 33, 2363–2383. [Google Scholar] [CrossRef]
  52. Sah, M.P.; Budhathoki, R.K.; Yang, C.; Kim, H. A Mutator-Based Meminductor Emulator Circuit. In Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, Australia, 1–5 June 2014; pp. 2249–2252. [Google Scholar]
  53. Liang, Y.; Ying, S.; Bingmeng, H.; Lu, C.; Jing, S. Design and Characteristic Analysis of Floating Flux-Controlled Meminductor Emulator. J. Syst. Simul. 2018, 30, 1337. [Google Scholar] [CrossRef]
  54. Sozen, H.; Cam, U. A Novel Floating/Grounded Meminductor Emulator. J. Circuits Syst. Comput. 2020, 29, 2050247. [Google Scholar] [CrossRef]
  55. Fouda, M.E.; Radwan, A.G. Memristor-Less Current- and Voltage-Controlled Meminductor Emulators. In Proceedings of the 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), Marseille, France, 7–10 December 2014; pp. 279–282. [Google Scholar]
  56. Elwakil, A.S.; Fouda, M.E.; Radwan, A.G. A Simple Model of Double-Loop Hysteresis Behavior in Memristive Elements. IEEE Trans. Circuits Syst. II Express Briefs 2013, 60, 487–491. [Google Scholar] [CrossRef]
  57. Konal, M.; Kacar, F. Electronically Tunable Meminductor Based on OTA. AEU Int. J. Electron. Commun. 2020, 126, 153391. [Google Scholar] [CrossRef]
  58. Vista, J.; Ranjan, A. High Frequency Meminductor Emulator Employing VDTA and Its Application. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020, 39, 2020–2028. [Google Scholar] [CrossRef]
  59. Babacan, Y. An Operational Transconductance Amplifier-Based Memcapacitor and Meminductor. Istanb. Univ. J. Electr. Electron. Eng. 2018, 18, 36–38. [Google Scholar] [CrossRef]
  60. Çam Taşkıran, Z.G.; Sağbaş, M.; Ayten, U.E.; Sedef, H. A New Universal Mutator Circuit for Memcapacitor and Meminductor Elements. AEU Int. J. Electron. Commun. 2020, 119, 153180. [Google Scholar] [CrossRef]
  61. Yu, D.; Liang, Y.; Iu, H.H.C.; Chua, L.O. A Universal Mutator for Transformations Among Memristor, Memcapacitor, and Meminductor. IEEE Trans. Circuits Syst. II Express Briefs 2014, 61, 758–762. [Google Scholar] [CrossRef]
  62. Yu, D.; Zhao, X.; Sun, T.; Iu, H.H.C.; Fernando, T. A Simple Floating Mutator for Emulating Memristor, Memcapacitor, and Meminductor. IEEE Trans. Circuits Syst. II Express Briefs 2020, 67, 1334–1338. [Google Scholar] [CrossRef]
  63. Zhao, Q.; Wang, C.; Zhang, X. A Universal Emulator for Memristor, Memcapacitor, and Meminductor and Its Chaotic Circuit. Chaos 2019, 29, 013141. [Google Scholar] [CrossRef]
Figure 1. Mem-elements definition on the basis of their fundamental physical magnitudes (units are presented in brackets). Memristor: relation between the charge (q) and the time-integral of the voltage (ϕ); memcapacitor: relation between time-integral of the charge (σ) and the time-integral of the voltage (ϕ); meminductor: relation between time-integral of the flux (ρ) and the charge (q) [35].
Figure 1. Mem-elements definition on the basis of their fundamental physical magnitudes (units are presented in brackets). Memristor: relation between the charge (q) and the time-integral of the voltage (ϕ); memcapacitor: relation between time-integral of the charge (σ) and the time-integral of the voltage (ϕ); meminductor: relation between time-integral of the flux (ρ) and the charge (q) [35].
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Figure 2. Memcapacitor emulator circuit proposed by Fouda and Radwan [40].
Figure 2. Memcapacitor emulator circuit proposed by Fouda and Radwan [40].
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Figure 3. Memcapacitor emulator circuit proposed by Sah et al. [42].
Figure 3. Memcapacitor emulator circuit proposed by Sah et al. [42].
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Figure 4. Memcapacitor emulator circuit proposed by Romero et al. [43] implemented with a voltage-controlled resistor (a) and with a voltage-controlled memristor (b).
Figure 4. Memcapacitor emulator circuit proposed by Romero et al. [43] implemented with a voltage-controlled resistor (a) and with a voltage-controlled memristor (b).
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Figure 5. (a) Memcapacitor emulator circuit proposed by Wang et al. [44] implemented with a voltage-controlled memristor. (b) Memcapacitor emulator schematic using a memristor emulator based on a LED optically coupled to a LDR (light-dependent resistor).
Figure 5. (a) Memcapacitor emulator circuit proposed by Wang et al. [44] implemented with a voltage-controlled memristor. (b) Memcapacitor emulator schematic using a memristor emulator based on a LED optically coupled to a LDR (light-dependent resistor).
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Figure 6. Memcapacitor emulator circuit proposed by Pershin and Di Ventra [45].
Figure 6. Memcapacitor emulator circuit proposed by Pershin and Di Ventra [45].
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Figure 7. Memcapacitor emulator circuit proposed by Yesil and Babacan [47]. (a) Implementation based on only CCII, (b) implementation based on a CCII-OTA combination.
Figure 7. Memcapacitor emulator circuit proposed by Yesil and Babacan [47]. (a) Implementation based on only CCII, (b) implementation based on a CCII-OTA combination.
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Figure 8. Memcapacitor emulator circuit proposed by Vista and Ranjan [48] based on a DXCCDITA.
Figure 8. Memcapacitor emulator circuit proposed by Vista and Ranjan [48] based on a DXCCDITA.
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Figure 9. Meminductor emulator circuit proposed by Wang [49].
Figure 9. Meminductor emulator circuit proposed by Wang [49].
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Figure 10. Grounded meminductor emulator circuit proposed by Romero et al. [35].
Figure 10. Grounded meminductor emulator circuit proposed by Romero et al. [35].
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Figure 11. Floating meminductor emulator circuit proposed by Romero et al. [50].
Figure 11. Floating meminductor emulator circuit proposed by Romero et al. [50].
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Figure 12. Meminductor emulator circuit proposed by Sah et al. [51].
Figure 12. Meminductor emulator circuit proposed by Sah et al. [51].
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Figure 13. Meminductor emulator circuit based on current conveyors proposed by Sah et al. [52].
Figure 13. Meminductor emulator circuit based on current conveyors proposed by Sah et al. [52].
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Figure 14. Floating meminductor emulator circuit based on current conveyors proposed by Liang et al. [36].
Figure 14. Floating meminductor emulator circuit based on current conveyors proposed by Liang et al. [36].
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Figure 15. Meminductor emulator circuit based on current conveyors proposed by Fouda and Radwan [55].
Figure 15. Meminductor emulator circuit based on current conveyors proposed by Fouda and Radwan [55].
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Figure 16. Memcapacitor (a) and meminductor emulator (b) circuits proposed by Babacan [59].
Figure 16. Memcapacitor (a) and meminductor emulator (b) circuits proposed by Babacan [59].
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Figure 17. (a) CBTA-based circuit for the emulation of floating memcapacitors and meminductors devices proposed by Taşkiran et al. [60]. (b) Mutator for the emulation of memcapacitors, (c) mutator for the emulation of meminductors.
Figure 17. (a) CBTA-based circuit for the emulation of floating memcapacitors and meminductors devices proposed by Taşkiran et al. [60]. (b) Mutator for the emulation of memcapacitors, (c) mutator for the emulation of meminductors.
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Figure 18. (a) Universal circuit for the emulation of grounded mem-elements proposed by Yu et al. [61]. (b) Mutator for the emulation of memcapacitors, (c) mutator for the emulation of meminductors.
Figure 18. (a) Universal circuit for the emulation of grounded mem-elements proposed by Yu et al. [61]. (b) Mutator for the emulation of memcapacitors, (c) mutator for the emulation of meminductors.
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Figure 19. Universal circuit proposed by Yu et al. [62] for the emulation of floating memcapacitors (a), and floating meminductor (b).
Figure 19. Universal circuit proposed by Yu et al. [62] for the emulation of floating memcapacitors (a), and floating meminductor (b).
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Figure 20. Universal circuit proposed by Zhao et al. [63] for the emulation of floating memcapacitors (a), and floating meminductors (b).
Figure 20. Universal circuit proposed by Zhao et al. [63] for the emulation of floating memcapacitors (a), and floating meminductors (b).
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Table 1. Comparison of the different memcapacitor emulators presented in this review.
Table 1. Comparison of the different memcapacitor emulators presented in this review.
ReferenceMutatorConfigurationControl VariableKey ComponentsExperimental
Fouda and Radwan [40]NoGroundedChargeOp amps
Analog multiplier
Copy of the input current
No
Sah et al. [42]NoGroundedChargeOp amps
Analog multiplier
Yes
Romero et al. [43]YesGroundedVoltageOp amps
Memristor 1
Yes
Wang et al. [44]YesGroundedVoltageCurrent conveyors
Memristor 1
Yes
Pershin and Di Ventra [45]YesFloatingVoltageCurrent conveyors
Inductor
Memristor
No
Yesil and Babacan [47]NoGroundedChargeCurrent conveyor
OTA
Analog multiplier
Yes
Vista and Ranjan [48]NoFloatingChargeCustom DXCCDITANo
1 Or memristor emulator (applicable in all cases).
Table 2. Comparison of the different meminductor emulators presented in this work.
Table 2. Comparison of the different meminductor emulators presented in this work.
ReferenceMutatorConfigurationControl VariableKey ComponentsExperimental
Wang [49]YesGroundedFluxOp amps,
Memristor 1
No
Romero et al. [35]YesGroundedFluxOp amps,
Memristor
No
Romero et al. [50]YesFloatingFluxOp amps,
Memristor
Yes
Sah et al. [51]YesGroundedFluxCurrent conveyor,
Op amps,
Memristor 1
Yes
Sha et al. [52]YesGroundedFluxCurrent conveyors,
Memristor
No
Liang et al. [36]YesFloatingFluxCurrent conveyor,
Op amps,
Memristor
Yes
Fouda and Radwan [55]NoGroundedCurrentCurrent conveyor,
Analog multiplier,
Adder
No
1 Or memristor emulator (applicable in all cases).
Table 3. Comparison among of the different universal emulators cited in this review.
Table 3. Comparison among of the different universal emulators cited in this review.
ReferenceEmulatorMutatorConf.Control VariableKey ComponentsExperimental
Babacan [59]Memcap.NoGroundedChargeOTA
Integrator
Differentiator
Multiplier
No
Memind.Current
Taşkiran et al. [60]Memcap.YesFloatingVoltageCustom CBTA
Memristor 1
No
Memind.Flux
Yu et al. [61]Memcap.YesGroundedVoltageCurrent Conveyor
Memristor
Yes
Memind.Flux
Yu et al. [62]Memcap.NoFloatingVoltageCurrent Conveyor
Varactor diode
Subtractor
Yes
Memind.Flux
Zhao et al. [63]Memcap.NoFloatingChargeCurrent Conveyor
Multiplier
Adder
Yes
Memind.Current
1 Or memristor emulator (applicable in all cases).
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Romero, F.J.; Ohata, A.; Toral-Lopez, A.; Godoy, A.; Morales, D.P.; Rodriguez, N. Memcapacitor and Meminductor Circuit Emulators: A Review. Electronics 2021, 10, 1225. https://doi.org/10.3390/electronics10111225

AMA Style

Romero FJ, Ohata A, Toral-Lopez A, Godoy A, Morales DP, Rodriguez N. Memcapacitor and Meminductor Circuit Emulators: A Review. Electronics. 2021; 10(11):1225. https://doi.org/10.3390/electronics10111225

Chicago/Turabian Style

Romero, Francisco J., Akiko Ohata, Alejandro Toral-Lopez, Andres Godoy, Diego P. Morales, and Noel Rodriguez. 2021. "Memcapacitor and Meminductor Circuit Emulators: A Review" Electronics 10, no. 11: 1225. https://doi.org/10.3390/electronics10111225

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