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Article

Improving the Performance of Ultrathin ZnO TFTs Using High-Pressure Hydrogen Annealing

1
Center for Semiconductor Technology Convergence, Department of Electrical Engineering, Pohang University of Science and Technology, Cheongam-ro 77, Nam-gu, Pohang 37673, Gyeongbuk, Republic of Korea
2
Graduate School of Semiconductor Technology, Pohang University of Science and Technology, Cheongam-ro 77, Nam-gu, Pohang 37673, Gyeongbuk, Republic of Korea
*
Author to whom correspondence should be addressed.
Nanomaterials 2025, 15(19), 1484; https://doi.org/10.3390/nano15191484
Submission received: 28 August 2025 / Revised: 18 September 2025 / Accepted: 27 September 2025 / Published: 28 September 2025
(This article belongs to the Section Nanofabrication and Nanomanufacturing)

Abstract

Ultrathin oxide semiconductors are promising channel materials for next-generation thin-film transistors (TFTs), but their performance is severely limited by bulk and interface defects as the channel thickness approaches a few nanometers. In this study, we show that high-pressure hydrogen annealing (HPHA) effectively mitigates these limitations in 3.6 nm thick ZnO TFTs. HPHA-treated devices exhibit a nearly four-fold increase in on-current, a steeper subthreshold swing, and a negative shift in threshold voltage compared to reference groups. X-ray photoelectron spectroscopy reveals a marked reduction in oxygen vacancies and hydroxyl groups, while capacitance–voltage measurements confirm more than a three-fold decrease in interface trap density. Low-frequency noise analysis further demonstrates noise suppression and a transition in the dominant noise mechanism from carrier number fluctuation to mobility fluctuation. These results establish HPHA as a robust strategy for defect passivation in ultrathin oxide semiconductor channels and provide critical insights for their integration into future low-power, high-density electronic systems.

Graphical Abstract

1. Introduction

Oxide semiconductors such as zinc oxide (ZnO), indium oxide (In2O3), and indium–gallium–zinc oxide (IGZO) have emerged as a versatile platform for thin-film electronics because of their large band gap (>3 eV), intrinsically high electron mobility, optical transparency, and compatibility with low-temperature and large-area deposition. These attributes have enabled rapid progress in logic circuits, memory, and sensors, positioning oxide semiconductor thin-film transistors (TFTs) as essential building blocks for next-generation electronics [1,2,3,4].
Recently, channel thickness scaling in TFTs has become critical for emerging electronic applications such as monolithic three-dimensional (M3D) integration. As the thickness of the channel layer is scaled below 10 nm, ultrathin oxide semiconductor channels begin to exhibit distinctly different electrostatic and transport characteristics such as enhanced gate control, suppressed short-channel effects, and reduced parasitic capacitance [5,6].
However, aggressive scaling also introduces significant technical challenges. As the channel thickness approaches only a few nanometers, device performance becomes increasingly susceptible to defect-mediated degradation mechanisms. Both bulk traps—such as oxygen vacancies within the film and interface states at the dielectric/semiconductor boundary—contribute to carrier scattering, threshold voltage instability, and higher low-frequency noise [7,8,9,10].
To mitigate these thickness scaling-induced degradations, effective passivation strategies targeting both bulk and interface traps are essential. Conventional thermal annealing can partially reduce traps, but is often insufficient for ultrathin oxide semiconductors where the defect-to-volume ratio is extremely high. In contrast, high-pressure hydrogen annealing (HPHA) enhances the solubility and chemical reactivity of hydrogen, thereby promoting deeper diffusion into the oxide film and more efficient passivation of oxygen vacancies and dangling bonds [11,12,13]. Previous studies have reported that high-pressure annealing significantly reduces defect densities in wide-bandgap oxides and improves device stability [14,15,16,17], suggesting HPHA as a particularly robust approach for ultrathin oxide channels.
In this work, we systematically investigate the impacts of HPHA on 3.6 nm thick ZnO TFTs by comparing devices before annealing, after vacuum annealing, and after HPHA. HPHA-treated devices exhibit enhanced on-current, reduced subthreshold swing, and a negative shift in threshold voltage compared with untreated counterparts. X-ray photoelectron spectroscopy (XPS) reveals the hydrogen-induced modulation of oxygen vacancy concentrations. Furthermore, the interface trap density, (Dit) extracted from capacitance–voltage measurements, decreases by more than three-fold. Interestingly, we found that the dominant noise generation mechanism is changed from carrier number fluctuation (McWhorter model) to mobility fluctuation (Hooge model), confirming effective trap passivation by HPHA.

2. Materials and Methods

Figure 1a illustrates the fabrication process of the ultrathin ZnO TFTs, incorporating HPHA. To ensure a uniform electric field distribution in the channel region, a buried gate structure was used [18]. The SiO2 trench pattern was formed by reactive ion etching (RIE) with an Ar/CF4 mixture. The trench was filled with a 10 nm Ti/60 nm Al metal stack, where Ti served as an adhesion layer and Al as a low-work function favorable for n-type device operation. After planarization of the metal electrode, an 11 nm Al2O3 layer was subsequently deposited as the gate dielectric, using the atomic layer deposition (ALD) process with trimethylaluminum (TMA) and H2O at 200 °C. A 3.6 nm ZnO channel layer was then deposited by ALD with diethylzinc (DEZ) and H2O precursors at 100 °C to form the n-type channel layer and patterned using photolithography followed by wet etching using 0.68 wt.% HCl for 2 s at 25 °C. Then, HPHA was performed at 300 °C under 10 bar H2 for 30 min on the patterned ZnO. After the HPHA, the 70 nm Al source and drain electrodes were deposited and patterned. The fabricated device features channel dimensions of width (W) = 16 μm and length (L) = 12 μm. For comparison, devices were also fabricated with different annealing conditions: without annealing and vacuum annealing at 300 °C for 30 min under ~10−2 Torr.
Film thickness and surface roughness were characterized using atomic force microscopy (AFM, Jupiter XR, Oxford Instruments, Abingdon, UK) as shown in Figure 1b. The root mean square surface roughness (Rq) was measured to be 0.453 nm. As surface roughness is a critical factor in ultrathin thickness, this film maintains a smooth surface [19].
The chemical states of the ZnO films were analyzed using X-ray photoelectron spectroscopy (XPS). The calibration was performed using the 284.8 eV peak in the C 1s spectrum as a reference.
Electrical characteristics were measured using a semiconductor parameter analyzer (Keithley 4200-SCS, Tektronix, Beaverton, OR, USA). The I–V and C–V characteristics were measured at 25 °C under ambient pressure. The MOS capacitor with an Al (bottom)/Al2O3 (11 nm)/ZnO (3.6 nm)/Al (top) structure with a circular pattern Al top electrode was used to measure C–V. For low-frequency (1/f) noise measurements, the drain current was amplified with a low-noise current preamplifier (SR570, Stanford Research Systems, Sunnyvale, CA, USA) and analyzed using a dynamic signal analyzer (35670A, Agilent, Santa Clara, CA, USA) with a Fast Fourier Transform (FFT) to obtain the drain current noise spectral density.

3. Results and Discussion

The electrical characteristics of ZnO TFTs are presented in Figure 1c. The device exhibits a relatively low on-current before annealing. This degradation is primarily attributed to bulk oxygen vacancies and interface traps in the ultrathin ZnO channel. Oxygen vacancies not only generate free carriers but also act as bulk traps; thus, in ultrathin channels with a high trap-to-volume ratio, device performance is strongly degraded by these defects.
After thermal annealing in a vacuum, the on-current increased by two-fold and exhibited a reduced subthreshold swing compared to the unannealed device. This improvement is likely associated with the desorption of residual contaminants such as hydroxyl groups in the film and oxygen rearrangement at the channel/dielectric interface by thermal energy. These effects collectively reduce traps and scattering centers, thereby improving carrier transport [20,21,22,23,24,25].
In contrast, the HPHA-treated devices exhibit a nearly four-fold increase in on-current, along with a steeper subthreshold swing and a negative shift in threshold voltage compared to unannealed devices. The threshold voltage was obtained from the constant-current method, defined as the gate voltage corresponding to a drain current of 10−10 A in the linear region of the log–linear I–V curve. The pronounced improvement highlights the critical role of hydrogen in effectively passivating oxygen vacancies and stabilizing the ultrathin ZnO channel. For quantitative comparison, the key device parameters are summarized in Table 1. The effective mobility was calculated using the following equation:
µ eff   =   g d Q n L W
where Qn is the sheet charge density, gd is the drain conductance, L is the channel length, and W is the width of channel.
To elucidate the origin of the performance enhancement observed in HPHA-treated ZnO TFTs, XPS was performed on the three types of ZnO films. Figure 2a–c shows the O 1s core-level spectra deconvoluted into three distinct components corresponding to M–O, M–VO, and M–OH. The M–O peak arises from metal–oxygen lattice bonding, while the M–Vo peak reflects oxygen vacancy states caused by missing oxygen atoms at lattice sites. The M–OH peak is assigned to surface hydroxyl groups formed through chemisorbed –OH species or adsorbed H2O/O2 molecules. These components are centered at binding energies of approximately 530 eV (M–O), 531 eV (M–VO), and 532 eV (M–OH), respectively [26].
In the before annealing sample, the O 1s spectrum shows a relatively low M–O contribution (47.2%) and significant fractions of M–VO (21.9%) and M–OH (30.9%), indicating a high density of oxygen-related defects and hydroxyl groups (Figure 2a). After thermal annealing in a vacuum, the M–O fraction increases to 55.8%, accompanied by decreases in M–VO (17.9%) and M–OH (26.3%) (Figure 2b).
The HPHA-treated ZnO film exhibits a pronounced increase in the M–O component (60.1%) along with significant reductions in M–VO (13.6%) and M–OH (26.3%) (Figure 2c). These results demonstrate that hydrogen directly influenced the concentration of oxygen vacancies while also reconstructing the bonding environment toward a more ordered Zn–O network. The progressive oxygen vacancy reduction summarized in Figure 2d indicates that HPHA strongly affects the carrier transport behaviors in the ultrathin ZnO channel region.
To investigate the impacts of HPHA, charge trapping behaviors in the ZnO channel region should be directly examined. Unfortunately, the characterization of charge trapping and de-trapping in the ZnO region is not as straightforward as in the bulk silicon MOSFETs because it is difficult to use a typical analysis method such as charge pumping analysis, which requires a body contact. To overcome this limitation, we used capacitance–voltage (C–V) measurements performed over a frequency range of 5 kHz and 10–100 kHz in 10 kHz steps with an amplitude of 300 mV. Figure 3a–c shows the capacitance dispersion as a function of frequency. Dispersion near depletion is primarily attributed to interface traps, whereas the dispersion in the accumulation regime is governed by border traps [27].
As shown in Figure 3a, the unannealed device exhibits pronounced frequency dispersion around VTH, indicating the presence of a high density of interface traps (Dit). The frequency dependence arises because traps and carriers respond differently to the AC signal. As Dit decreases, the trap-induced capacitance at low frequencies is suppressed, leading to a reduction in frequency dispersion. Both vacuum-annealed and HPHA-treated devices show significantly reduced frequency dependence around VTH, confirming the suppression of electrically active traps. These results also indicate that vacuum annealing alone can contribute to a reduction in Dit.
For quantitative comparison, Dit was determined via the high–low-frequency CV method using the following equation [28,29]:
D i t = 1 q A 1 C L F 1 C O X 1 1 C H F 1 C O X 1
where Dit is the interface trap density, q is the elementary charge, A is the electrode area of the MOS capacitor, CLF and CHF are the capacitances measured at 5 kHz and 100 kHz, respectively, and COX is the oxide capacitance. Figure 3d shows the Dit values extracted at the VTH of each device, where VTH was 0.61 V for the device before annealing, 0.37 V for the vacuum-annealed device, and 0.16 V for the HPHA-treated device. The Dit value decreased from ~4.48 × 1012 eV−1cm−2 for the unannealed device to ~2.31 × 1012 eV−1cm−2 after vacuum annealing, and further to ~1.34 × 1012 eV−1cm−2 after HPHA.
This reduction in Dit after the annealing suggests that hydrogen effectively passivates the electrically active trap states in the ultrathin ZnO channel region (Table 2). The decrease in Dit is also consistent with the improved subthreshold swing and enhanced mobility observed in Table 1, highlighting the strong correlation between defect passivation and overall device performance.
To further investigate the dominant defect mechanisms affecting device performance, low-frequency noise measurements were carried out for three different device groups: unannealed, after vacuum annealing, and after HPHA. Low-frequency (1/f) noise—commonly referred to as flicker noise—constitutes the intrinsic noise source in oxide semiconductor TFTs [30,31,32,33]. Its power spectral density, SID(f)∝1/fγ with γ ≈ 1, arises from a carrier number fluctuation due to charge trapping/de-trapping at oxide/semiconductor interfaces (McWhorter model) [34,35] or from correlated mobility fluctuations caused by phonon or impurity scattering (Hooge model) [36,37]. In the McWhorter model [38], the normalized spectral density is expressed as
S I D f I D 2 = q 2 k T N t W L C o x 2 f V G S V T H 2
where Nt is the oxide trap density, T the temperature, Cox the gate–oxide capacitance per unit area, and W and L the channel width and length, respectively. In contrast, the Hooge mobility fluctuation model [38] gives
S I D f I D 2 = q α H W L C o x f V G S V T H
where αH is the Hooge parameter. Using the differences in the noise characteristics, the differences in defect density can be compared.
Figure 4a shows the normalized current noise spectral density (SID/ID2) of three device groups as a function of frequency at VGS = 6 V. All devices exhibit 1/f-type behavior. Unannealed devices show relatively high noise levels, whereas vacuum annealing produces a modest decrease, consistent with partial trap removal. HPHA devices exhibit a substantial suppression of low-frequency noise.
From the slope of SID/ID2 at 10 Hz versus the VGS–VTH curve, the dominant mechanism of 1/f noise can be identified (Figure 4b). The slope for the unannealed devices follows approximately −2, characteristic of the Δn (number fluctuation) model, in which carriers tunnel in and out of traps located in the bulk and near the channel/dielectric interface. On the other hand, HPHA-treated devices follow a slope closer to −1, indicative of mobility fluctuation (Δμ) behavior described by the Hooge model, where carriers are scattered by lattice vibrations and residual impurities. Vacuum-annealed devices show intermediate behavior, indicating the presence of both mechanisms.
This transition from Δn to Δμ after HPHA reveals a fundamental change in the dominant noise mechanism: from trap-driven carrier number fluctuations in defective films to mobility fluctuations in trap-passivated channels. Figure 4c summarizes this mechanism shift, highlighting that hydrogen passivation of defects is the key to reducing trap-related noise.

4. Conclusions

In this work, we demonstrated that HPHA significantly improves the performance of ultrathin (3.6 nm) ZnO TFTs by effectively passivating both bulk and interface defect states. XPS analysis revealed a substantial reduction in oxygen vacancies and hydroxyl groups, while electrical characterization showed enhanced on-current, steeper subthreshold swing, and markedly reduced interface trap density. Most importantly, low-frequency noise analysis revealed a transition in the dominant noise mechanism from carrier number fluctuations (McWhorter model) in defective films to mobility fluctuations (Hooge model) in trap-passivated channels. These findings highlight the critical role of hydrogen in stabilizing ultrathin oxide semiconductors and provide physical insights as well as practical strategies for integrating low-dimensional oxide channels into future low-power and high-density electronic systems.

Author Contributions

Conceptualization, H.-W.L.; methodology, H.-W.L.; validation, H.-W.L., M.K., J.H.J., and U.C.; writing—original draft preparation, H.-W.L. and B.H.L.; writing—review and editing, H.-W.L. and B.H.L.; supervision and funding acquisition, B.H.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was partially supported by Technology Innovation Program (20023023) through Korea Institute for Advancement of Technology (KIAT)) funded by the Ministry of Trade, Industry & Energy (MOTIE) and by Nanomaterials Development Program (RS-2022-NR068233) through the National Research Foundation of Korea (NRF) grant funded by Ministry of Science and ICT (MSIT).

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

Abbreviations

The following abbreviations are used in this manuscript:
TFTsThin Film Transistors
HPHAHigh Pressure Hydrogen Annealing
AFMAtomic Force Microscopy
XPSX-ray Photoelectron Spectroscopy

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Figure 1. (a) Three-dimensional schematic of the fabrication process flow for ultrathin ZnO TFTs incorporating high-pressure hydrogen annealing (HPHA). (b) Atomic force microscopy (AFM) image and thickness profile of the ZnO film (3.6 nm), confirming smooth surface morphology. (c) Transfer characteristics of ZnO TFTs before annealing, after vacuum annealing, and after HPHA, highlighting the significant performance improvement induced by HPHA.
Figure 1. (a) Three-dimensional schematic of the fabrication process flow for ultrathin ZnO TFTs incorporating high-pressure hydrogen annealing (HPHA). (b) Atomic force microscopy (AFM) image and thickness profile of the ZnO film (3.6 nm), confirming smooth surface morphology. (c) Transfer characteristics of ZnO TFTs before annealing, after vacuum annealing, and after HPHA, highlighting the significant performance improvement induced by HPHA.
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Figure 2. O 1s XPS spectra of ZnO films (a) before annealing, (b) after vacuum annealing, and (c) after high-pressure hydrogen annealing (HPHA), deconvoluted into lattice oxygen (M–O), oxygen vacancies (M–VO), and hydroxyl groups (M–OH). (d) Relative area ratio of the M–VO component in the O 1s spectra, highlighting the significant reduction in oxygen vacancy density after HPHA.
Figure 2. O 1s XPS spectra of ZnO films (a) before annealing, (b) after vacuum annealing, and (c) after high-pressure hydrogen annealing (HPHA), deconvoluted into lattice oxygen (M–O), oxygen vacancies (M–VO), and hydroxyl groups (M–OH). (d) Relative area ratio of the M–VO component in the O 1s spectra, highlighting the significant reduction in oxygen vacancy density after HPHA.
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Figure 3. Capacitance–voltage (C–V) characteristics of MOS structure measured at frequencies ranging from 5 kHz to 100 kHz for (a) before annealing, (b) after annealing in vacuum, and (c) after HPHA. (d) Extracted interface trap density (Dit) values obtained using the high–low-frequency method at VTH, showing a progressive reduction after annealing and a pronounced decrease following HPHA.
Figure 3. Capacitance–voltage (C–V) characteristics of MOS structure measured at frequencies ranging from 5 kHz to 100 kHz for (a) before annealing, (b) after annealing in vacuum, and (c) after HPHA. (d) Extracted interface trap density (Dit) values obtained using the high–low-frequency method at VTH, showing a progressive reduction after annealing and a pronounced decrease following HPHA.
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Figure 4. (a) Normalized current noise spectral density (SID/ID2) as a function of frequency at VGS = 6 V. All device groups show 1/f-type noise behavior. (b) SID/ID2 at 10 Hz plotted versus VGS–VTH of ZnO TFTs, illustrating a slope change from −2 (number fluctuation model) in the unannealed device to –1 (mobility fluctuation model) after HPHA. (c) Schematic of noise mechanism shift before (left) and after (right) HPHA. Before HPHA, number fluctuation by interfacial traps is dominant, and after HPHA, mobility fluctuation becomes dominant as oxygen-related traps are passivated by hydrogen.
Figure 4. (a) Normalized current noise spectral density (SID/ID2) as a function of frequency at VGS = 6 V. All device groups show 1/f-type noise behavior. (b) SID/ID2 at 10 Hz plotted versus VGS–VTH of ZnO TFTs, illustrating a slope change from −2 (number fluctuation model) in the unannealed device to –1 (mobility fluctuation model) after HPHA. (c) Schematic of noise mechanism shift before (left) and after (right) HPHA. Before HPHA, number fluctuation by interfacial traps is dominant, and after HPHA, mobility fluctuation becomes dominant as oxygen-related traps are passivated by hydrogen.
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Table 1. Extracted key electrical parameters of ZnO TFTs before annealing, after vacuum annealing, and after high-pressure hydrogen annealing (HPHA), enabling a direct comparison of device performance.
Table 1. Extracted key electrical parameters of ZnO TFTs before annealing, after vacuum annealing, and after high-pressure hydrogen annealing (HPHA), enabling a direct comparison of device performance.
Device TypeOn Current
(μA)
Effective
Mobility
(cm2/V·s)
VTH
(V)
On/Off
Ratio
S.S
(mV/dec)
Before annealing0.17 ± 0.021.4 ± 0.150.61 ± 0.101.43 × 108157
Vacuum annealing0.35 ± 0.033.35 ± 0.110.37 ± 0.102.78 × 108133
HPHA0.73± 0.15.31 ± 0.130.16 ± 0.051.32 × 109118
Table 2. Extracted capacitance and Dit value from high–low-frequency C–V method for the device before annealing, after vacuum annealing, and after high-pressure hydrogen annealing (HPHA).
Table 2. Extracted capacitance and Dit value from high–low-frequency C–V method for the device before annealing, after vacuum annealing, and after high-pressure hydrogen annealing (HPHA).
Device TypeCLF
(pF)
CHF
(pF)
COX
(pF)
Dit
(eV−1cm−2)
Before annealing5.433.0712.824.48 × 1012
Vacuum annealing3.602.349.202.31 × 1012
HPHA3.492.6810.631.34 × 1012
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Lee, H.-W.; Kim, M.; Jun, J.H.; Choi, U.; Lee, B.H. Improving the Performance of Ultrathin ZnO TFTs Using High-Pressure Hydrogen Annealing. Nanomaterials 2025, 15, 1484. https://doi.org/10.3390/nano15191484

AMA Style

Lee H-W, Kim M, Jun JH, Choi U, Lee BH. Improving the Performance of Ultrathin ZnO TFTs Using High-Pressure Hydrogen Annealing. Nanomaterials. 2025; 15(19):1484. https://doi.org/10.3390/nano15191484

Chicago/Turabian Style

Lee, Hae-Won, Minjae Kim, Jae Hyeon Jun, Useok Choi, and Byoung Hun Lee. 2025. "Improving the Performance of Ultrathin ZnO TFTs Using High-Pressure Hydrogen Annealing" Nanomaterials 15, no. 19: 1484. https://doi.org/10.3390/nano15191484

APA Style

Lee, H.-W., Kim, M., Jun, J. H., Choi, U., & Lee, B. H. (2025). Improving the Performance of Ultrathin ZnO TFTs Using High-Pressure Hydrogen Annealing. Nanomaterials, 15(19), 1484. https://doi.org/10.3390/nano15191484

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