Radamson, H.H.; Miao, Y.; Zhou, Z.; Wu, Z.; Kong, Z.; Gao, J.; Yang, H.; Ren, Y.; Zhang, Y.; Shi, J.;
et al. CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. Nanomaterials 2024, 14, 837.
https://doi.org/10.3390/nano14100837
AMA Style
Radamson HH, Miao Y, Zhou Z, Wu Z, Kong Z, Gao J, Yang H, Ren Y, Zhang Y, Shi J,
et al. CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. Nanomaterials. 2024; 14(10):837.
https://doi.org/10.3390/nano14100837
Chicago/Turabian Style
Radamson, Henry H., Yuanhao Miao, Ziwei Zhou, Zhenhua Wu, Zhenzhen Kong, Jianfeng Gao, Hong Yang, Yuhui Ren, Yongkui Zhang, Jiangliu Shi,
and et al. 2024. "CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology" Nanomaterials 14, no. 10: 837.
https://doi.org/10.3390/nano14100837
APA Style
Radamson, H. H., Miao, Y., Zhou, Z., Wu, Z., Kong, Z., Gao, J., Yang, H., Ren, Y., Zhang, Y., Shi, J., Xiang, J., Cui, H., Lu, B., Li, J., Liu, J., Lin, H., Xu, H., Li, M., Cao, J.,
... Wang, G.
(2024). CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. Nanomaterials, 14(10), 837.
https://doi.org/10.3390/nano14100837