Lee, J.-A.; Yoon, J.; Hwang, S.; Hwang, H.; Kwon, J.-D.; Lee, S.-K.; Kim, Y.
Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures. Nanomaterials 2023, 13, 2870.
https://doi.org/10.3390/nano13212870
AMA Style
Lee J-A, Yoon J, Hwang S, Hwang H, Kwon J-D, Lee S-K, Kim Y.
Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures. Nanomaterials. 2023; 13(21):2870.
https://doi.org/10.3390/nano13212870
Chicago/Turabian Style
Lee, Ju-Ah, Jongwon Yoon, Seungkwon Hwang, Hyunsang Hwang, Jung-Dae Kwon, Seung-Ki Lee, and Yonghun Kim.
2023. "Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures" Nanomaterials 13, no. 21: 2870.
https://doi.org/10.3390/nano13212870
APA Style
Lee, J.-A., Yoon, J., Hwang, S., Hwang, H., Kwon, J.-D., Lee, S.-K., & Kim, Y.
(2023). Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures. Nanomaterials, 13(21), 2870.
https://doi.org/10.3390/nano13212870