TSRACE-AI: Traffic Sign Recognition Accelerated with Co-Designed Edge AI Based on Hybrid FPGA Architecture for ADAS

The need for efficient and real-time traffic sign recognition has become increasingly important as autonomous vehicles and Advanced Driver Assistance Systems (ADASs) continue to evolve. This study introduces TSRACE-AI, a system that accelerates traffic sign recognition by combining hardware and software in a hybrid architecture deployed on the PYNQ-Z2 FPGA platform. The design employs the Deep Learning Processing Unit (DPU) for hardware acceleration and incorporates 8-bit fixed-point quantization to enhance the performance of the CNN model. The proposed system achieves a 98.85% reduction in latency and a 200.28% increase in throughput compared to similar works, with a trade-off of a 90.35% decrease in power efficiency. Despite this trade-off, the system excels in latency-sensitive applications, demonstrating its suitability for real-time decision-making. By balancing speed and power efficiency, TSRACE-AI offers a compelling solution for integrating traffic sign recognition into ADAS, paving the way for enhanced autonomous driving capabilities.