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FPGA Implementation of Crossover Module of Genetic Algorithm

1
Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC V8W 2Y2, Canada
2
Department of Computer Engineering, Princess Sumaya University for Technology, P.O. Box 1438, Al-Jubeiha, Amman 11941, Jordan
*
Author to whom correspondence should be addressed.
Information 2019, 10(6), 184; https://doi.org/10.3390/info10060184
Received: 3 April 2019 / Revised: 22 May 2019 / Accepted: 23 May 2019 / Published: 28 May 2019
This paper proposes a hardware realization of the crossover module in the genetic algorithm for the travelling salesman problem (TSP). In order to enhance performance, we employ a combination of pipelining and parallelization with a genetic algorithm (GA) processor to improve processing speed, as compared to software implementation. Simulation results showed that the proposed architecture is six times faster than the similar existing architecture. The presented field-programmable gate array (FPGA) implementation of PMX crossover operator is more than 400 times faster than in software. View Full-Text
Keywords: genetic algorithm; crossover; FPGA; TSP genetic algorithm; crossover; FPGA; TSP
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Attarmoghaddam, N.; Li, K.F.; Kanan, A. FPGA Implementation of Crossover Module of Genetic Algorithm. Information 2019, 10, 184.

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