## 1. Introduction

Active elements play an important role in communication subsystems, measurement, biomedical applications, and many other research areas. Standard active devices [

1,

2], commonly used in the latest research works, utilize linear operations in inter-terminal defining relations. This means that transfers between input and output terminals are ideally determined by frequency independent constants (voltage-, current-, transconductance-, or transresistance-gain/attenuation), or/and linear mathematic operations (summation or subtraction). The values of these constants can be electronically controlled in many cases. However, communication systems also require nonlinear operations in order to obtain common signal-processing blocks, such as mixers, modulators, etc. Attempts at trying to design these devices, implementing the so-called modular concept of internal structure, i.e., built from basic subparts with standard linear inter-terminal relations (current differencing transconductance amplifier [

3], current conveyor transconductance amplifier [

2], voltage differencing current conveyor [

2,

4], for example), have been reported. Devices with at least one nonlinear inter-terminal relation and their application potential, have not been frequently studied (it appears that there are only two works in recent literature [

5,

6]). The device presented in [

6] employs commercially available components (a voltage-mode multiplier and current feedback amplifier). However, the proposed multiplication-mode current conveyor (MMCC) reported in [

5,

6], has some important drawbacks: (a) the MMCC element does not provide immediate results for the operation of multiplication in the form of current-sourced signal (therefore, it is not suitable for simple and direct creation of electronically controllable inverting/noninverting amplifiers, current-/voltage-mode integrators, etc., with a minimal number of external passive elements); (b) summation/subtraction operations are not directly available in the frame of the designed MMCC device (therefore, employment of the device as part of the chain in multi-feedback systems is much more difficult in the case of filters and oscillators). Our contribution presents an active device for direct providing the operations of multiplication, voltage summing, and subtraction, in a so-called multiplied input differential difference amplifier (MIDDA). A MIDDA addresses the issues previously noted, relating to MMCC elements. Its features are fully utilized in the nonlinear application of a double-sideband amplitude modulator (AM-DSB), that is not directly available with the help of previously reported MMCC elements (additional active circuitry must be included in order to obtain the same function, and therefore the final application is much more complex).

## 2. A Multiplied Input Differential Difference Amplifier

This active device was developed because of the requirement for electronically controllable active blocks (integrators, amplifiers, etc.), as well as the requirement for devices which provide a nonlinear operation of multiplication that is useful for analogue systems, as previously mentioned. A MIDDA partially operates as a voltage differencing differential difference amplifier (VDDDA), reported in [

7,

8]. However, the multiplication of signals at the input section is a new feature which is not provided by VDDDA elements.

Figure 1 explains the small-signal behaviour of a MIDDA.

Figure 1a includes the block structure of a MIDDA. This topology was preserved in case of implementation using CMOS technology. The first subpart of a MIDDA, depicted in

Figure 1a, is indicated by a MLT (multiplier) with a current output terminal. Note that our design was inspired by the solution presented in [

9]. However, it was completely redesigned, and supplemented by an input linearization system and a boosting operational transconductance amplifier [

1,

2]; this is visible in the full transistor structure, shown in

Figure 2. When studying our design in detail, it is possible to observe some important differences to [

9], as follows: (a) a redesign of the multiplying core, providing better dynamics and using larger bias current, allowing a wider range of the input voltage signal, as well as the speed and frequency bandwidth; (b) input linearizing attenuators, designed to improve applications with linear operations; and (c) an additional operational transconductance amplifier output section, required for the boosting of the output current and overall transconductance. The output operational transconductance amplifier was designed with cascoded current mirrors exhibiting auxiliary biasing (classical cascoded mirrors are not applicable in extremely low-voltage processes because of limited voltage space).

A new solution, which utilizes a CMOS voltage differential difference buffer (VDDB), forming the second subpart of the MIDDA (also shown in

Figure 1a), differs from the classical concept of a VDDDA [

8]. As becomes obvious when studying the internal structure of the VDDB depicted in

Figure 2, the CMOS circuitry is completely different, and much more complex, than the simple structures presented in [

7,

8]). The key difference is that our solution is based on folded-cascode architecture, and includes both NMOS and PMOS differential pairs. The CMOS process C035 I3T25 (ON Semiconductor) 0.35 μm (3.3 V) was chosen for the design and fabrication of the MIDDA prototype because it was the most suitable technology for our study.

Figure 1b shows an overview of the layout of the fabricated device. Unfortunately, a microphotograph is not available due to technologically-unavoidable plating, placed above the fabricated die in I3T technologies. The MIDDA element has four voltage input terminals (

Y,

X,

n,

p), one output terminal

o, and one auxiliary terminal

z. The operation of the device can be defined using the following simple inter-terminal relations:

I_{z} =

V_{X} ×

V_{Y} ×

k,

V_{o} =

V_{z} −

V_{n} +

V_{p}, where

k (given by technological constants and dimensions of key transistors in internal structures) can be expressed using:

Design constants are:

K_{Pn} = 136 μA/V

^{2},

K_{Pp} = 29 μA/V

^{2},

V_{thn} = 0.6 V, and

V_{thp} = −0.62 V, for NMOS and PMOS in this I3T CMOS technology. The multiplying constant

k was obtained from the detailed analysis of the MLT subpart. The first term of (1) represents the contribution of auxiliary linearization and attenuation blocks (components including M

_{X1,2} and M

_{Y1,2} with resistors

R_{a} and

R_{b}, as visible from

Figure 2). The second term of (1) covers the effect of differential pairs of the multiplying core (transistors M

_{1–4} and M

_{5–6} and their aspect ratios), and the conversion of the output current of these transistors, to the differential output voltage of the

R_{L} resistors. The last term (right side of (1)) includes the contribution of boosting the output transconductance amplifier (aspect ratio of M

_{7,8} and 4

I_{bias}_{1}, derived from

I_{bias}_{1} through biasing current mirrors, see

Figure 2). Constant 5 represents the effect of the current gain of internal mirrors on the boosting transconductance amplifier. Note that a hand calculation of

k yields a value of about −2 mA/V

^{2}, whereas a simulation provides a value of about −1.8 mA/V

^{2} (note that the multiplier is inverting in basic configuration). This mismatch is caused by several inaccuracies in the ideal calculation: (a) a non-equal bulk and source voltage

V_{BS} ≠ 0 V for some transistors (differential pairs where bulk terminals are connected to

V_{DD} or

V_{SS}), which impacts the

V_{th} and transconductance of partial specific transistors; (b) the rounding of resistor values (exact value supposes multiplication of 0.975 kΩ/square); (c) a process and temperature dependence of

K_{P(n,p}_{)}, as well as partial transconductances of CMOS transistors in proposed topology. The real experimental value of the

k parameter equal to −1.3 mA/V

^{2}, falls into the range of the predicted values from Monte Carlo and corner analyses. The CMOS structure of the MIDDA element, including W/L aspect ratios of all the transistors, values of passive elements, and biasing sources, are shown in

Figure 2. Note that not all ESD precautions and bulk connections (NMOS to

V_{SS}, PMOS to

V_{DD}) are included in

Figure 2, because of simplicity.

The linear ranges of DC transfer characteristics of the real MLT section are limited up to ±500 mV for inputs

X and

Y, and up to ±350 μA for the auxiliary terminal

z. The examples of measured DC transfer characteristics between input voltage (

V_{Y}) and output current (

I_{Z}), are shown in

Figure 3a;

V_{X} serves as the DC constant, driving overall transconductance (in accordance to

g_{m} ≅ 1.3 × 10

^{−3} V_{X}). The gain bandwidth (GBW) of the real prototype overcomes 48 MHz for the MLT subpart of the MIDDA (

Figure 3b). The sweep of voltage

V_{X} between ±0.05 and ±0.5 V, causes a change in

g_{m} between ±60 μS and ±660 μS (both polarities of

g_{m} are available by the DC control voltage, in comparison to a standard operational transconductance amplifier [

1]), as illustrated by a graph shown in

Figure 4. The DC input and output linear range of VDDB reaches approximately ±700 mV (range is valid for inputs

z,

n,

p, and output

o), as shown in

Figure 5a. The bandwidth (3 dB) of the VDDB part is 45.1 MHz or more, based on the particular configuration (see

Figure 5b). Full, detailed information relating to the overall MIDDA performance is summarized in

Table 1, including the results of the real experiments. It always covers the whole range of tunability for the controllable parameters. Even in the case when characteristics are asymmetrical in positive and negative corners, i.e., limits of linearity in positive and negative polarity are not symmetrical. Note that the ranges mentioned above are valid when symmetrical operation is required, i.e., absolute values of parameters are the same in both polarities in the case of the ranges mentioned above, which are the most useful in practice.

The examples of simple linear and nonlinear operations of the MIDDA are shown in

Figure 6.

Figure 6a presents the typical DC response of the MLT subpart, producing an output current

I_{z} as a nonlinear parabolic function of the input voltages

V_{X} =

V_{Y} =

V_{inp}. This behaviour can be confirmed in the time domain (

Figure 6b), where sine wave excitation creates output current with single polarity (negative due to negative

k) and double frequency.

Figure 6c,d provide an overview of the linear operation in time domain. The first figure represents the summation

V_{o} =

V_{p} +

V_{z} (

Figure 6c), and the second figure provides the results of the operation of subtraction

V_{o} =

V_{p} −

V_{n} (

Figure 6d). In both cases, square-wave excitations were provided in order to also present the stability of the device. All of these results confirm VDDB functionality, as well as transient responses for sine wave excitation (

Figure 6e). All accompanying details are included in

Figure 6.

The proposed MIDDA is beneficial for utilization in linear, and especially nonlinear, applications. When a signal is connected to the Y terminal and a DC voltage is provided to the X terminal, this serves for a tuning of the overall transconductance g_{m} (k × V_{X} = g_{m}), for example, the MIDDA usually operates in the linear applications. Nonlinear applications require a multiplier—both inputs (Y and X) are used for signal operations, as in the case of the AM modulator, for example.

## 5. Conclusions

The MIDDA device presented in this paper offers the following advantageous features, simultaneously: (a) the possibility to construct lossless, non/inverting voltage- or current-mode integrators with electronically controllable parameters, when only one external and grounded capacitor is added (useful for application in linear active filters, oscillators, and other subsystems)—to the best of authors’ knowledge, none of the commercially available multipliers have an accessible output response in the form of current; (b) the nonlinear operation of multiplication is available (for purposes of modulation, demodulation, mixing, shaping, etc., as was proven by this paper); (c) the direct availability of summation/subtraction operations (useful for multi-feedback systems); (d) it excludes utilization of opamp-based differential-summing amplifiers, including floating feedback resistors in the VDDB subpart, see internal structure of AD633, HA2556 , for example, due to a different concept of the CMOS structure; (e) comparable or better features to commercially available solutions (GBW, voltage ranges, offsets), even under lower supply voltages (±1.65 V). The proposed MIDDA device can be easily applied in miniaturized IC solutions for amplitude modulation and demodulation purposes, in long-wave and medium-wave communication systems. In comparison to [

5,

6], the MIDDA can be easily used for AM-DSB modulation (

Figure 9), whereas MMCC suffers from the unavailability of output operation of summation of product of modulation and carrier wave with carrier wave. To the best of the authors’ knowledge, this device is the very first fabricated prototype based on the differential difference principle in the output section, and allows multiplication at the input section simultaneously.

We suppose that the future will see the development of many other (more complex) electronically controlled applications of MIDDA, in the field of harmonic oscillators (the useful methods for their synthesis are discussed in [

24] for example), generators, multi-feedback active filters, and active filters, with electronically reconfigurable transfer responses [

20,

23], immittance converters, etc.