Design of a Low-Noise Electromagnetic Flow Converter Based on Dual-Frequency Sine Excitation

Abstract

Electromagnetic flowmeters face significant challenges in measuring complex fluids, characterized by weak flow signals and severe noise interference. Conventional solutions, such as dual-frequency rectangular wave excitation, suffer from multiple drawbacks including rich harmonic components, high electromagnetic noise during switching transitions, a propensity for resonance which shortens stabilization time, reduced sampling windows, and complex circuit implementation. Similarly, traditional single-frequency excitation struggles to balance zero stability with the suppression of slurry noise. To address these limitations, this paper proposes a novel converter design based on dual-frequency sinusoidal wave excitation. A pure hardware circuit is used to generate the composite excitation signal, which superimposes low-frequency and high-frequency components. This approach eliminates the need for a master control chip in signal generation, thereby reducing both circuit complexity and computational resource allocation. The signal processing chain employs a technique of “high-order Butterworth separation filtering combined with synchronous demodulation,” effectively suppressing power frequency, orthogonal, and in-phase interference, achieving an improvement in interference rejection by approximately three orders of magnitude (1000×). Experimental results show that the proposed converter featured simplified circuitry, achieved a measurement accuracy of class 0.5, and validated the overall feasibility of the scheme.

1. Introduction

Electromagnetic flowmeters operate based on Faraday’s law of electromagnetic induction, measuring flow by detecting the induced electromotive force (EMF) generated when conductive fluid moves through a magnetic field. Due to their simple structure, absence of flow-obstructing components, and high measurement accuracy, they are widely used in complex industrial settings such as petrochemicals, water irrigation, and environmental protection [1,2,3]. As the core component of an electromagnetic flowmeter, the converter is responsible for generating the excitation signal, acquiring weak signals, and suppressing interference [4], its performance directly determines the overall measurement capability of the instrument [5].

Excitation technology is a key determinant of electromagnetic flowmeter performance. Its evolution has progressed from early power frequency excitation to low-frequency rectangular wave excitation, and further to modern three-value rectangular wave, high-frequency rectangular wave, and dual-frequency rectangular wave excitation [6,7,8]. Traditional single-frequency excitation methods often struggle to simultaneously meet the requirements for zero stability and response speed: low-frequency excitation offers stable zero point but slow response, while high-frequency excitation provides fast response but is prone to introducing interference. The core challenge in complex fluid measurement—slurry noise—is primarily distributed in the low-frequency range, and its frequency components decrease as the excitation frequency increases. To address this issue, researchers have proposed dual-frequency excitation techniques, such as the dual-frequency rectangular wave excitation scheme from Yokogawa Electric Corporation. By superimposing a high-frequency rectangular wave onto a low-frequency one, this approach combines the advantages of both frequencies, significantly improving measurement accuracy for complex fluids like slurry [9], although technical details are not disclosed. Liu et al. [10] studied and compared two implementation methods for dual-frequency rectangular waves, finding that composite dual-frequency square wave excitation presented significant circuit design difficulties, ultimately adopting a time-division dual-frequency square wave scheme, which suffers from the drawback of non-synchronization between high and low-frequency components. However, rectangular wave excitation inherently contains rich high-order harmonics, and its switching control implementation generates significant electromagnetic noise and voltage spikes, easily induces resonance leading to short waveform stabilization times, and imposes stringent requirements on sampling window design and spike suppression circuits, resulting in high engineering implementation costs [11].

In contrast, sinusoidal wave excitation offers unique advantages such as fewer harmonic components and lower electromagnetic noise, showing significant potential in applications with stringent Electromagnetic Compatibility (EMC) requirements. Currently, the mainstream excitation method is low-frequency rectangular wave, with very limited research on sinusoidal wave excitation. A. Gorgenyi et al. [12] at the Budapest Institute of Technology proposed a solution to reduce system power consumption by generating sine wave excitation signals via a lookup table using digital signal processor (DSP), and converting voltage to current through a D-class amplifier to drive the excitation coil. Wang et al. [13] improves electromagnetic flowmeter accuracy by optimizing excitation waveforms, applying multi-stage filtering, and using Complex Programmable Logic Device (CPLD)-based rectification. To fill this research gap and simultaneously address the defects of dual-frequency rectangular wave excitation, this paper proposes an electromagnetic flow converter based on dual-frequency sinusoidal excitation. The main contributions of this paper are: (1) Proposing a pure hardware-implemented dual-frequency sinusoidal excitation scheme that balances zero stability and dynamic response, while avoiding the microcontroller unit (MCU) resource consumption and noise introduced by digital circuits inherent in digital-to-analog converter (DAC) lookup table or sinusoidal pulse width modulation (SPWM) methods, thereby reducing circuit control complexity. (2) Designing a high-interference-immunity signal processing chain based on high-order Butterworth filters and synchronous demodulation technology, significantly enhancing the system’s ability to suppress power frequency and other coherent interference. (3) Experimentally validating the effectiveness of the proposed scheme, achieving a measurement accuracy of class 0.5, thus providing a high-performance, low-cost solution for complex fluid measurement.

The converter proposed in this paper is designed to measure the volumetric flow rate of conductive fluids, with particular emphasis on addressing the challenge of slurry noise in complex, heterogeneous fluids prevalent in industries such as mining, pulp and paper, and wastewater treatment.

2. Mathematical Model of Dual-Frequency Sinusoidal Wave Excitation

In an electromagnetic flowmeter, when electrically conductive liquid flows through the pipe, the sensor electrodes generate an induced EMF proportional to the fluid velocity. The general expression is

$$E=kBDv$$

(1)

where $k$ is the meter coefficient, $D$ is the pipe inner diameter, $B$ is the magnetic flux density, $v$ is the average flow velocity in the pipe, and $E$ is the induced EMF [14].

The flow signal sensed by the sensor as the potential difference between the electrodes is a voltage signal. Due to electromagnetic induction, electrostatic induction, and electrochemical potentials, the voltage obtained at the electrodes is not only the flow-induced EMF but also includes various interference components [15]. The signal model can be established as follows:

$$E=kBvD+k_w{\displaystyle \frac{dB}{dt}}+k_t{\displaystyle \frac{d^{2}B}{d{t}^2}}+V_{noise}$$

(2)

where ${\displaystyle \frac{dB}{dt}}$ represents the quadrature interference caused by the rate of change of the magnetic field, ${\displaystyle \frac{d^{2}B}{d{t}^2}}$ represents the in-phase interference caused by the second-order derivative of the magnetic field, and $V_{noise}$ includes power frequency interference, slurry noise, etc. $k_w$ and $k_t$ are interference coefficients determined by circuit parasitic parameters.

The dual-frequency sinusoidal excitation signal proposed in this paper is composed of a superimposed low-frequency sinusoidal wave and a high-frequency sinusoidal wave, and the magnetic flux density is consistent with the excitation current waveform and phase. Defining the magnetic flux densities for the low-frequency and high-frequency components as: $B_l=B_1\sin \left(w_{1}t\right), B_h=B_2\sin \left(w_{2}t\right)$, where: $B_1$, $B_2$ are the amplitudes of the low-frequency and high-frequency magnetic flux densities; $w_1=2\pi f_1$, $w_2=2\pi f_2$ ($f_1$ = 5 Hz, $f_2$ = 200 Hz). $w_1, w_2$ is the angular frequency, $f_1, f_2$ is the frequency and t is the time.

The total magnetic flux density is $B=B_1\sin \left(w_{1}t\right)+B_2\sin \left(w_{2}t\right)$.

Taking the low-frequency channel as an example, substituting $B_l$ into Equation (2) generates

$$\begin{array}{l}E=kBvD+k_w{\displaystyle \frac{dB}{dt}}+k_t{\displaystyle \frac{d^{2}B}{d{t}^2}}\\ \hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}=k{B}_{1}vD\sin \left(w_{1}t\right)+k_w{B}_1{w}_1\cos \left(w_{1}t\right)-k_t{B}_1{w_1}^2\sin \left(w_{1}t\right)\end{array}$$

(3)

The core of signal processing is synchronous demodulation. A reference signal $U_R=A\sin \left(w_{1}t\right)$, which is synchronous and in-phase, is obtained from the excitation current sampling resistor. Multiplying $E$ by $U_R$ in Equation (3) and simplifying using trigonometric identities yields the voltage $U_m$:

$$\begin{array}{l}{U}_m=\left({\displaystyle \frac{kA{B}_{1}vD}{2}}-{\displaystyle \frac{k_{t}A{B}_1{w_1}^2}{2}}\right)+({\displaystyle \frac{k_{w}A{B}_1{w}_1\sin \left(2w_1\right)t}{2}}-{\displaystyle \frac{kA{B}_{1}vD\cos \left(2w_1\right)t}{2}}\\ \hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}\hspace{1em}+{\displaystyle \frac{k_{t}A{B}_1{w_1}^2\cos \left(2w_1\right)t}{2}})\end{array}$$

(4)

From this equation, it can be seen that the voltage signal from the multiplier includes both direct current signal (DC) $\left({\displaystyle \frac{kA{B}_{1}vD}{2}}-{\displaystyle \frac{k_{t}A{B}_1{w_1}^2}{2}}\right)$ and alternating current signal (AC) $\left({\displaystyle \frac{k_{w}A{B}_1{w}_1\sin \left(2w_1\right)t}{2}}-{\displaystyle \frac{kA{B}_{1}vD\cos \left(2w_1\right)t}{2}}+{\displaystyle \frac{k_{t}A{B}_1{w_1}^2\cos \left(2w_1\right)t}{2}}\right)$ components. After low-pass filtering, the AC components are removed, extracting the DC information proportional to the flow velocity v. Similarly, at the same time, the same synchronous demodulation operation is performed for the high-frequency channel to obtain the flow velocity signal corresponding to the high-frequency channel. The signals from the two frequencies are then superimposed to obtain the final DC signal related to the flow rate, while effectively suppressing 50 Hz power frequency interference.

3. System Design

3.1. Overall Architecture

The converter is designed based on a three-stage architecture of “Excitation Generation—Signal Acquisition—Processing & Output,” with the STM32G4 (STMicroelectronics, Agrate Brianza, Italy) microcontroller (MCU) as the core. The power supply circuit converts 220 V AC mains power to multiple DC voltage levels to power various modules. A Wien-Bridge oscillator generates the dual-frequency sinusoidal excitation signal, which is then driven by a constant current source to energize the excitation coils, producing a stable magnetic field. When fluid flows through this magnetic field, the sensor electrodes output a weak induced signal (mV level), which is converted into a clean DC signal through the anti-interference signal processing circuit (pre-amplification, separation filtering, secondary amplification, and multiplication fusion) removes noise signals [16]. The MCU acquires DC signals via the analog-to-digital converter (ADC), processes them through digital filtering, and outputs the flow velocity value through the communication interfaces. The overall system hardware block diagram is shown in Figure 1.

3.2. Hardware Circuit Design

3.2.1. Cascaded Power Supply Circuit

The system modules have diverse voltage requirements, so a “Switching Regulator + low dropout regulator (LDO)” cascaded scheme is designed to balance efficiency and ripple rejection. The input stage uses a switching regulator to step down 220 V AC to 24 V/1.5 A DC, with ripple < 150 mV. The second stage employs a Buck converter chip TPS54560 (Texas Instruments, Dallas, TX, USA) (efficiency ≥ 92%) to convert 24 V to −24 V and ±15 V. The precision supply stage uses LDO chips to convert ±15 V to ±12 V and 3.3 V for the Wien-Bridge oscillator, filter circuits, and the MCU, with output noise only a few μV, meeting the power supply noise requirements for weak signal processing.

The Buck converter circuit is shown in Figure 2.

Input voltage V_in passes through input filter capacitors before entering the Buck converter integrated circuit (IC). C₁₇₃ is a large electrolytic capacitor responsible for providing voltage buffering for the IC. Parallel capacitors C₁₇₄ and C₁₇₅ are small ceramic capacitors used to reduce equivalent series resistance (ESR) and filter high-frequency noise from the input voltage, thereby reducing ripple voltage. R₁₁₁ and R₁₁₅ form a voltage divider network connected to the IC’s enable (EN) pin, controlling its enable and disable state. C₁₆₉ is the bootstrap capacitor for the internal metal-oxide-semiconductor field-effect transistor (MOSFET), providing the gate drive voltage. R₁₁₂, C₁₇₆ and C₁₇₇ form the loop compensation network to ensure stability. R₁₁₀ and R₁₁₄ form the output voltage feedback divider network, sending a negative feedback signal to the internal feedback input (FB) pin, which works with the internal reference voltage to regulate the output voltage. C₁₇₂, C₁₇₀ and C₁₇₁ are output filter capacitors, serving a similar purpose as the input capacitors—stabilizing the output voltage and reducing ripple. Inductor L₁ serves as the energy storage element, utilizing the principle that inductor current cannot change instantaneously; it charges and discharges cyclically through the switching action of the internal MOSFET, providing energy to the subsequent stage. To reduce ripple voltage, the design considerations include appropriately increasing output capacitance while decreasing ESR, and increasing the switching frequency and the value of L₁.

3.2.2. Dual-Frequency Sinusoidal Excitation Circuit

The excitation circuit consists of “Wien-Bridge Signal Generator + Constant Current Source” to generate stable dual-frequency sinusoidal signals.

To produce stable, pure dual-frequency sinusoidal waves, this design abandons the MCU-resource-consuming DAC lookup table method and the complex SPWM method [16], opting instead for a pure analog circuit solution—dual Wien-Bridge sinusoidal oscillators [17,18], generating low-frequency 5 Hz and high-frequency 200 Hz sinusoidal signals separately, which are then superimposed to obtain the dual-frequency signal. This scheme offers output signals with low harmonic distortion, stable frequency, and requires no MCU intervention, avoiding MCU resource usage. The Wien-Bridge circuit is shown in Figure 3.

The Wien-Bridge oscillator circuit consists of two parts: an amplifier circuit and a frequency-selective network. C₁, C₂, R₁ and R₂ form the frequency-selective network and provide positive feedback to the non-inverting input.

R₃, R₄, R₅, D₁, and D₂ form the amplifier circuit, providing negative feedback to the op-amp’s inverting input. The output signal frequency of this circuit is determined by the frequency-selective network:

$$f={\displaystyle \frac{1}{2\pi RC}}={\displaystyle \frac{1}{2\pi \sqrt{R_1{R}_2{C}_1{C}_2}}}$$

The amplifier circuit can be viewed as a non-inverting amplifier with a gain of

$$A_u=1+{\displaystyle \frac{R_4}{R_3}}$$

When the circuit gain is greater than 3, positive feedback dominates, causing the circuit to oscillate but unstably, with oscillations growing continuously. When the gain is less than 3, negative feedback dominates, and the circuit fails to oscillate. Only when the gain is exactly 3 does the circuit operate continuously and stably. To stabilize the amplitude, a nonlinear network composed of diodes (D₁, D₂) and resistor R₅, is introduced into the negative feedback loop. This network dynamically adjusts the feedback factor, keeping the circuit operating at the critical state, resulting in a sinusoidal wave output with low harmonic distortion and stable frequency.

The simulation result of the dual-frequency sinusoidal wave generated using Multisim is shown in Figure 4, demonstrating stable amplitude and frequency.

3.2.3. Constant Current Source Drive Circuit

The output signal from the Wien-Bridge circuit is small and insufficient to drive the excitation coils directly. A power operational amplifier, combined with peripheral circuitry, is used to design a voltage-to-current conversion constant current source circuit. This provides a constant excitation current signal to drive the excitation coils, producing a constant magnetic field. Compared to constant voltage drive, constant current drive is more stable, as it is unaffected by changes in the excitation coil’s impedance. The constant current source circuit is shown in Figure 5.

Based on the operational amplifier’s “virtual short and virtual open” principles, ${\mathrm{V}}_{{\mathrm{R}}_{10}}={\mathrm{V}}_{-}={\mathrm{V}}_{+}={\mathrm{V}}_{\mathrm{in}}$. The current flowing through the sense resistor R₁₀ and the excitation coil is $I={\displaystyle \frac{V_{in}}{R_{10}}}$. This current value depends solely on the input voltage ${\mathrm{V}}_{\mathrm{in}}$ and the sense resistor R₁₀, and is independent of the coil impedance, thereby ensuring the stability and waveform fidelity of the excitation current.

Figure 6 shows the measured excitation current waveform after practical debugging, demonstrating high consistency with the simulation results, exhibiting a pure and stable waveform.

3.2.4. High Anti-Interference Signal Processing Circuit

Addressing the fact that the measurement electrode output signal is weak (only a few mV), contains substantial noise and has high source impedance and that interference coupled from the power supply (power frequency) and generated by the alternating magnetic field can have amplitudes far greater than the flow signal, a four-stage processing circuit is designed: “Pre-filtering—Separation Filtering—Secondary Amplification—Synchronous Demodulation & Fusion” [19,20]. The signal processing block diagram is shown in Figure 7.

Due to the high signal source impedance, the signal processing module first employs a high-input-impedance, high-Common-Mode Rejection Ratio (CMRR > 100 dB) instrumentation amplifier for differential amplification. To avoid saturation and excessive amplification of noise initially, a relatively low gain is set (typically around 10 times, adjustable via R29). The amplification circuit is shown in Figure 8.

After removing the effects of the DC polarization voltage through a preceding high-pass filter circuit, the signal is amplified by the instrumentation amplifier.

To effectively separate the low-frequency and high-frequency signals and strongly suppress the 50 Hz power frequency interference, a high-order separation filter bank is designed. The Butterworth filter features the flattest possible passband response, making it suitable for designing this high anti-interference signal processing circuit. Based on the Butterworth filter’s amplitude-frequency response characteristics, a fifth-order Butterworth low-pass filter circuit is designed to suppress interference signals [17]. The fifth-order Butterworth low-pass filter circuit is shown in Figure 9.

Figure 10 shows the signal attenuation ratios corresponding to 5 Hz and 50 Hz.

A comparison of the Bode plots shows that the 5 Hz signal experiences almost no attenuation, while the 50 Hz power frequency interference signal is attenuated by approximately −30 dB, achieving deep suppression of power frequency interference.

The designed fifth-order Butterworth high-pass filter circuit is shown in Figure 11. Its Bode plot is shown in Figure 12.

The Bode plot indicates that power frequency interference (50 Hz) is significantly attenuated (approx. −28 dB), while the useful high-frequency (200 Hz) signal from the dual-frequency excitation experiences almost no attenuation, achieving signal separation.

This separation high-order filter bank circuit achieves deep suppression of power frequency (50 Hz) noise while fully preserving the dual-frequency signals.

The secondary amplification circuit is shown in Figure 13.

The gain of this stage is adjusted by resistors R₄₃ and R₄₂. Based on the characteristics of the non-inverting operational amplifier, the gain is calculated as $\left(1+{\displaystyle \frac{R_{43}}{R_{42}}}\right)$. In this stage, the mV-level signal is amplified to the Volt level, meeting the ADC input range (0–3.3 V) and placing the signal near the center of the ADC’s sampling range for higher accuracy.

After the sensor electrode signal and the current sense resistor signal pass through their respective designed filter circuits, the corresponding high-frequency and low-frequency voltages are obtained. Signals of the same frequency are demodulated using multipliers. Subsequently, low-pass filters remove the quadrature and in-phase interference [21]. An summing circuit then combines the information from the high-frequency and low-frequency channels to obtain the complete DC signal related to flow velocity. This voltage is acquired by the STM32’s ADC, and flow velocity information can be displayed in real-time via communication interfaces such as universal asynchronous receiver/transmitter(UART).

4. Software Design

The software design adopts a modular approach, primarily including initialization, ADC data acquisition, digital filtering, and data output modules. The main workflow is shown in Figure 14.

After power-on, the system clock, ADC, direct memory access (DMA), timers, and UART are initialized. A timer triggers the ADC at a fixed frequency (satisfying the Nyquist sampling theorem) to sample the processed flow voltage signal. The ADC uses DMA to transfer sampled data cyclically to a memory buffer, eliminating the need for frequent central processing unit (CPU) intervention and improving efficiency. The main loop program continuously checks the DMA transfer completion flag. Once the flag is set, the CPU performs digital filtering (moving average filter) on the data in the buffer, then calculates the flow velocity information based on the calibration formula, and outputs it through UART.

5. Experimental Results and Analysis

5.1. Circuit Function Verification

To validate the effectiveness of the signal processing chain, a signal generator was used to simulate the weak output signal from the sensor (including noise). Figure 15 shows the input simulated signal, where the useful signal is almost submerged by noises. After processing by the designed converter, the output signal acquired by the ADC is shown in Figure 16, which has been restored to a stable, smooth DC voltage signal. Comparing the two figures fully demonstrates the excellent anti-interference capability of the designed hardware circuit.

5.2. Flow Velocity Experiment and Accuracy Test

The standard signal generator of electromagnetic flowmeter (produced by Shenyang Lanshen Electric Co., Ltd. in Shenyang, China) was used in the experiment. The experimental installation (Figure 17) connected the excitation current to the simulator’s coil interface, and the simulator’s output to the converter’s input. Flow velocity was adjusted via a knob; the converter connected to a computer via UART for real-time display.

The results are shown in

Table 1. Calibration Measurement Results.

No.	Calibrated Velocity (m/s)	Measured Velocity (m/s)	Relative Error (%)
1	0.1	0.1004	0.40
		0.0996
		0.1008
2	0.2	0.2007	0.35
		0.2009
		0.2005
3	0.5	0.4989	0.22
		0.4992
		0.4986
4	1.0	1.0017	0.17
		1.0015
		1.0019
5	2.0	2.0041	0.21
		2.0036
		2.0046
6	5.0	5.0090	0.18
		5.0093
		5.0087

. Three measurements per point show maximum relative error of 0.40% within 0.1–5.0 m/s range; all errors within ±0.5%, meeting class 0.5 accuracy.

5.3. Comparative Analysis

Comparison with existing research (

Table 2. Comparison with Existing Research.

Excitation Technology	Circuit Complexity	Sampling Window	Noise Level
Dual-Freq. Rectangular Wave [9,17]	High (MCU control H-bridge + spike suppression)	<25%	High
Time-Division Dual-Freq. Square Wave [10]	Medium (MCU time-sharing control H-bridge + spike suppression)	<25%	High
Dual-Freq. SPWM [16]	High (MCU control H-bridge + spike suppression)	<25%	High
Dual-Freq. Sinusoidal Wave	Low(Pure Hardware)	100%	Low

) indicates that the proposed scheme achieves reduced circuit complexity and enhanced source noise suppression while maintaining accuracy.

6. Conclusions

In this paper, a new pure hardware scheme of dual-frequency sinusoidal excitation is designed, and a signal processing chain of high-order separation filtering and synchronous demodulation is combined to construct a high-performance, low-noise electromagnetic flow transducer system, which can solve the problems of slurry noise and power frequency interference in complex fluid measurement.

The design uses a pure hardware-generated dual-frequency sinusoidal excitation signal, combining advantages of low harmonics, low noise, and dual-frequency measurement. Compared to the short stabilization time and limited sampling window of dual-frequency rectangular wave excitation, the sinusoidal excitation is not constrained by the sampling window. Furthermore, compared to the complex excitation switch control circuits (H-bridge) and spike suppression circuits required for existing dual-frequency rectangular wave and SPWM methods, the proposed circuit is simpler, more reliable, and does not necessitate complex MCU logic control. The signal processing method of “high-order Butterworth separation filtering + synchronous demodulation” is used to suppress the power frequency, orthogonal and in-phase interference, and the suppression ability is improved nearly 1000 times.

The experimental validation based on a standard flow signal simulator demonstrates that the proposed converter circuit achieves a measurement accuracy of class 0.5 under test conditions, and its interference rejection capability is improved by approximately three orders of magnitude. These results substantiate the feasibility and performance potential of the proposed design for complex fluid measurement. This work provides a low-cost, high-reliability technical solution for complex fluid measurement. Future work will focus on optimizing the low/high frequency combination for different slurry characteristics and conducting long-term industrial field tests to validate reliability under harsh conditions.