Dynamic Response Control of Dual Active Bridge Converters Incorporating Current Stress Optimization

Abstract

In microgrid systems, due to the strong intermittency and randomness exhibited by solar energy and wind energy, significant challenges are posed to the stable power supply and normal operation of actuators. Thus, bidirectional DC-DC converters are required to possess excellent steady-state characteristics and dynamic response performance. This paper presents an active disturbance rejection control (ADRC) method for dual active bridge (DAB) converters incorporating current stress optimization, centering on the analysis and investigation of the integrated technique of current stress optimization and ADRC for DAB converters under triple-phase-shift (TPS) control. Based on TPS modulation, the optimal current stress strategies corresponding to different operating modes are deduced. Meanwhile, an ADRC closed-loop is established, where the extended state observer (ESO) performs real-time estimation of system states and compensates for system disturbances. Furthermore, a unified control model is constructed, facilitating flexible trade-off between control complexity and performance. Finally, a simulation scheme is designed to compare the performance of different control schemes, and the simulation results verify the feasibility and superiority of the proposed strategy.

1. Introduction

With the growing public attention to environmental protection, renewable energy has garnered widespread attention, and microgrid systems based on renewable energy have experienced rapid development. Microgrid systems provide sufficient electrical energy for the normal operation of various actuators. However, the high intermittency and randomness of solar and wind energy lead to large power fluctuations on the DC bus, which will impact the operation of actuators and even damage them. Therefore, there is an urgent and demanding requirement for the steady-state characteristics and dynamic response performance of bidirectional DC-DC converters connected between energy storage elements and the DC bus, making it an important research topic in the field of actuators [1,2,3,4].

The dual active bridge (DAB) converter has gradually become a research hotspot for bidirectional DC-DC converters due to its advantages such as modular series-parallel connection and soft switching [5]. The single-phase-shift (SPS) control strategy offers benefits, but it suffers from problems such as large current stress and excessive backflow power.

To address these issues, ref. [6] proposed a backflow power optimization strategy based on dual-phase-shift (DPS) modulation. While optimizing backflow power, this strategy can reduce inductor current stress, but it does not achieve a global optimal solution. Ref. [7], based on DPS modulation, realized the goal of low current stress through reasonable design of magnetizing inductance and analysis of the zero-voltage switching (ZVS) mechanism and power characteristics considering switch junction capacitors. On the basis of SPS, ref. [8] introduced an inner phase-shift angle (PSA), namely extended-phase-shift (EPS) modulation, which unifies backflow power and transmission power into an integral function for multi-objective optimization, thereby gradually improving converter efficiency. Ref. [9] proposed a PSA optimization scheme under EPS modulation, with the core objective of minimizing the reactive power borne by the equivalent leakage inductance of the high-frequency transformer; however, this scheme cannot guarantee optimal converter performance. Refs. [10,11] adopted triple-phase-shift (TPS) modulation and achieved favorable current stress optimization results. Nevertheless, due to the presence of three control degrees of freedom, modeling analysis and control implementation are relatively complex.

The aforementioned studies only focus on optimizing the steady-state characteristics of the converter and do not discuss its dynamic performance. Additionally, the output voltage is tracked solely through a single proportional-integral (PI) controller, resulting in poor dynamic performance.

To enhance the dynamic performance, ref. [12] adopted load current feedforward control. This algorithm exhibits good dynamic performance when facing load fluctuations; however, the single load current feedforward control has limited effectiveness in addressing other disturbances such as changes in hardware parameters. Therefore, feedforward control generally needs to be combined with other control strategies. The above-mentioned control strategy adopts SPS modulation, making it difficult to balance the optimization of dynamic performance with steady-state performance. To equip DAB converters with high dynamic and steady-state performance, an output voltage model predictive control strategy was put forward in [13] by building on the DPS control method, thereby efficiently boosting the converter’s robustness against abrupt variations in input voltage and load. Ref. [14] combined dynamic performance optimization with current stress optimization based on EPS modulation and achieved good results, but its operating modes are limited.

In summary, in the research on DAB control strategies, steady-state characteristics and dynamic performance optimization are often treated as two independent parts. The results of current stress optimization are used to generate one or two PSAs for the next moment, and the changes in PSAs are regarded as disturbances input to the dynamic performance optimization module to achieve their combination. This approach gives rise to several problems: First, under TPS modulation, the multiple degrees of freedom brought by multiple PSAs make their combination extremely complex, and relevant research is scarce. Second, the input quantities of the two optimization models are inconsistent, which may lead to waste of sensors or algorithms. Third, a unified model has not been constructed for different modulation modes, resulting in cumbersome mode switching.

To address the above issues, the novelty and contributions of this work are twofold. First, this paper presents an active disturbance rejection control (ADRC) strategy incorporating current stress optimization under TPS modulation. Second, this approach realizes global current stress optimization for DAB converters, extends direct power control to the TPS modulation framework, enhances the system’s dynamic responsiveness and robustness, and develops a unified control model to enable flexible trade-off between control complexity and performance.

The overall structure of this paper is organized as follows. First, mathematical models for power transmission and current stress across various operating modes of TPS modulation are deduced. The current stress characteristics of different TPS operating modes are systematically compared and analyzed, leading to the attainment of the global optimal solution for the converter’s current stress. Second, an ADRC feedback control loop is constructed, with direct power control incorporated into the TPS modulation scheme. Power ripples induced by factors such as the current stress optimization strategy, abrupt input voltage variations, and load switching are treated as lumped disturbances. These disturbances are real-time estimated and compensated via an extended state observer (ESO), thereby optimizing the system’s dynamic performance. A unified control model is proposed to allow users to flexibly select control schemes according to the trade-off between control complexity and system performance. Finally, simulation results validate the feasibility and superiority of the presented control scheme.

2. Current Stress Optimization Based on TPS Modulation for DAB Converters

2.1. Analysis of DAB Converter with TPS Control

In an effort to mitigate the inherent power losses associated with DAB converters, maximizing the operational efficiency of such converters becomes a critical priority. This study enhances DAB efficiency by implementing current stress optimization strategies.

The topological structure of the DAB converter is depicted in Figure 1. In this topology, bridges $H_1$ and $H_2$ serve as full-bridge circuits on both sides, where metal-oxide-semiconductor field-effect transistors are adopted as the switching devices, denoted as $S_1$ to $S_8$. A freewheeling diode is connected in anti-parallel across each switching transistor, labeled as $D_1$ to $D_8$, which is employed to assist in commutation for achieving ZVS. The input voltage and output voltage of the circuit are defined as $U_1$ and $U_2$, respectively. Filter capacitors are configured at both the input and output terminals to suppress voltage ripples, designated as $C_1$ (input filter capacitor) and $C_2$ (output filter capacitor). The auxiliary inductor of the system after equivalent processing is denoted as L, with its circulating current represented by $i_L$, and the output current marked as $I_2$. The turns ratio of the isolation transformer T in the topology is set to $n:1$. The output voltages of bridges $H_1$ and $H_2$ are characterized as $U_{\mathrm{ab}}$ and $U_{\mathrm{cd}}$, respectively.

To facilitate subsequent analytical procedures, the PSAs are denoted as $D_1$, $D_2$, and $D_3$, with their initial assumed value range set to [−1, 1]. Notably, once the absolute values of $D_1$ and $D_3$ are determined, their polarity (positive or negative) has no impact on the mathematical model of transmitted power. As a result, $D_1$ and $D_3$ are redefined to take positive values within the interval [0, 1].

As shown in

Table 1. The operating modes of the DAB converter.

Operating Mode	Constraint Conditions
1	$0\le D_1\le D_2\le D_2+D_3\le 1$
2	$0\le D_2\le D_1\le D_2+D_3\le 1$
3	$0\le D_2\le D_2+D_3\le D_1\le 1$
4	$0\le D_2+D_3<1\le D_2\le D_1\le 1\le D_2+D_3$
5	$0\le D_2+D_3<1\le D_1\le D_2\le 1\le D_2+D_3$
6	$0\le D_1\le D_2+D_3<1\le D_2\le 1\le D_2+D_3$
7	$0\le 1+D_2\le D_3-D_2+1\le D_1\le 1$
8	$0\le D_1\le D_2+D_3\le 1+D_2\le 1$

, the operating modes can be categorized into eight distinct types (labeled Mode 1 through Mode 8), which are differentiated by the magnitude relationships among the three phase-shift angles $D_1$, $D_2$, and $D_3$. Among these, $0\le {\mathrm{D}}_2\le 1$ for Modes 1–6, and $-1\le {\mathrm{D}}_2\le 0$ for Modes 7 and 8.

It is important to clarify that the present analysis centers on scenarios where the voltage transfer ratio k exceeds 1; the case where k is less than 1 can be addressed using analogous analytical methods. The voltage transfer ratio k is mathematically expressed as

$$k={\displaystyle \frac{U_{\mathrm{I}}}{n{U}_{\mathrm{O}}}}$$

(1)

Modes 4 and 8 are difficult to achieve Zero-Voltage Switching (ZVS), so they are not discussed in this paper. Mode 2 is the main target of traditional current stress optimization: when it satisfies $i_{\mathrm{L}}\left(D_{2}T\right)=0$, half of the devices meet Zero-Current Switching (ZCS) and the other half also satisfy ZCS, which still exhibits good soft-switching performance. The soft-switching conditions of the remaining modes are presented in

Table 2. ZVS conditions under partial operating modes.

Model	ZVS Conditions
$1$	$i_{\mathrm{L}}\left(D_{1}T\right)>0$	$-(k+2)D_1+2D_2+D_3+k-1>0$
	$i_{\mathrm{L}}\left(D_{2}T\right)<0$	$k{D}_1-2k{D}_2+D_3+k-1<0$
$3$	$i_{\mathrm{L}}\left(D_{2}T\right)<0$	$-k{D}_1+D_3+k-1<0$
	$i_{\mathrm{L}}\left(D_{1}T\right)>0$	$(2-k)D_1-2D_2-D_3+k-1>0$
$5$	$i_{\mathrm{L}}\left(D_{1}T\right)>0$	$-(k+2)D_1+2D_2+D_3+k-1>0$
	$i_{\mathrm{L}}\left(D_{2}T\right)<0$	$k{D}_1-2k{D}_2-(2k+1)D_3+3k+1<0$
$6$	$i_{\mathrm{L}}\left[(D_2+D_3-1)T\right)]>0$	$k{D}_1-2k{D}_2-(2k+1)D_3+3k+1<0$
	$i_{\mathrm{L}}\left(D_{2}T\right)<0$	$k{D}_1-2k{D}_2+D_3+k-1<0$
$7$	$i_{\mathrm{L}}\left(0\right)>0$	$-k{D}_1-2k{D}_2-D_3-3k+1>0$
	$i_{\mathrm{L}}\left(D_{1}T\right)>0$	$-(k+2)D_1+2D_2+D_3+k+3>0$

.

The operational modes described earlier allow for the derivation of each mode’s transmission power model and current stress model. The transmission power P can be computed using the following equation

$$P={\displaystyle \frac{1}{T}}{\int }_0^T{U}_{\mathrm{I}}{i}_{\mathrm{L}}\left(t\right)dt$$

(2)

To facilitate the calculation, the transmission power is normalized as $P_{\mathrm{O}}$. $P_{\mathrm{O}}$ can be expressed as

$$P_{\mathrm{O}}={\displaystyle \frac{P}{P_{\mathrm{N}}}}$$

(3)

where $P_{\mathrm{N}}$ is the maximum transmission power. It is derived from the following equation

$$P_{\mathrm{N}}={\displaystyle \frac{n{U}_{\mathrm{I}}{U}_{\mathrm{O}}}{8f_{\mathrm{s}}L}}$$

(4)

where $f_{\mathrm{s}}$ is switching frequency. Combining Equations (2)–(4), we can derive the per-unit transmitted power corresponding to each mode, as shown in Equation (5). The current stress of the DAB converter refers to the peak value of the inductor current $i_{\mathrm{L}}$. In the case of $k>1$, the peak value of the current $i_{\mathrm{L}}$ occurs at the origin $i_0$. Therefore, the current stress expressions for the per-unit current stress under each mode can be calculated as Equation (6).

$$P_0=\left\{\begin{array}{cc}2\left(-D_1+2D_2+D_3-D_1^2-2D_2^2-D_3^2+2D_1{D}_2+D_1{D}_3-2D_2{D}_3\right),\hfill & 1\hfill \\ 2\left(-D_1+2D_2+D_3-D_2^2-D_3^2+D_1{D}_3-2D_2{D}_3\right),\hfill & 2\hfill \\ 2\left(-D_1+2D_2+D_3+D_1^2-2D_1{D}_2-D_1{D}_3\right),\hfill & 3\hfill \\ 2\left(-D_1-D_3-D_1^2-D_2^2+2D_1{D}_2+D_1{D}_3+1\right),\hfill & 5\hfill \\ 2\left(D_1-2D_2-3D_3+D_3^2-D_1{D}_3+2D_2{D}_3+2\right),\hfill & 6\hfill \\ 2\left(3D_1-2D_2-D_3-D_1^2+2D_1{D}_2+D_1{D}_3-2\right),\hfill & 7\hfill \end{array}\right.$$

(5)

$$i_0=\left\{\begin{array}{cc}2\left(-k{D}_1+2D_2+D_3+k-1\right),\hfill & 1,2,3\hfill \\ 2\left(-k{D}_1-D_3+k+1\right),\hfill & 5,6,7\hfill \end{array}\right.$$

(6)

2.2. Analysis of Current Stress Optimization Strategy

The transmission power and current stress models for each mode demonstrate that multiple sets of $D_1$, $D_2$, $D_3$ can achieve a given transmission power. To optimize performance, it is necessary to select a set of PSAs that minimize current stress while meeting the soft-switching condition.

To minimize current stress while satisfying constraints on transmitted power, mode classification criteria, and soft-switching conditions, the corresponding optimization problem is formulated as:

$$\left\{\begin{array}{c}min{i}_{\mathrm{O}}\left(X\right)\hfill \\ \mathrm{s}.\mathrm{t}.P_{\mathrm{O}}\left(X\right)-P_{\mathrm{OREF}}=0\hfill \\ B_i\left(X\right)\le 0,i=1,2,\cdots ,m\hfill \end{array}\right.$$

(7)

where $X=(D_1,D_2,D_3)$ denotes the optimization variable set (phase-shift angles), $P_{\mathrm{OREF}}$ is the reference transmitted power, and $B_i\left(X\right)$ represents the constraint set for mode and soft-switching requirements.

The optimal solution for critical operating modes under the Karush–Kuhn–Tucker (KKT) condition is derived by incorporating the Lagrange Multiplier Method (LMM) with KKT conditions, summarized in

Table 3. The optimal solution of the key model under KKT conditons.

Model	${\mathit{D}}_1$	${\mathit{D}}_2$	${\mathit{D}}_3$	${\mathit{i}}_{0\mathit{max}}$	${\mathit{P}}_{\mathit{O}}$
1	$(k-1)\sqrt{{\displaystyle \frac{1-P_{\mathrm{O}}}{k^2-2k+2}}}$	${\displaystyle \frac{(k-2)}{2}}\sqrt{{\displaystyle \frac{1-P_{\mathrm{O}}}{k^2-2k+2}}}+{\displaystyle \frac{1}{2}}$	0	$2k-2\sqrt{\left(k^2-2k+2\right)\left(1-P_{\mathrm{O}}\right)}$	$2{\displaystyle \frac{k-1}{k^2}}\sim 1$
2	$1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}$	$\sqrt{{\displaystyle \frac{(k-1)P_{\mathrm{O}}}{2}}}$	$1-k\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}$	$2\sqrt{2(k-1)P_{\mathrm{O}}}$	$0\sim 2{\displaystyle \frac{k-1}{k^2}}$
3	$1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}$	$2D_2+D_3=1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}+\sqrt{{\displaystyle \frac{(k-1)P_{\mathrm{O}}}{2}}}$		$2\sqrt{2(k-1)P_{\mathrm{O}}}$	$0\sim 2{\displaystyle \frac{k-1}{k^2}}$
5	$1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2k}}}$	$1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2k}}}$	$1-\sqrt{{\displaystyle \frac{k{P}_{\mathrm{O}}}{2}}}$	$2\sqrt{2k{P}_{\mathrm{O}}}$	$0\sim {\displaystyle \frac{2k}{{(k+1)}^2}}$

. Mode 6 and Mode 7 fail to yield valid solutions. Meanwhile, the optimal solutions derived for Modes 2 through 5 already cover the full power range, so no additional discussion of these two modes is necessary. A comparison of current stress values in Table 3 yields the quasi-optimal solution (categorized by power range):

$$\left\{\begin{array}{c}0\le P_{\mathrm{O}}<{\displaystyle \frac{2(k-1)}{k^2}}:\left\{\begin{array}{c}{D}_1=1-\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}\hfill \\ D_2=\sqrt{{\displaystyle \frac{(k-1)P_{\mathrm{O}}}{2}}}\hfill \\ D_3=1-k\sqrt{{\displaystyle \frac{P_{\mathrm{O}}}{2(k-1)}}}\hfill \\ i_{\mathrm{O}min}=2\sqrt{2(k-1)P_{\mathrm{O}}}\hfill \end{array}\right.\hfill \\ {\displaystyle \frac{2(k-1)}{k^2}}\le P_{\mathrm{O}}\le 1:\left\{\begin{array}{c}{D}_1=(k-1)\sqrt{{\displaystyle \frac{1-P_{\mathrm{O}}}{k^2-2k+2}}}\hfill \\ D_2={\displaystyle \frac{k-2}{2}}\sqrt{{\displaystyle \frac{1-P_{\mathrm{O}}}{k^2-2k+2}}}+{\displaystyle \frac{1}{2}}\hfill \\ D_3=0\hfill \\ i_{\mathrm{O}min}=2k-2\sqrt{(k^2-2k+2)(1-P_{\mathrm{O}})}\hfill \end{array}\right.\hfill \end{array}\right.$$

(8)

Figure 2 depicts the optimal control algorithm for the system. By sampling the input voltage, output voltage, and output current $I_{\mathrm{O}}$, the system calculates the normalized transmitted power $P_{\mathrm{O}}$ and voltage transfer ratio k in real time. Using Equation (8), the real-time power is classified as either low or high, and the optimal values of $D_2$ and $D_3$ are computed online. As $P_{\mathrm{O}}$ increases, $D_2$ and $D_3$ decrease; consequently, $D_1$ is selected as the output of the PI controller to implement closed-loop regulation.

3. ADRC-Based Control Strategy Integrated with Current Stress Optimization

DAB converters are required to achieve excellent dynamic response characteristics while minimizing current stress. Conventional schemes that combine current stress optimization with dynamic performance enhancement generally involve using a PI controller to compute a portion of the phase-shift angles, with the remaining angles derived through a dedicated current stress optimization algorithm.

Nevertheless, power transmission exhibits a strong correlation with all phase-shift angles; fluctuations in the angles calculated by the current stress optimization algorithm will inevitably induce variations in transmitted power, thereby imposing significant limitations on the performance of traditional PI control. Moreover, the system’s response speed is governed by the rate at which the PI controller outputs the reference power. The inherent trade-off between overshoot suppression and response rapidity in PI controllers also manifests in the system, which inevitably impairs the dynamic response efficiency. Meanwhile, energy transmission in the converter is inherently accompanied by power losses, and the system is frequently exposed to internal and external disturbances—conventional PI controllers are clearly inadequate to adapt to such high-disturbance operating environments.

To reduce the current stress while enhancing their dynamic performance, an ADRC is introduced, and a novel ADRC-based control strategy integrated with global current stress optimization is proposed. By leveraging an ESO, variations in PSAs are treated as internal system disturbances and categorized as part of the total disturbance. Real-time estimation and rapid compensation of these disturbances are implemented to improve the system’s dynamic response capabilities.

The conventional control scheme is depicted in Figure 3. Regardless of the phase-shift modulation method adopted by the DAB converter, applying the current stress optimization algorithm necessitates computing the current per-unit transmitted power $P^{*}$ and voltage conversion ratio k. These parameters are employed to determine the converter’s appropriate phase-shift operating mode, after which the PSAs are updated using the derived current stress-optimal expressions.

Consequently, direct specification of the per-unit power $P^{*}$ by the controller can substantially enhance the system’s dynamic performance. The improved control system is illustrated in Figure 4.

For the scenario illustrated in Figure 4 (resistive load condition), a support capacitor is essential to suppress voltage sag. From the input terminal of capacitor $C_2$, the average output current can be expressed as:

$$I_{2\mathrm{avg}}={\displaystyle \frac{P}{U_2}}={\displaystyle \frac{n{U}_{1}P}{8L{f}_s}}={\displaystyle \frac{n{U}_1}{8L{f}_s}}f(D_1,D_2,D_3)$$

(9)

where P represents the actual power transmitted, and $f(D_1,D_2,D_3)$ denotes the per-unit function of the transmission power.

Equation (9) reveals that the circuit preceding $C_2$ can be equivalent to a controlled current source, which supplies energy to both the load and capacitor $C_2$. The equivalent circuit model is presented in Figure 5.

Accordingly, the output voltage $U_2$ can be formulated as:

$$U_2={\displaystyle \frac{1}{C_2}}\int (I_{2\mathrm{avg}}-I_2)dt$$

(10)

Substituting Equation (9) into Equation (10) and performing Laplace transformation yields the frequency-domain expression of $U_2$:

$$U_2\left(s\right)={\displaystyle \frac{1}{C_{2}s}}\left({\displaystyle \frac{n{U}_1}{8L{f}_s}}{P}^{*}\left(s\right)-I_2\left(s\right)\right)$$

(11)

Based on Equation (11), the power model under per-unit transmission power control is established, as shown in Figure 6. It is noted that $U_2$ is correlated not only with the switching frequency $f_s$ and equivalent series inductor L, but also with the load current $I_2$ and input voltage $U_1$. Thus, sampling these key parameters and integrating them into the ADRC controller will improve dynamic performance.

The proposed ADRC-based power control loop is illustrated in Figure 7. With $U_2$ serving as the control feedback signal, the output of the ADRC controller corresponds to a power command denoted as $P_{\mathrm{ADRC}}$. The desired per-unit power $P^{*}$ is defined as the ratio of $P_{\mathrm{ADRC}}$ to the base power $P_{\mathrm{N}}$, mathematically expressed as:

$$P^{*}={\displaystyle \frac{P_{\mathrm{ADRC}}}{P_{\mathrm{N}}}}={\displaystyle \frac{8L{f}_s{P}_{\mathrm{ADRC}}}{n{U}_1{U}_2}}$$

(12)

To further accelerate the system’s dynamic response, it is noted (as shown in Figure 5) that the average secondary-side output current equals the sum of the current through $C_2$ and the load current. By incorporating load current feedforward control, the modified expression of $P^{*}$ is derived as:

$$P^{*}={\displaystyle \frac{8L{f}_s{P}_{\mathrm{ADRC}}}{n{U}_1{U}_2}}+{\displaystyle \frac{8L{f}_s{I}_2}{n{U}_1}}={\displaystyle \frac{8L{f}_s}{n{U}_1{U}_2}}\left(P_{\mathrm{ADRC}}+U_2{I}_2\right)$$

(13)

Define the output voltage deviation coefficient K as the ratio of $U_2$ to the reference voltage $U_{\mathrm{ref}}$:

$$K={\displaystyle \frac{U_2}{U_{\mathrm{ref}}}}$$

(14)

In steady-state operation, $U_2$ matches $U_{\mathrm{ref}}$, resulting in $K=1$. If voltage fluctuations occur due to external disturbances, $K\ne 1$. To compensate for such deviations and accelerate dynamic response, the reciprocal of K is introduced into Equation (13), leading to the updated expression of $P^{*}$:

$$P^{*}={\displaystyle \frac{8L{f}_s}{n{U}_1{U}_{2}K}}\left(P_{\mathrm{ADRC}}+U_2{I}_2\right)$$

(15)

The control block diagram based on Equation (15) is presented in Figure 7.

In summary, the implementation steps of the ADRC-based direct power control strategy (with global current stress optimization) are as follows:

1. Acquire samples of $U_1$ and $U_2$ to compute the voltage conversion ratio k, and feed $U_2$ into the ADRC controller as the feedback signal.

2. The ADRC controller outputs the desired power $P_{\mathrm{ADRC}}$, with load current feedforward control integrated into the system.

3. Compute the ratio of $P_{\mathrm{ADRC}}$ to the base power $P_{\mathrm{N}}$ to obtain the desired per-unit power $P^{*}$.

4. Introduce a multiplication of $P^{*}$ by $1/K$ (to enhance dynamic response) to generate the input parameters ($P^{*}$, k) for the current stress optimization algorithm.

5. Determine the phase-shift operating mode using $P^{*}$ and k, then update all PSAs via the current stress-optimal PSA expressions to complete the control loop.

Notably, the novel control strategy proposed is independent of the modulation mode of the DAB converter, exhibiting excellent versatility.

4. Simulations and Analysis

To verify the effectiveness of the proposed strategy, a Simulink simulation model (MATLAB R2022b) was utilized for validation. The detailed parameters are listed in

Table 4. DAB simulation parameters.

Parameter Name	Value	Unit
Control frequency	10	kHz
Input voltage	100	V
Output voltage	60	V
Transformer ratio	1:1
Leakage inductance	100	$\mathsf{\mu }$H
Input capacitance	440	$\mathsf{\mu }$F
Output capacitance	440	$\mathsf{\mu }$F

. The simulation model is shown in Figure 8. In the simulation, the rated input voltage is set to 100 V, the output voltage to 60 V, and the transformer turns ratio is 1. Simulations with different values of k can be conducted under the buck mode to demonstrate the control performance of the proposed strategy. Meanwhile, suitable voltage and inductor values are selected for the simulation to guarantee efficient energy transfer. To ensure simulation accuracy, a simulation time step of 10 ns is adopted in this paper at a control frequency of 10 kHz, with 1000 calculations executed in each cycle. In addition, the ADRC (PI) control module, current stress optimization module, PWM generation module, and the DAB converter circuit are separately established. The current stress optimization module integrates the phase-shift angle calculations for both SPS and TPS, which facilitates the debugging process.

4.1. Current Stress Optimization Simulation

To verify the current stress optimization effect, a comparative analysis was conducted on SPS modulation, unoptimized TPS control, and current stress-optimized TPS control. As indicated by the aforementioned analysis, the threshold between low and high power is 0.48; thus, simulations were carried out at a low power of 200 W and a high power of 400 W.

The conventional unoptimized TPS control adopts a hybrid phase-shift angle configuration scheme, whose core characteristic is that the selection rules for phase-shift angle parameters $D_1$ and $D_2$ are completely consistent with those of the optimized TPS control strategy. Only the phase-shift angle $D_3$ is chosen as another set of non-optimal solutions that can meet the requirements of the target output power. To intuitively compare the control effects, a typical low-power operating scenario is selected for illustration, where $D_3$ is fixedly set to 0.2. To comprehensively verify the performance advantages of the proposed strategy, the system characteristics under two typical operating conditions (low power and high power) are tested separately. The dynamic variation law of inductor current stress is shown in Figure 9 and Figure 10, and the quantitative comparison data of efficiency among different control strategies are summarized in

Table 5. Inductor current stress and power transfer efficiency under high and low power transmission for different control strategies.

Target Output Power	Control Strategy	Inductor Current Stress and Power Transfer Efficiency
$P=200\mathrm{W}$	SPS Control	$I=12.86\mathrm{A}$ $\eta =93.96\%$
	Unoptimized TPS Control	$I=11.59\mathrm{A}$ $\eta =95.74\%$
	Optimized TPS Control	$I=9.11\mathrm{A}$ $\eta =96.84\%$
$P=400\mathrm{W}$	SPS Control	$I=15.80\mathrm{A}$ $\eta =94.11\%$
	Unoptimized TPS Control	$I=14.71\mathrm{A}$ $\eta =94.72\%$
	Optimized TPS Control	$I=13.54\mathrm{A}$ $\eta =95.51\%$

.

By analyzing the test data in Figure 9 and Figure 10, and Table 5, it is not difficult to find that under the low-power operating condition (transmitted power set to $200\mathrm{W}$, corresponding to a load resistance $R=18\Omega$), the inductor current stress shows an obvious stepwise decreasing trend—from $12.86\mathrm{A}$ in the traditional SPS control, down to $11.59\mathrm{A}$ in the unoptimized TPS control (a reduction of approximately $9.87\%$ compared with SPS control), and finally further reduced to $9.11\mathrm{A}$ under the optimized TPS control strategy proposed in this study (a significant reduction of $29.16\%$ compared with SPS control and $21.39\%$ compared with unoptimized TPS control). This quantitative data fully demonstrates that the proposed optimization strategy has an extremely significant inhibitory effect on current stress in the low-power operating range. It can effectively reduce the operating load of the inductor and minimize device heating and energy loss caused by excessive current stress.

Under the high-power operating condition (transmitted power increased to $400\mathrm{W}$, corresponding to a load resistance $R=9\Omega$), the variation law of current stress is consistent with that in the low-power condition, also showing a stepwise decreasing characteristic: from $15.80\mathrm{A}$ in SPS control to $14.71\mathrm{A}$ in unoptimized TPS control (a reduction of approximately $6.90\%$ compared with SPS control), and then further reduced to $13.54\mathrm{A}$ through the proposed optimization strategy (a reduction of $14.30\%$ compared with SPS control and $7.95\%$ compared with unoptimized TPS control). This result verifies the robustness and adaptability of the proposed strategy. Even under high-power load conditions, it can still effectively reduce the inductor current stress through precise phase-shift angle configuration optimization, avoiding increased losses and service life attenuation of devices caused by overcurrent impact.

Furthermore, a comprehensive analysis of the efficiency comparison data in the full power range from Table 5 reveals that, overall, the proposed optimized TPS control scheme not only maintains a consistently lower inductor current stress level but also synchronously improves the energy conversion efficiency of the system within the full power operating range of $200\mathrm{W}$ to $400\mathrm{W}$. Among them, the reduction in current stress (up to $29.16\%$) and the improvement in efficiency are particularly prominent in the low-power range. This core feature holds important engineering practical value for practical application fields such as microgrids and distributed generation, which involve a large number of low-power operating scenarios. It can significantly reduce the energy consumption and operation and maintenance costs of the system throughout its entire life cycle.

4.2. Dynamic Performance Optimization Simulation

To comprehensively verify the dynamic performance and anti-disturbance capability of the proposed ADRC-modulated TPS control scheme, and simultaneously consider the influence of mode transitions within the control framework, four representative control strategies are systematically investigated for comparison, namely: PI-modulated SPS control, ADRC-modulated SPS control, PI-modulated TPS control, and the proposed ADRC-modulated TPS control. In addition, it should be emphasized that mode transitions inherent in different control patterns will introduce discrete jumps in control variables, which may further induce jitter or instability during transient load step changes. This factor directly affects the authenticity and reliability of simulation results, and thus the impact of mode transitions has been fully considered in all subsequent simulations to ensure that the simulation scenarios are highly consistent with practical engineering applications.

As indicated in the previous theoretical analysis, the critical per-unit power for mode transition is 0.48, corresponding to an actual transmitted power of 360 W, which serves as the key threshold for control mode switching. To fully cover the discrete jump effect caused by mode transition and comprehensively validate the adaptability of the proposed strategy under complicated dynamic conditions, the dynamic performance is specifically evaluated between 200 W (below the transition threshold) and 400 W (above the transition threshold). Such a power range ensures that the simulation can faithfully reproduce the combined conditions of mode transition and load step change in real operation, thereby enabling a more accurate evaluation of the overall performance of the proposed strategy.

Specifically, in the load step-up experiment (mimicking the practical scenario of sudden load reduction), the simulation parameters are set as follows: the input voltage is fixed at $100\mathrm{V}$, the rated output voltage is $60\mathrm{V}$, and the initial load resistance is $9\Omega$ (corresponding to 400 W). At $t=0.1\mathrm{s}$, the load resistance is stepped up to $18\Omega$ (corresponding to 200 W), where the system suffers from the dual disturbances of load step change and mode transition. The simulation results are illustrated in Figure 11. During the start-up phase, the steady-state settling time of ADRC-based strategies is dramatically shortened from more than $34\mathrm{ms}$ (for PI-based strategies) to only $4\mathrm{ms}$, representing a reduction of 88.2%. When the load step occurs, severe voltage overshoot is observed under PI-based controllers, reaching $78.07\mathrm{V}$ for SPS (PI) and $69.03\mathrm{V}$ for TPS (PI). In contrast, the voltage overshoot is effectively suppressed to $61.55\mathrm{V}$ for SPS (ADRC) and $60.83\mathrm{V}$ for TPS (ADRC), showing remarkably prominent optimization effects. In terms of recovery time, the maximum value of $35\mathrm{ms}$ achieved by PI-based schemes is reduced to only $2\mathrm{ms}$.

In the load step-down experiment (representing the practical scenario of sudden load increase), the input voltage remains $100\mathrm{V}$ and the rated output voltage is $60\mathrm{V}$, with an initial load resistance of $18\Omega$ (200 W). At $t=0.1\mathrm{s}$, the load resistance is stepped down to $9\Omega$ (400 W), and the results are presented in Figure 12. Under the load step change, the voltage overshoot values are $10.17\mathrm{V}$ for SPS (PI), $8.96\mathrm{V}$ for SPS (ADRC), $1.17\mathrm{V}$ for TPS (PI), and $0.79\mathrm{V}$ for the proposed TPS (ADRC), respectively. The corresponding recovery times are $43\mathrm{ms}$, $25\mathrm{ms}$, $0.4\mathrm{ms}$, and $0.1\mathrm{ms}$.

These results from both step-up and step-down tests consistently demonstrate that the proposed control scheme achieves outstanding dynamic performance under abrupt load variations, even with the coexistence of mode transitions. It exhibits obvious superiority in voltage overshoot suppression, steady-state response speed, and transient recovery capability, which provides reliable simulation support and theoretical evidence for engineering applications.

5. Conclusions

This paper investigates an integrated optimization method for the static characteristics and dynamic performance of DAB converters, and proposes a novel general ADRC model incorporating current stress optimization. This model can provide stable, pure, and efficient power supply support for various actuators, effectively ensuring the reliable operation of actuators, and conforming to the stringent requirements for power supply quality in practical application scenarios.

Firstly, an analytical model of power transmission and current stress under TPS modulation is established, and the optimal current stress combinations corresponding to different operating modes are obtained through theoretical derivation, which provides a theoretical basis for the precise optimization of current stress. Meanwhile, real-time observation, accurate estimation, and active compensation of system disturbances are realized by means of an ESO, significantly enhancing the dynamic response capability of the system. On this basis, a unified control model is constructed, which can flexibly balance the relationship between control performance and control complexity, taking into account both control effects and engineering implementation difficulty, thus improving the practicality and universality of the model. In future work, we will conduct experimental verification on the proposed strategy for meeting the stable power supply requirements of multi-motor systems [15].

Simulation results verify the effectiveness and superiority of the proposed strategy, with specific conclusions as follows:

1.

The proposed control strategy effectively simplifies the power transmission model under TPS modulation and achieves global optimization of current stress over the full power operation range. This strategy can ensure that all switching devices satisfy the ZVS characteristic, effectively reduce the conduction losses and switching losses of the converter, and thus significantly improve the energy conversion efficiency of the converter, providing a guarantee for the efficient operation of the system.

2.

When abrupt disturbances occur in the input voltage or load, the proposed control strategy can quickly and dynamically adjust the phase-shift angle parameters based on real-time collected voltage and current information, prompting the output voltage to rapidly recover to a stable value. It exhibits excellent dynamic anti-disturbance performance and steady-state maintenance capability, and can effectively cope with various disturbances under complex operating conditions.