Proposal of Hybrid Discontinuous PWM Technique for Five-Phase Inverters under Open-Phase Fault Operation

Abstract

One of the most common issues in inverters are open-circuit faults (OPF). In this scenario, a proper fault-tolerant technique must be used to improve the motor performance. Although basic fault-tolerant modulation techniques are normally preferred, this paper proposes a discontinuous pulse-width modulation algorithm (HD-PWM) to operate five-phase inverters under a single OPF. In particular, loss equalization between the remaining switches after a fault occurs is the main objective of the HD-PWM algorithm, thus preventing future faults from occurring. The efficiency and harmonic distortion of the proposed technique are compared to the well-known sinusoidal PWM by simulation and experimentation under OPF conditions. The results obtained show a great performance of the proposed modulation technique, obtaining a relevant efficiency improvement.

1. Introduction

Multiphase electric drive systems have gained increasing attention in recent years due to their superior characteristics when compared to traditional three-phase systems. These advantages include a lower torque ripple, a higher power density, a reduced current per phase, and inherent fault tolerance capabilities [1,2]. This last characteristic has led to the use of multiphase systems in applications where safety is a critical requirement, such as electric vehicles, ship propulsion systems, and more-electric aircraft [3,4]. Despite the numerous multiphase topologies that have been proposed [5,6], two-level five-phase converters are preferred (Figure 1), as they provide a good balance between system complexity and fault tolerance [7,8].

The most common faults in electrical drives are typically related to the power converter. Indeed, the stress caused by the ambient temperature and temperature variations on the semiconductors, especially in transport applications, was highlighted in [9]. The results of that study determined that high thermal stress caused different types of breakdown in the semiconductor as heel fractures, lift-off, and metallurgical damages [10,11], causing open-circuit or short-circuit faults [12]. When a short-circuit fault occurs, the corresponding phase is typically isolated from the system using fuses or mechanical circuit breakers, converting the short-circuit fault into an open-circuit fault [13]. In the case of five-phase converters, they are able to operate, even in a degraded form, under single and double open-phase faults (OPF) without the need for additional hardware until repaired. However, when an OPF occurs, the motor current amplitude must be increased to preserve the same torque production as in healthy operation [14], leading to the power converter overheating. Consequently, solutions must be adopted to address cascaded OPFs that further degrade or permanently stop the system operation. One approach is to reduce the per-phase current rate, but this is not always possible, such as during take-off and climb of an electric aircraft, where maximum power is required [15]. Another approach is to reduce the switching frequency ($f_{sw}$) to decrease the commutation losses and overall system losses. However, reducing the frequency also leads to a decrease in the control sampling rate, worsening the current control dynamic behaviour [16].

On the other hand, pulse-width modulation techniques (PWM) represent a cheap and flexible solution to this concern, in particular, discontinuous PWM (D-PWM) schemes, which allow a reduction of the switching losses without reducing the $f_{sw}$. However, D-PWM schemes have not yet been studied under fault operation. To fill this gap, this work proposes a new hybrid discontinuous PWM algorithm (HD-PWM) that aims to reduce the converter losses while equally distributing the losses among the switches, preventing future faults from occurring. Furthermore, the control algorithm must also be modified, as the vector space must be restructured according to the phase or phases that have failed. Additionally, under these conditions, the neutral-point voltage is oscillating, causing an error that must be corrected in order to modulate the converter correctly [17]. Therefore, the fault-tolerant control must be chosen carefully.

The article is organized as follows: Section 2 deals with the relevance of using a correct postfault control technique that allows us to apply the desired voltage to the load compensating the neutral-point voltage oscillation. This is followed by Section 3, where the carrier-based approach of the proposed fault-tolerant HD-PWM is given. Additionally, in the same section, the harmonic distortion factor of the proposed modulation is analysed using the space vector approach. The electric vehicle model used for simulation purposes is presented in Section 4. This model was developed in Simulink to assess the performance of the proposed HD-PWM under different operating conditions and to evaluate the impact of faults on the drive system. Finally, experimental results and conclusions are shown in Section 5 and Section 6, respectively.

2. Fault-Tolerant Control

Although the first step to take when a fault occurs is to detect the fault itself, this point is beyond the scope of this work and focuses on the moment when the fault has already been detected and the fault-tolerant control algorithm comes into operation.

When a fault occurs in a system, the system loses its symmetry, so it is not possible to continue generating the circular MMF that allows the correct operation of the drive. For this reason, it is necessary to apply a fault-tolerant control that recalculates the currents that must be delivered to the motor so that it can continue to function correctly. Likewise, the modulation technique is closely related to the control technique used. Thus, while the control is responsible for generating the optimal reference signals, the modulation must be able to reproduce these reference signals to deliver the current requested by the control to the motor.

In recent years, several works have been published that address fault-tolerant control techniques [18,19,20]. In some of them, control is combined with hysteresis controllers [18]. However, this solution has some disadvantages such as increased switching losses of the converter, torque ripple, and EMI emissions. For these reasons, the use of PWM techniques is preferred over the combination of control with hysteresis controllers. Mostly, basic control techniques such as a S-PWM adapted to the new vector space formed by the control are used [21,22]. Similarly, some of the published works do not take into account the neutral-point oscillation, which is critical and must be properly addressed before applying the modulation technique, as explained later in this section.

Therefore, the control technique published in [14] was employed in this work, which met the necessary requirements to ensure the proper functioning of the drive: achieving a circular MMF, compensating for neutral-point oscillation, and generating sinusoidal reference signals on which PWM techniques can be employed.

This control algorithm follows equal joule losses (EJL) criteria [23], so the generated current references satisfy (1) [23,24]:

$$\begin{array}{cc}\hfill i_b& =-i_d\mathrm{and}\hfill \\ \hfill i_c& =-i_e.\hfill \end{array}$$

(1)

In addition, EJL control has the advantage of being appropriate for sinusoidal distribution winding electric machine, since it is able to maintain the back-EMF circular and thus reduces the torque ripples [13,24].

$$\begin{array}{cc}\hfill i_b& =1.382Icos\left(\omega t-\pi /5\right),\hfill \\ \hfill i_c& =1.382Icos\left(\omega t-4\pi /5\right),\hfill \\ \hfill i_d& =1.382Icos\left(\omega t-6\pi /5\right)\mathrm{and}\hfill \\ \hfill i_e& =1.382Icos\left(\omega t-9\pi /5\right).\hfill \end{array}$$

(2)

Supposing an OPF on phase a and that the magnetomotive force is desired to be kept unchanged, the current references of the remaining healthy phases are defined by (2) [22], where $\omega$ stands for the angular frequency of the modulation signal and I is the current amplitude under prefault conditions. Based on the currents defined in (2), an orthogonal reduced-order transformation matrix was derived in [14]:

$$T_{A_{OPF}}=\left[\begin{array}{cccc}{\displaystyle \frac{cos\left(0.5\alpha \right)}{3.618}}& {\displaystyle \frac{cos\left(2\alpha \right)}{3.618}}& {\displaystyle \frac{cos\left(3\alpha \right)}{3.618}}& {\displaystyle \frac{cos\left(4.5\alpha \right)}{3.618}}\\ \\ {\displaystyle \frac{sin\left(0.5\alpha \right)}{1.91}}& {\displaystyle \frac{sin\left(2\alpha \right)}{1.91}}& {\displaystyle \frac{sin\left(3\alpha \right)}{1.91}}& {\displaystyle \frac{sin\left(4.5\alpha \right)}{1.91}}\\ \\ {\displaystyle \frac{sin\left(\alpha \right)}{5}}& {\displaystyle \frac{sin\left(4\alpha \right)}{5}}& {\displaystyle \frac{sin\left(6\alpha \right)}{5}}& {\displaystyle \frac{sin\left(9\alpha \right)}{5}}\\ \\ 1& 1& 1& 1\end{array}\right],$$

(3)

where $\alpha =2\pi /5$. From (3), space vectors can be calculated depending on the converter switching state, giving as a result the vectorial space shown in Figure 2a. In addition, this reduced-order transformation matrix was chosen since the references it generates compensate for the neutral-point voltage oscillations. Assuming that the failure has occurred at phase a, the mean value of $V_{N0}$ over a switching period ($T_{sw}$) is:

$${\overline{V}}_{N0}={\displaystyle \frac{E_a-v_{a_{ref}}}{4}}+{\displaystyle \frac{V_{DC}}{2}},$$

(4)

where $v_{a_{ref}}$ is phase a’s reference signal. It follows that the neutral-point voltage depends on $E_a$, which, in turn, depends on the motor electric speed ($\omega$), the motor flux (${\psi }_m$), and the rotor angular position ($\theta$):

$$E_a=-\omega {\psi }_{m}sin\theta .$$

(5)

From these equations, it is concluded that this oscillation is caused by the motor speed ($\omega$), motor flux (${\psi }_m$) and rotor angular position ($\theta$) and, therefore, cannot be physically eliminated. Moreover, since traditional modulation techniques are based on phase-to-neutral-point voltages, the neutral-point oscillation compensation is mandatory and must be done by implementing an adequate control algorithm [19].

Derived from this vectorial space defined in (3), a modulation technique was proposed in [25], here named sinusoidal PWM (S-PWM), since its scalar implementation is very similar to a five-phase sinusoidal PWM in healthy operation (Figure 3). Due to the irregularity in the sector distribution (Figure 2a) and on the vector magnitudes, the vector application time of each sector is different. Each S-PWM vector application time is given in

Table 1. Vector application times in each S-PWM technique sector.

	Sectors 1 and 5	Sectors 2 and 6	Sectors 3 and 7	Sectors 4 and 8
${\mathbf{t}}_{\mathbf{1}}$ = ${\mathbf{t}}_{\mathbf{3}}$	$\left(v_{b_{ref}}-v_{e_{ref}}\right)T_{sw}/2$	$\left(v_{b_{ref}}-v_{c_{ref}}\right)T_{sw}/2$	$\left(v_{c_{ref}}-v_{b_{ref}}\right)T_{sw}/2$	$\left(v_{c_{ref}}-v_{d_{ref}}\right)T_{sw}/2$
${\mathbf{t}}_{\mathbf{2}}$	$\left(v_{e_{ref}}-v_{c_{ref}}\right)T_{sw}/2$	$\left(v_{c_{ref}}-v_{e_{ref}}\right)T_{sw}/2$	$\left(v_{b_{ref}}-v_{d_{ref}}\right)T_{sw}/2$	$\left(v_{d_{ref}}-v_{b_{ref}}\right)T_{sw}/2$
${\mathbf{t}}_{\mathbf{0}}$	$0.5\left(T_{sw}-t_1-t_2-t_3\right)$

. Finally, the maximum achievable modulation index is given by [25]:

$$M_{a_{max}}=\frac{V_{re{f}_{max}}}{0.5V_{DC}}=0.7236,$$

(6)

where $V_{re{f}_{max}}$ is the maximum achievable output phase-to-neutral voltage. However, for simplicity, $M_a$ was rescaled as $M_a\in \left[0,1\right]$.

Considering all the above, regardless of the control algorithm used, the modulation main objective is to reproduce the references sent by the control algorithm. In this sense, carrier-based (CB-PWM) [26] and space-vector-based (SV-PWM) [22,25] techniques have been proposed in recent years. These PWM algorithms, when implemented in scalar form, make use of the references sent by the control algorithm without the addition of any zero-sequence signal (ZSS). The reference signals (2) and the pulse sequence of the S-PWM are shown in Figure 3b. Nevertheless, the appropriate ZSS might bring benefits to the converter performance such as a linear range extension, harmonic minimization or power losses reduction. However, discontinuous algorithms have not yet been analysed under fault operation. For that reason, a hybrid discontinuous PWM scheme is proposed in the next section when an OPF occurs on a. Furthermore, by adopting EJL criteria and the references of (2), the electric drive operation, supposing a sinusoidally distributed windings machine, is able to maintain the same torque production and back-EMF under a single OPF. Finally, the S-PWM algorithm is taken as a reference to compare the technique proposed in this paper, since it is the most used modulation.

3. Proposed Hybrid Discontinuous Modulation

Discontinuous PWM schemes use ZSS signal injection to modify the modulation references shape. In this way, it is possible to clamp the reference voltage either to positive or negative DC bus and thus prevent commutations from occurring during a certain portion of the switching period. Zero-sequence injection is equivalent to redistributing the zero-vector application time ($t_0$). While the S-PWM redistributes $t_0$ equally between ${\mathbf{v}}_{\mathbf{0}}$ and ${\mathbf{v}}_{\mathbf{15}}$, discontinuous PWM algorithms alternate the use of these two zero vectors depending on the sector (see Figure 2b). In short, the modulation presented below takes advantage of the degree of freedom given by the injection of the ZSS signal to improve the efficiency of the converters in an OPF scenario.

3.1. Principle of the HD-PWM

In addition to improving the efficiency of the converter, the HD-PWM scheme intends to equally distribute the switching losses between the semiconductors. To that end, all switches must be clamped for the same amount of time. Based on the well-known three-phase D-PWM1 [27], the HD-PWM scheme clamps the reference signal with the highest absolute amplitude to the positive or to the negative DC bus. Nonetheless, due to the reference signal symmetry (1), two reference signals satisfy the highest absolute amplitude condition. Therefore, the clamping time must be divided between these two reference signals in order to distribute the clamping time between the upper and lower semiconductor. However, the upper clamping time is shorter than the lower clamping time for phases b and d, while phases c and e have longer upper clamping times. The clamping time mismatch is small though and represents 5% of the fundamental period. Nevertheless, this unbalance can be avoided by reducing the largest clamping time by including additional sectors where no ZSS is injected (sectors 3 and 8 in Figure 2b). Likewise, the reference signals of the HD-PWM are defined as:

$$v_{i_{ref,HD-PWM}}=v_{i_{ref}}+v_{ZS{S}_{HD-PWM}},\left(i\in \{b,c,d,e\}\right),$$

(7)

where $v_{ZS{S}_{HD-PWM}}$ is the ZSS-injected signal (8).

$$\begin{array}{cc}\hfill & v_{ZS{S}_{HD-PWM}}\left(t\right)=\hfill \\ \hfill & \left\{\begin{array}{cc}1+min\{v_b\left(t\right),v_c\left(t\right),v_d\left(t\right),v_e\left(t\right)\},\hfill & if \mathrm{sector}=1,5,7,9\hfill \\ -1+max\{v_b\left(t\right),v_c\left(t\right),v_d\left(t\right),v_e\left(t\right)\},\hfill & if \mathrm{sector}=2,4,6,10\hfill \\ 0\hfill & if \mathrm{sector}=3,8\hfill \end{array}\right.\hfill \end{array}$$

(8)

where $v_{i_{ref}}$ are phase references shown in Figure 3a and $v_{ZS{S}_{HD-PWM}}$ is the injected zero-sequence signal. Moreover, the $v_{i_{ref,HD-PWM}}$ reference signals and $v_{ZS{S}_{HD-PWM}}$ signal, defined in (8), of the proposed HD-PWM algorithm are shown in Figure 4. Moreover, when using the S-PWM in sectors 3 and 8 in HD-PWM, the switching losses are not reduced since no clamping time is applied. On the other hand, the reduction of clamping times leads to an improvement of the output current harmonic behaviour. Consequently, a trade-off must be sought between efficiency improvement and the produced output current quality. As in the S-PWM, discontinuous references are compared with a triangle shape carrier to produce the semiconductor gate pulses, which are shown in Figure 4c. On the other hand, since the active vector application time remains as in the S-PWM algorithm (Table 1), the linear range remains unchanged (6).

3.2. HD-PWM Harmonic Distortion Factor

When a fault occurs, the vector space no longer consists of the two subplanes ($\alpha \beta$ and $xy$) typical of five-phase converters. The vector space after a fault is defined by (3), resulting in an $\alpha \beta$ subplane and a z homopolar component (Figure 5). Similarly, Figure 5a shows the vector selection when ${\mathbf{v}}_{\mathbf{ref}}$ lies in sector 1. As can be seen, two redundant vectors are chosen ($\mathbf{v}\mathbf{8}$ and $\mathbf{v}\mathbf{13}$). In this way, the vector applied to the homopolar component z is, on average, zero (Figure 5b).

The selection of the applied active vectors and their sequence is directly related with the output current quality. As is known, the zero-vector time distribution used in discontinuous algorithms affects negatively the harmonic behaviour. In order to quantify the latter, this subsection provides a complex space-vector approach based on an harmonic distortion factor (HDF) analysis as an output current quality’s figure of merit. To that end, harmonic flux trajectories, squared harmonic flux, and the HDF are calculated.

The required mathematical development is described in [28]. However, under fault conditions, additional consideration must be taken into account: since sectors and vectors under an OPF on phase a are irregular, the analysis must be done for $\theta \in \{0,\pi /2\}$, where $\theta$ is the angle between the ${\mathbf{v}}_{\mathbf{ref}}$ and $\mathbf{v}\mathbf{9}$ axis (Figure 2a).

In order to compare the HD-PWM with the reference modulation, S-PWM, Figure 6 shows the squared harmonic flux of the S-PWM and HD-PWM schemes in the $\alpha \beta$ and z subplanes. As a sinusoidal output voltage is desired, the z subplane voltage reference is zero. Thus, only active vectors affect the squared harmonic flux in the z subplane. For that reason, as active vector application times does not vary between analysed modulation techniques, the z subplane squared harmonic flux is equal in all presented modulation algorithms (Figure 6c). As expected, the S-PWM presents a lower output current distortion, mainly due to the clamping times applied in discontinuous algorithms. In addition, the squared harmonic flux is larger near $\theta =\pi /2$ due to the vector’s highest amplitude of ${\mathbf{v}}_{\mathbf{12}}$ and, as a consequence, the introduced error voltage is larger. In this context, the HD-PWM shows a good harmonic performance when ${\mathbf{v}}_{\mathbf{ref}}$ is near ${\mathbf{v}}_{\mathbf{12}}$ since the S-PWM scheme is applied in that sector. Lastly, the squared harmonic flux achieves its maximum for a medium modulation index in the $\alpha \beta$ subplane. On the other hand, the squared harmonic flux increases with the modulation index in the z subplane since it only depends on the active vector application time.

Likewise, HDF results are shown in Figure 7 when the same switching frequency is used in every technique. However, since discontinuous algorithms have less commutations per $T_{sw}$, the average switching frequency (ASF) [29] can be introduced. Therefore, HDF is redefined as:

$$HD{F}_{ASF}={\delta }_{clamp}^{2}HDF.$$

(9)

Applying this correction factor, HDF results are shown in Figure 7. Under these circumstances, although the HD-PWM still has a larger HDF, for high modulation index values ($M_a\ge 0.9$ approximately), the HD-PWM shows a slightly superior performance than the S-PWM.

The main advantage of the proposed modulation over the S-PWM is the reduction of switching losses. However, it goes a step further by equalising the clamping times between positive and negative bus voltages. This results in a better distribution of semiconductor losses, reducing the probability of more faults occurring. This is shown in detail in the simulations conducted in the next section.

4. Simulation-Based Switching Loss Analysis of the Proposed HD-PWM

In this section, a switching losses analysis, where a homogeneous temperature distribution was assumed for all IGBTs, was carried out by simulation. To that end, modulation techniques were validated on the mathematical model of an electric vehicle, fully described in [30]. This simulation platform incorporated, in addition to the power and control electronics model of the vehicle, the acceleration/braking and speed profiles of the driving cycles. In fact, the use of these profiles has been proven to be very useful to check the performance of the propulsion system in conditions close to the real situation [31]. For electric vehicles, the use of specially designed cycles is recommended. Thus, in this work, the Fleet-BEV’s urban cycle (Figure 8), obtained from the data of several electric vehicles, was implemented. For simulation purposes, an Infineon IKY75N120CH3 IGBT module was modelled in Matlab/Simulink to estimate its losses. However, since conduction losses do not depend on the modulation strategy, they were not further analysed.

On the one hand, Figure 9 shows the accumulated energy due to switching losses during the urban driving cycle. At the end of the driving cycle, 23.13% of the switching energy was saved with the HD-PWM technique. On the contrary, if the total energy of the converter was taken into account, considering conduction and switching losses, the obtained improvement was 11.34%. Likewise, the average efficiency of the S-PWM modulation technique was 94.15%. In contrast, the average efficiency of the HD-PWM technique was 94.77%. That is, the efficiency improved by 0.62% when comparing the HD-PWM technique with the S-PWM technique.

5. Experimental Results

To validate the proposed HD-PWM algorithm, the experimental setup shown in Figure 10 was built, which included a DC voltage source, a controller board (OPAL-RT OP4510), a driver board, a five-phase power converter, and a balanced RL load. Indeed, RL loads have been shown to be useful for validating the performance of modulation techniques at different operating points [32].

Modulation techniques were implemented into the Kintex-7 FPGA included in the real-time simulation platform OP4510 from manufacturer OPAL-RT. Likewise, the modulation algorithm was implemented following carrier-based principles by adding the adequate zero-sequence signal to the sinusoidal references defined in (2). The pulses generated through the comparison between the reference voltages and the high-frequency triangular signal were sent to the drivers through the digital outputs of the OP4510. Additionally, the five-phase inverter was built using two three-phase inverters with the sixth branch gates short-circuited and with a common DC voltage source. Each inverter was based on a Semikron SK15GD12T4ET IGBT module. Finally, 10 $\Omega$ resistors in series with 10 mH inductors were used to form each phase of the star-connected load.

First, and due to the complexity of measuring the IGBTs switching losses, the system efficiency was experimentally measured with the PM6000 power analyser from Voltech (Chennai, India). The efficiency of each PWM scheme was measured using the same $f_{sw}=18\mathrm{kHz}$ (Figure 11). The HD-PWM algorithm produced lower losses than the S-PWM in all the linear range, reaching efficiency levels up to 96.66% ($M_a=1$). On the other hand, the maximum efficiency of the S-PWM algorithm was 96.26%. Nonetheless, the difference in efficiency between these two modulations when $M_a$ equalled 0.5 was 1.24%. However, traction applications frequently operate at low modulation indexes ($M_a\le 0.5$) values in urban areas, where the switching losses reduction advantages of the HD-PWM can be better exploited [33,34].

On the other hand, the harmonic performance of the modulation techniques was analysed. For that purpose, each PWM technique’s b-phase current was measured with the Tektronix DPO 7045C digital oscilloscope under the static operation point of $f_{sw}$ = 18 kHz, $V_{DC}$ = 250 V, and $M_a$ = 0.85. To that end, Figure 12 shows the b-phase currents of each modulation and low-order harmonics amplitude are summarised in

Table 2. b-phase current harmonics’ amplitude percentage of studied modulation techniques.

	1st Harm.	3rd Harm.	5th Harm.	7th Harm.	9th Harm.
S−PWM	100	1.94	0.83	0.13	0.07
HD−PWM	100	1.75	0.95	0.24	0.11

. As expected, the S-PWM had the lower THD (1.52%) and in the two techniques, the third harmonic was the most prominent one due to the control loss of the third harmonic subplane. Likewise, the achieved minimum THD was 1.64% for the HD-PWM which, despite being slightly higher, still showed a high performance.

6. Conclusions

Two-level five-phase converters offer several advantages in faulty operation due to their inherent fault-tolerant capability. In this sense, modulation algorithms are able to improve the converter behaviour under such circumstances. Therefore, the aim of this work was to ensure the reliability of the converter when a fault occurred, even though the THD may be somewhat worse. Moreover, in the event of a fault, it is preferable to increase the motor losses rather than the converter losses to avoid further stress on the healthy semiconductors. Consequently, the HD-PWM technique was analysed and compared to a standard S-PWM. The results showed that the HD-PWM offered a higher efficiency than the S-PWM, with an improvement of 0.5% in high modulation indexes and up to 1.24% for $M_a=0.5$ ($f_{sw}$ = 18 kHz), in addition to a good THD. In addition, the proposed PWM scheme was first validated on an electric vehicle simulation platform under different operating points, defined by an urban driving cycle. Moreover, the HD-PWM was also probed experimentally in an open-loop five-phase converter. In this sense, discontinuous modulations were shown to have a superior performance in terms of efficiency (maximum of 96.66%, when $f_{sw}$ = 18 kHz) and, for high modulation index values, a similar THD as the S-PWM algorithm.

On the other hand, the HD-PWM required the calculation of the zero-sequence signal, which increased the computational load. Moreover, the THD was worse at lower modulation indexes, thus it is recommended to use it in modulation indexes close to unity. Likewise, future research should investigate the effects of the discontinuous techniques on EMI, as the presence of harmonics can interfere with other nearby electrical equipment, leading to operational issues and malfunctions. Additionally, investigating the extension of the linear range of discontinuous techniques under fault conditions would be beneficial. Despite its limitations, the HD-PWM technique presents a promising solution for improving the harmonic performance of power electronics systems. Therefore, the HD-PWM technique is a viable alternative to the traditional S-PWM for maintaining a reliable operation of the converter and reducing the stress on the semiconductors in the event of an open-phase fault.