Large-Scale Assembly and Mask-Free Fabrication of Graphene Transistors via Optically Induced Electrodeposition

Abstract

Graphene, known as an alternative for silicon, has significant potential in microelectronic applications. The assembly of graphene on well-defined metal electrodes is a critical step in the fabrication of microelectronic devices. Herein, we present a convenient, rapid, and large-scale assembly method for deposition of Ag electrodes, namely optically induced electrodeposition (OIED). This technique enables us to achieve custom-designed and mask-free fabrication of graphene transistors. The entire assembly process can be completed within a few tens of seconds. Our results show that graphene-based transistors fabricated with Ag electrodes function as a p-type semiconductor. Transfer curves of different samples reveal similar trends of slightly p-type characteristics, which shows that this method is reliable and repeatable.

1. Introduction

Graphene transistors show extraordinary performance because of the unique electronic, physical, and mechanical properties of graphene [1,2,3,4]. To date, the common methods used to assemble and fabricate graphene transistors are e-beam lithography induced deposition [5,6], chemical self-assembly [7] and dielectrophoresis (DEP) [8,9,10,11,12]. Although e-beam lithography induced deposition is compatible with existing micro-fabrication processes, this expensive and complicated manufacturing process is not suitable for low-cost large-scale assembly of graphene. The chemical self-assembly method uses electrostatic interactions to self-assemble graphene sheets onto patterned electrodes via a low-efficiency and uncontrollable process. However, only 10% to 20% of graphene is connected to the electrodes. Owing to its convenient and flexible operating characteristics, many micro/nano-scale materials, such as nanoparticles [13], carbon nanotubes [14], DNA [15] and cells [16], have been assembled onto patterned electrodes via the DEP technique. This method can achieve 100% assembly of graphene; but, the layers of graphene, the position and the direction between graphene and electrodes, and the photomask-induced patterned electrodes are limited to achieve a low-cost, controllable and large-scale graphene device assembly. Optically induced electrodedeposition (OIED), developed from the conventional DEP method, has become a viable technology for assembling micro/nanodevices [17,18]. Utilizing this method, arbitrary configurations of metal electrodes can be directly produced on a computer avoiding conventional mask fabrication. Furthermore, the relative position of graphene and electrodes can be precisely controlled.

This work reports large-scale graphene device assembly via OIED. Chemical vapor deposition (CVD) grown graphene was transferred onto a a-Si:H-based substrate. Because of a poor contrast of graphene on the substrate, “development” electrode arrays were rapidly constructed (within 1 s) to distinguish the position of graphene. Subsequently, Ag electrodes with customized configurations were grown on graphene within 30 s via OIED. The current and voltage measurements were conducted at room temperature under ambient conditions. We observed that graphene-based transistors (FETs) with Ag electrodes exhibit p-type characteristics. The transfer curves of three graphene-based FETs showed that the Dirac points slightly shift to V_g = 0.1, 0.05 and 0.25 V.

2. Materials and Methods

2.1. Materials

Graphene was prepared by the Institute of Metal Research (IMR), Chinese Academy of Sciences using CVD growth method, as depicted in Reference [19]. A solution with a concentration of 100 mM of $A{g}^{-}$ ions was prepared by dissolving silver nitrate (≥99.8% purity) in deionized water. This solution provides the raw materials for both determination of the position graphene and fabrication of the Ag electrodes. Graphene was characterized by atomic force microscopy (AFM) in the tapping mode, and the AFM images is shown in Figure 1a. To confirm the number and quality of the graphene, the Raman spectra has been performed, as shown in Figure 1b. The intensity ratio of the 2D and G peak is above 2, which shows the typical features of monolayer graphene. The intensity of D peak, which is associated with disordered carbon atoms and defects, is nearly invisible, indicating the high quality of the graphene.

2.2. Apparatus

The home-made OIED experimental system for fabricating electrodes via the introduction of microfluidic control technology into a conventional optically induced DEP (ODEP) experimental system is shown in Figure 2. The system consists of five functional modules, including a virtual electrode generation module (Flash 11, Adobe, CA, USA), OIED chip (discussed later), projection module (LCD projector, Sony VPL-F400X, Tokyo, Japan; condenser objective, Nikon 50X/0.55, Tokyo, Japan), operation control module (3D Mobile Platform; signal generator, Agilent 33522A, CA, USA), and real-time visual feedback module (CCD, Zoom 160, OPTEM, Alberta, Canada).

2.3. Methods

An Ag electrode was constructed on graphene by oxidation-reduction reaction process:

$$A{g}^{+}+e^{-}=Ag$$

(1)

According to the above reaction, operation will stop, because water in the solution will decompose and eventually dry out during the operating process. In traditional ODEP chips, the solution needs to be injected manually through the inlet (Inlet) with a micro-shifter, as shown in Figure 3a. This issue can be overcome using the OIED system. An OIED chip consists mainly of three components: a photoconductive lower electrode, microfluidic chamber for containing and transporting the electrolyte, and a patterned indium tin oxide (ITO) upper electrode, as shown in Figure 3b. The photoconductive lower electrode substrate consists of predeposited 120 nm-thick ITO and 1 μm-thick a-Si:H fabricated through plasma-enhanced CVD. The upper electrode is a patterned ITO glass. Figure 3c,d show the structure of the patterned ITO glass. First, the inlet, inlet channel, operating area, outlet channel, and outlet have been carved on a double-sided adhesive tape, as shown in Figure 3c. The carved double-sided adhesive tape was then transferred onto an ITO glass, and the inlet and the outlet were drilled for inserting pipes as shown in Figure 3d.

Before electrode deposition, graphene was transferred onto a photoconductive lower electrode by the bubbling transfer method [21]. Pipes were inserted into the inlet and the outlet after the patterned ITO upper electrode and the photoconductive electrode coating with graphene were packaged. A signal generator (Agilent 33522A) that generated a sinusoidal voltage was applied between the top and the bottom ITO electrodes. The flow velocity of the solution in the chamber was controlled by a micro pump (HARVARD PHD 2000). The deposition of the Ag electrode was carried out at an amplitude of 20 V_pp (peak-to-peak voltage) and a frequency of 50 kHz.

After the deposition process, the samples were characterized using a digital microscope (KH-7700 Hirox, Japan), AFM (D3100, Veeco, NY, US), and scanning electron microscope (SEM; Zeiss EVO MA, Oberkochen, Germany). The conductivity of the electrodes and graphene was measured using two tungsten probes with diameters of 5 µm on an analytical probe station. A semiconductor analyzer (Agilent, 4155C) was used to measure the electrical properties at room temperature under ambient conditions.

3. Results and Discussion

3.1. Growth of Ag Electrodes by OIED

Figure 4 shows the topographic images of Ag electrodes deposited at different time intervals. Figure 4a–f are the characterization results after 10 and 20 s deposition, respectively obtained by optical microscopy, AFM and SEM. The scale bars are 100, 30 and 3 μm, respectively for optical, AFM, and SEM images. The AFM images reveal that the thickness of the Ag electrodes increases with increase in the deposition time. The SEM images show that Ag particles become larger and denser with increase in the deposition time, as shown in Figure 4c,f.

3.2. Large-Scale Assembly of Graphene by OIED

Graphene on an OIED chip cannot be directly observed through a digital microscope; therefore, the position of graphene on the OIED chip needs to be determined before the deposition of the electrodes. Owing to the hydrophobic property of graphene, the electrochemical reaction of the solution on graphene is much slower than that on the a-Si:H substrate. Therefore, the position of graphene can be distinguished by rapidly depositing electrode arrays. These arrays are called “development” arrays; they allow graphene to appear on the substrate like in a photographic film development process. The deposition time of the “development” arrays is very short, usually within 1 s; hence, these electrode arrays are not electrically connected. Figure 5 shows the Ag electrodes deposition process on graphene using the OIED system. The “development” results of graphene on the a-Si:H substrate are as shown in Figure 5a. The white dotted lines indicate the “development” electrode arrays. The edges of graphene are visible in these electrode arrays. After the position of graphene is identified, the patterns of electrodes are dynamically constructed on the computer based on the shape and the position of graphene. The projected patterns are visible as red lighted areas. As shown in Figure 5b–d, the thickness of the deposited Ag electrodes increases with an increase in the deposition time. The deposition time was approximately 30 s.

Figure 6a–c show the optical images of large-scale graphene device assembly; the black bars represent 200, 100, and 200 μm, respectively. Different shapes and sizes of Ag electrodes were deposited at the hexagonal edge of graphene with width in the range of 15–30 μm, and Ag deposition occurs at the ripples and defects in graphene. Figure 6d shows the current-voltage characteristics measured using a semiconductor parameter analyzer. The Ag electrode is electrically connected to graphene though an Ohmic connection. The inset in Figure 6d is the optical image of two tungsten probes connecting the electrodes on an analytical probe station for the measurement of current-voltage characteristics.

3.3. The Structure and Electrical Characteristics of Assembled Graphene-Based FETs

The electrical characteristics of the assembled graphene-based FETs with Ag electrodes were measured at room temperature under ambient conditions using a semiconductor parameter analyzer (Agilent 4155C). As shown in Figure 7a, the output curves were measured with a fixed gate voltage (V_g) from −40 to −10 V in steps of −10 V. The output curves indicate that the graphene-based FET exhibits p-type characteristics. The main charge carriers are holes, and as the concentration of the holes increase when the V_g is negative, the graphene resistance decreases. The transfer curves were measured at a fixed drain voltage of 100 mV for three samples, as shown in Figure 7b. The Dirac points are at V_g = 0.1, 0.05, and 0.25. The G and 2D bands upshift to ~1590 and ~2685 cm⁻¹, which shows typical features of p-doping. The slight shift in the Dirac point reveals that this method is reliable and repeatable.

4. Conclusions

In summary, a large-scale assembly of graphene has been successfully realized using OIED. Both the electrode shapes and sizes could be dynamically controlled in real-time without using any conventional lithography procedures during the entire assembly process. Silver electrodes could be fabricated rapidly within a few tens of seconds and were electrically connected to graphene though an Ohmic connection. Furthermore, current and voltage measurements of the graphene-based FETs with Ag electrodes show p-type characteristics. The Dirac points are slightly shifted to V_g = 0.1, 0.05, and 0.25 V, respectively. Our future work will investigate the contact resistance of devices with different metal contacts and deposition intervals. Unlike the conventional technique, the presented method could achieve a bottom-up, high-efficiency and low-cost assembly of graphene at precise locations, demonstrating the potential as a robust and highly efficient method for the fabrication of nanoelectronic devices using other emerging two-dimensional materials.