Zhang, J.; Li, X.; Ji, J.; You, S.; Chen, L.; Wang, L.; Li, Z.; Hao, Y.; Zhang, J.
A CMOS-Compatible Process for ≥3 kV GaN Power HEMTs on 6-inch Sapphire Using In Situ SiN as the Gate Dielectric. Micromachines 2024, 15, 1005.
https://doi.org/10.3390/mi15081005
AMA Style
Zhang J, Li X, Ji J, You S, Chen L, Wang L, Li Z, Hao Y, Zhang J.
A CMOS-Compatible Process for ≥3 kV GaN Power HEMTs on 6-inch Sapphire Using In Situ SiN as the Gate Dielectric. Micromachines. 2024; 15(8):1005.
https://doi.org/10.3390/mi15081005
Chicago/Turabian Style
Zhang, Jie, Xiangdong Li, Jian Ji, Shuzhen You, Long Chen, Lezhi Wang, Zilan Li, Yue Hao, and Jincheng Zhang.
2024. "A CMOS-Compatible Process for ≥3 kV GaN Power HEMTs on 6-inch Sapphire Using In Situ SiN as the Gate Dielectric" Micromachines 15, no. 8: 1005.
https://doi.org/10.3390/mi15081005
APA Style
Zhang, J., Li, X., Ji, J., You, S., Chen, L., Wang, L., Li, Z., Hao, Y., & Zhang, J.
(2024). A CMOS-Compatible Process for ≥3 kV GaN Power HEMTs on 6-inch Sapphire Using In Situ SiN as the Gate Dielectric. Micromachines, 15(8), 1005.
https://doi.org/10.3390/mi15081005
