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Open AccessArticle

Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM

Department of Electronic and Electrical Engineering, Ewha Womans University, Seoul 03760, Korea
School of Electronics Engineering, Kyungpook National University, Daegu 702–701, Korea
Department of Electronic Engineering, Gachon University, Gyeonggi-do 461–701, Korea
Authors to whom correspondence should be addressed.
Micromachines 2020, 11(2), 228;
Received: 10 February 2020 / Revised: 21 February 2020 / Accepted: 21 February 2020 / Published: 23 February 2020
(This article belongs to the Special Issue Miniaturized Transistors, Volume II)
Recently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell’s data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell’s state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area. View Full-Text
Keywords: one-transistor dynamic random-access memory (1T-DRAM); polysilicon; grain boundary; electron trapping one-transistor dynamic random-access memory (1T-DRAM); polysilicon; grain boundary; electron trapping
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Kim, H.; Yoo, S.; Kang, I.-M.; Cho, S.; Sun, W.; Shin, H. Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM. Micromachines 2020, 11, 228.

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