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Article

Design and Implementation of a GaN-Based Three-Phase Active Power Filter

Department of Electrical Engineering, CEECS, National United University, Miaoli 36063, Taiwan
*
Author to whom correspondence should be addressed.
Micromachines 2020, 11(2), 134; https://doi.org/10.3390/mi11020134
Received: 25 December 2019 / Revised: 21 January 2020 / Accepted: 22 January 2020 / Published: 24 January 2020
(This article belongs to the Special Issue Wide Bandgap Based Devices: Design, Fabrication and Applications)

Abstract

:
Renewable energy (RE)-based power generation systems and modern manufacturing facilities utilize a wide variety of power converters based on high-frequency power electronic devices and complex switching technologies. This has resulted in a noticeable degradation in the power quality (PQ) of power systems. To solve the aforementioned problem, advanced active power filters (APFs) with improved system performance and properly designed switching devices and control algorithms can provide a promising solution because an APF can compensate for voltage sag, harmonic currents, current imbalance, and active and reactive powers individually or simultaneously. This paper demonstrates, for the first time, the detailed design procedure and performance of a digitally controlled 2 kVA three-phase shunt APF system using gallium nitride (GaN) high electron mobility transistors (HEMTs). The designed digital control scheme consists of three type II controllers with a digital signal processor (DSP) as the control core. Using the proposed APF and control algorithms, fast and accurate compensation for harmonics, imbalance, and reactive power is achieved in both simulation and hardware tests, demonstrating the feasibility and effectiveness of the proposed system. Moreover, GaN HEMTs allow the system to achieve up to 97.2% efficiency.

1. Introduction

In recent years, the rapid increase in the penetration level of renewable energy (RE)-based distributed power generation (DPG) has resulted in noticeable degradation in the voltage stability and power quality (PQ) of existing power systems. The intrinsic features of DPG systems include (1) intermittent power flow caused by the utilization of maximum power point tracking (MPPT) control functions and (2) harmonic current injections caused by various power converters using switching type control techniques. Moreover, modern technologies such as automatic manufacturing systems (AMS), Internet of Things (IoT), and Industry 4.0 require a large number of power converters based on high-switching frequency power electronic devices. It can be imagined that the combination of a variety of different harmonics in load currents and unbalanced active and reactive powers can negatively affect the PQ of power networks. In practice, there are a number of compensating schemes and devices commonly used for PQ improvement applications, such as capacitor banks, passive filters, series active power filters, shunt active power filters and their combinations. Of the reported methods, the active power filter (APF) is a very widely adopted solution because, with appropriate control strategy, it is capable of providing simultaneous compensation for voltage sag, harmonic current, imbalance, and active and reactive powers. Moreover, with an external energy source and/or energy storage devices, it can also be used as an uninterruptable power supply (UPS). The main unit of an APF system is a power converter that performs the desired PQ control functions though proper switching control of power electronic devices. An APF is usually connected to the point of common coupling (PCC) in parallel or series to perform its designed functions; however, shunt APFs are more commonly used because they provide more flexible compensation functions though current-injecting control and require less auxiliary equipment. When a series APF and a shunt APF are connected with a common direct current (DC) link, they can be used simultaneously, known as a unified power quality conditioner (UPQC) [1,2,3,4].
In open literature, there are a lot of papers investigating the application of APF to the mitigation of PQ issues, such as the improvement of PCC voltage stability [5,6], compensation of harmonic currents [5,6,7] and unbalance load currents [7,8], injection of active power [8,9], regulation of reactive power [6,9], etc. In order to develop high-performance APFs, it is crucial to improve the switching performance of power converters. In other words, it is very desirable to achieve higher efficiency, shorter response time, and higher power density of power converters used in APFs. To realize the aforementioned objective, wide-bandgap (WBG)-based power switching devices offer a promising solution. Gallium nitride (GaN) is a widely discussed WBG semiconductor material that benefits power-switching device technology with higher voltage, higher switching frequency, higher power, and better high-temperature capability in power switches compared with conventional silicon (Si)-based technologies. It has been expected that GaN high electron-mobility transistors (HEMTs) can greatly enhance the performance of power converters with less than 1-kV power switching requirement [10,11,12]. However, in open literature, the published papers on GaN HEMTs mostly address the manufacturing, device characteristics, driving, and switching performances [13]. Only two papers regarding GaN-based single-phase APFs were found in the Institute of Electrical and Electronics Engineers (IEEE)/Institution of Engineering and Technology (IET) Electronic Library (IEL) and ScienceDirect OnSite (SDOS) databases [14,15]. In [14], a GaN-based single-phase APF with a modified sigma-delta modulator technique was proposed and verified with simulation studies. In [15], a 5kW single-phase hybrid APF with a new control system was proposed to improve the system performance. There are currently few papers addressing the design issues and reporting performances of GaN-based three-phase inverters in practical application cases. As a result, this paper presents the key design procedure and demonstrates for the first time the performance of a 2-kVA GaN-based three-phase shunt APF system.
Following the introduction in this section, the next section will briefly describe the features of GaN HEMTs and its driving requirements. The third section addresses the mathematical modeling and control strategy of the proposed GaN-based three-phase APF based on synchronous reference frame (SRF) theory. In the fourth section, the proposed APF and control system are simulated using a comprehensive PQ control scenario. Hardware implementation and a test of a 2 kVA prototype are carried out in the fifth section. The sixth section provides some discussions on key technical issues related to the proposed GaN based three-phase APF. Finally, this paper is concluded in the last section.

2. Gallium Nitride (GaN) High Electron-Mobility Transistor (HEMT) and Its Driving Requirements

GaN HEMTs are believed to be the most promising solution for low- to medium-power applications because of their advantages such as higher breakdown voltage, lower on-resistance, and higher switching speed compared with conventional Si-based switching devices; these advantages can increase system efficiency and power density significantly and thus lead to new opportunities for achieving power converters with improved performance. Commercially available GaN HEMTs now achieve up to 650 V/50 A and 900 V/15 A [13].
There are normally on and normally off GaN HEMTs. Normally on GaN HEMTs, also known as depletion mode (D mode) GaN HEMTs, are not popular because normally off switching devices are a common requirement for power converter applications. On the other hand, normally off GaN HEMTs such as enhancement mode (E mode) GaN HEMTs and cascode GaN HEMTs can be turned on with positive VGS and turned off with zero or negative VGS. Generally, the turn-on threshold and highest allowed driving voltages of a GaN HEMT are much smaller than those of conventional Si-based switches. As a result, the careful design of driving circuit is necessary in order to avoid fault turn-on and high overshoot. Common suggestions include providing separate turn-on and turn-off driving paths, achieving minimized overlapping between driving and power loops, using Miller clamp and negative voltage sources to ensure reliable turn-offs, etc. [13].

3. Mathematical Modeling and Control Algorithms of GaN-Based Active Power Filter (APF)

3.1. GaN-Based Three-Phase Active Power Filter

The main power electronic circuit in a three-phase shunt APF system is a three-phase inverter. The main control functions in an APF are to adjust the DC link voltage of the three-phase inverter to the rated value and to compensate reactive power, unbalanced current and harmonic components of the load as required. The circuit architecture of the proposed three-phase inverter is shown in Figure 1. The DC link voltage control adopts dual-loop control schemes, where the inner loop controls inductor currents, and the outer loop controls DC link voltage. By controlling the inductor currents, the goals of regulating DC link voltage and compensating harmonics, unbalanced and reactive components of load currents can be achieved.
The circuit specifications of the proposed three-phase inverter developed in this paper are the following: the three-phase line to line voltage of the grid = 110 Vrms, grid frequency = 60 Hz, rated power = 2 kVA, DC link voltage = 200 V, switching frequency = 50–100 kHz, DC voltage sensing factor = 0.012, AC current sensing factor = 0.05, AC voltage sensing factor = 0.0062, and DC voltage variation limit = 1%.

3.2. Design of Direct Current (DC) Capacitor and Filter Inductors

The main function of the DC link capacitor is to stabilize DC link voltage. If the DC link capacitance is too large, the dynamic response of the DC link voltage will be slow, and the cost of the APF hardware system will be increased; if the DC capacitor is too small, it will be difficult to suppress the disturbance caused by external power flow. In order to design the appropriate size of the capacitor, we first define instantaneous power of the DC link:
P d c = V d c I d c = ( V ¯ d c + V ˜ d c ) ( I ¯ d c + I ˜ d c ) ,
where Vdc and Idc represent DC voltage and current, respectively, which can both be separated into their respective DC components ( V ¯ d c and I ¯ d c ) and AC components ( V ˜ d c and I ˜ d c ). In order to simplify the analysis, we make three assumptions: the conversion efficiency of the three-phase inverter is 100%, V ˜ d c is considered zero, and I ¯ d c is considered zero because I ˜ d c is generally far larger than I ¯ d c . As a result, we obtain the following:
P d c V ¯ d c I ˜ d c ( t ) = V ¯ d c C d c d V ˜ d c ( t ) d t ,
where Cdc represents DC link capacitance. Then, we obtain the voltage variation of the DC link capacitor:
V ˜ d c ( t ) = 1 C d c V ¯ d c 0 t P d c ( t ) d t ,
where 0 t P d c ( t ) d t represents the capacity of the three-phase inverter. Then, we obtain DC link capacitance:
Δ V d c = S f s w C d c V ¯ d c C d c = S f s w Δ V d c V ¯ d c ,
where fsw represents the switching frequency. It should be noted that if an electrolytic capacitor were used for this APF design case, a higher capacitor specification will be required.
The function of the filter inductors is to filter out current ripples caused by the switching of the shunt three-phase inverter. Large inductances suppress the ripples of inductor currents but reduce the response speed of current controllers. On the other hand, although small inductances improve the response speed of the current controller, they cause large current ripples. Therefore, the inductances can be adjusted according to the actual situation. In order to design the filter inductances, we first need the following inductor voltage equation:
v ( t ) = L s h d i s h ( t ) d t ,
where Lsh represents inductance value, and ish represents inductor current. According to the relationship between voltage and current on an inductor, (5) can be expressed as follows.
Δ I s h = D 2 × T s w × ( V d c V g r i d ) L s h ,
where ΔIsh represents shunt inductor current ripple, D represents duty cycle, Tsw represents switching period, and Vgrid represents grid voltage. The duty cycle can be expressed the following:
D ( ω t ) = m a sin ( ω t ) ,
where ma represents modulation factor and equals modulation signal divided by triangular wave amplitude (vcon/vtri). Then, we get output AC voltage:
V s h ( ω t ) = V d c m a sin ( ω t ) .
Substituting (7) and (8) into (6) yields the following:
Δ I s h = V d c × T s w 2 L s h m a sin ( ω t ) [ 1 m a sin ( ω t ) ] .
Then, we differentiate (9) and let the result be zero in order to obtain the maximum value of inductor current ripple:
d Δ I s h ( ω t ) d ω t = V d c T s w 2 L s h m a [ cos ( ω t ) 2 m a sin ( ω t ) cos ( ω t ) ] = 0 .
As a result,
sin ( ω t ) = 1 2 m a .
Lastly, substituting (11) into (9) yields the following equation:
L s h = V d c 8 f s w Δ I s h .
According to the circuit specifications of the three-phase inverter and commonly assumed inductor current ripple, 10% of output current, it is calculated that the required inductance should be at least larger than 500 μH.

3.3. Mathematical Modeling and Controller’s Design for GaN-Based Shunt APF

3.3.1. Mathematical Modeling

The mathematical model of the shunt-connected three-phase inverter can be derived according to Figure 1. First, the following equations are obtained with Kirchhoff’s voltage law:
L s h d i s h _ a d t = v A N v g r i d _ a v n N ,
L s h d i s h _ b d t = v B N v g r i d _ b v n N ,
L s h d i s h _ c d t = v C N v g r i d _ c v n N ,
where ish_a, ish_b, and ish_c represent three-phase inductor currents, vAN, vBN, and vCN represent switching point voltages, Vgrid_a, Vgrid_b, and Vgrid_c represent three-phase grid voltages, and vnN represents the voltage between the grid ground and the inverter ground. Also, the three-phase three-wire system satisfies the following condition:
i s h _ a + i s h _ b + i s h _ c = 0 .
As a result, vnN can be expressed as the following:
v n N = ( v A N + v B N + v C N ) ( v g r i d _ a + v g r i d _ b + v g r i d _ c ) 3 .
Substituting Equation (17) into Equations (13)–(15) yields the following:
[ L s h d i s h _ a d t L s h d i s h _ b d t L s h d i s h _ c d t ] = 2 3 [ 1 1 2 1 2 1 2 1 1 2 1 2 1 2 1 ] ( [ v A N v B N v C N ] [ v g r i d _ a v g r i d _ b v g r i d _ c ] ) .
In this study, pulse width modulation (PWM) is used in the control, where the three-phase modulation signals vcona, vconb, and vconc are compared with vtri respectively to trigger the switches of all three switching legs. The output voltages of the switching legs can be expressed as follows:
v a N = ( 1 2 + v c o n a 2 v t r i ) V d c ;
v b N = ( 1 2 + v c o n b 2 v t r i ) V d c ;
v c N = ( 1 2 + v c o n c 2 v t r i ) V d c .
Substituting Equations (19)–(21) into Equation (18) and letting Vdc/2Vtri = Kpwm yield the following:
[ L s h d i s h _ a d t L s h d i s h _ b d t L s h d i s h _ c d t ] = 2 3 [ 1 1 2 1 2 1 2 1 1 2 1 2 1 2 1 ] ( K p w m [ v c o n a v c o n b v c o n c ] [ v g r i d _ a v g r i d _ b v g r i d _ c ] ) .
Using SRF theory, Equation (22) can be converted into the following:
[ L s h d I s h _ d d t L s h d I s h _ q d t L s h d I s h _ 0 d t ] = K p w m [ 1 0 0 0 1 0 0 0 1 ] [ v c o n d v c o n q v c o n 0 ] [ 1 0 0 0 1 0 0 0 1 ] [ V g r i d _ d V g r i d _ q V g r i d _ 0 ] [ 0 ω L s h 0 ω L s h 0 0 0 0 0 ] [ I s h _ d I s h _ q I s h _ 0 ] .

3.3.2. Design of Current Controllers

According to Equation (23), we can obtain block diagrams of direct-quadrature axis (d-q axis) current loops with type-II controllers as shown in Figure 2 and Figure 3, where ks and kv represent AC current and voltage-sensing factors, respectively. Under ideal feed-forward conditions, the transfer function of current loop (d-axis or q-axis) is as follows:
H i ( s ) = k s K p w m s L s h .
The transfer function of the adopted type II controller, which consists of a proportional-integral (PI) controller and a low pass filter (LPF), is as follows:
G i ( s ) = k ( s + z ) s ( s + p ) .
The loop gain can be expressed as follows:
L i ( s ) = G i ( s ) H i ( s ) = k ( s + z ) s ( s + p ) k s K p w m s L s h .
In this application case, the crossover frequency of a Type II controller is designed within the range of 1/4 to 1/10 of the switching frequency. This paper chooses the controller crossover frequency to be 1/10 of the switching frequency, the zero is designed at 1/4 of the crossover frequency, and the cut-off frequency of the LPF is designed to be 15 kHz:
ω i = 0.1 × 50 k × 2 π = 31416 r a d / s .
z = ω i / 4 = 7854 r a d / s .
p = 2 π × 15 k = 94248 r a d / s .
It follows that the gain of the plant at crossover frequency (GainHi) is as follows:
Gain Hi = k s K p w m s L s h = 2000 j ω = 0 j 0.0637 | Gain Hi | = 0.0637
The gain of the controller at crossover frequency (GainGi1) is as follows:
Gain Gi 1 = ( s + z ) s ( s + p ) = j ω i + 7854 j ω i ( j ω i + 94248 ) = 8.7535 × 10 6 j 5.5704 × 10 6 | Gain Gi 1 | = 1.0376 × 10 5
Then, the required gain for compensation at crossover frequency can be calculated:
k = 1 | Gain Hi | × | Gain Gi 1 | = 1.5139 × 10 6 .
Finally, the transfer function is obtained as follows:
G i ( s ) = 1.5139 × 10 6 ( s + 7854 ) s ( s + 94248 ) .
The designed kP and kI are 16.0633 and 2.5232956, respectively. Figure 4 shows the Bode plot of the controller and plant, where the designed phase margin is 58 degrees.

3.3.3. Design of DC Link Voltage Controller

The DC link voltage control loop regulates the real power balancing between the alternating current (AC) and DC terminals of the three-phase inverter. By ignoring steady-state operating point, we can obtain equivalent small signal model of the voltage loop as shown in Figure 5.
The instantaneous AC power at the AC side can be defined as follows:
P a c = V m sin θ I m sin θ + V m cos θ I m cos θ ,
where Vm and Im represent the maximum voltage and current under dq axes, respectively. According to trigonometric functions, Equation (34) can be simplified as follows:
P a c = V m I m .
Mapping the AC side signals onto the DC side and assuming that the inverter is lossless, we obtain the following:
P a c = P d c ;
V m I m = V d c I d c .
Then, we can obtain the relationship between the DC side current and the AC side current:
I d c = V m V d c I m = k d c I m ;
C d c d V d c d t = I d c V d c = I d c 1 s C d c ,
where kdc represents the conversion factor from AC side to DC side. According to Equations (38) and (39), we can obtain the transfer function of DC side voltage:
V d c I m = k d c s C d c , k d c = V m V d c .
According to the above derivations, we can obtain the block diagram of a DC link voltage control loop with a type-II controller as shown in Figure 6, where kvd and ks represent the sensing factors of DC voltage and AC current, respectively. Therefore, the transfer function of the DC voltage loop is as follows:
H d c ( s ) = k v d k d c k s C d c s .
The transfer function of the Type II controller is defined as follows:
G v ( s ) = k ( s + z ) s ( s + p ) .
It follows that the loop gain can be expressed as follows:
L v ( s ) = G v ( s ) H d c ( s ) = k ( s + z ) s ( s + p ) k v d k d c k s C d c s .
The main purpose of the Type II controller is to use an LPF to reduce possible interference affecting the DC link when the APF system compensates for PQ problems such as imbalance and harmonics in three-phase load currents. The crossover frequency is set at 1/500 of that of the current loop, the cut-off frequency of the LPF is set at 49 Hz, and the zero is designed at 1/5 of the crossover frequency of the DC loop:
ω v = ω i × 0.002 = 62.832 r a d / s ;
p = 2 π × 49 = 307.8768 r a d / s ;
z = ω v / 5 = 12.5664 r a d / s .
The gain of the plant at crossover frequency (GainHdc) can be calculated as follows:
Gain Hdc = k v d k d c k s C d c s = 118.9 j ω v = 0 j 1.8917 | Gain Hdc | = 1.8917
The gain of the controller at the crossover frequency (GainGv1) is as follows:
Gain Gv 1 = ( s + z ) s ( s + p ) = j ω v + 12.57 j ω v ( j ω v + 307.88 ) = 0.003 j 0.0013 | Gain Gv 1 | = 0.0032
Then, the required gain compensation at the designed crossover frequency can be calculated by:
k = 1 | Gain Hdc | × | Gain Gv 1 | = 165.1953 .
Finally, the transfer function of the voltage controller is obtained:
G v ( s ) = 165.1953 ( s + 12.5664 ) s ( s + 307.8768 ) .
The designed kP and kI are 0.5286 and 0.0001329397, respectively. Figure 7 shows the Bode plot of the controller and plant, where phase margin is 67 degrees.

3.3.4. Load Current Compensation Signals of APF

Using the SRF conversion technique, distorted and unbalanced three-phase load currents can be expressed as follows:
[ i L d i L q ] = [ i ¯ L d i ¯ L q ] + [ i ˜ L d i ˜ L q ] ,
where iLd and iLq represent dq-axis load currents, i ¯ L d and i ¯ L q represent dq-axis load currents with the fundamental frequency, and i ˜ L d and i ˜ L q represent the dq-axis components that require compensation. In order to obtain the compensation signals of the active current (q axis) iLq*, iLq is firstly filtered with an LPF and then subtracted from q-axis current feedback signal (iLq), while the compensation signals of the reactive current (d axis) iLd* equals the whole d-axis current feedback signal (iLd), as shown in Figure 8.

3.4. Complete System of GaN-Based Shunt APF

According to Figure 8, DC link voltage controller, and inductor current controllers, we can obtain the circuit configuration of the proposed GaN based three-phase APF system with the block diagram of complete control architecture, as shown in Figure 9.

4. Simulation Study and Results

With the design presented in the previous section, the proposed Gan-based shunt-type APF is tested for an integrated compensation of multiple power quality problems, including current harmonics, load current imbalance, and reactive currents. Powersim (PSIM) software is used to perform the simulation case of the abovementioned comparison tasks. The PSIM simulation model is shown in Figure 10.

4.1. Simulation Scenario

To demonstrate the performance of the proposed controllers, the integrated compensation for multiple load current quality problems with APF is simulated. In this case, the three-phase load bank consists of a balanced reactive load, an unbalance resistive load, and a non-linear load, as shown in Figure 11. Table 1 shows the detailed values of the loads used. At first (t0–t1), the shunt APF, connected to a three-phase power grid with the line to line voltage of 110 V, 60 Hz, adjusts the DC link voltage to 200 V and the compensation function is not activated; at t1, compensation is activated to achieve a set of balanced grid currents, zero distortion, and unit power factor (PF), as shown in Figure 12. Figure 13, Figure 14, Figure 15, Figure 16 and Figure 17 show the corresponding simulation results, and Table 2 shows root-mean-square (RMS) currents and total harmonic distortion (THD) data before and after compensation.

5. Hardware Implementation and Test Results

To verify the performance of the proposed GaN-based APF, this section presents the implementation of APF hardware prototype for verification and analysis based on the scenario arranged in the simulation case stated in the previous section. The photograph of the constructed GaN-based APF prototype is shown in Figure 18, where the numbered devices are listed in Table 3. A programmable three-phase AC power supply is adopted to emulate the grid voltage. The Texas Instruments (TI) microcontroller, TMS320F28335 (Texas Instruments, Dallas, TX, USA), is used to provide efficiency and flexibility in controller design. The system parameters and conditions of the experimental tests and measurement scenarios are the same as that used in the previous simulation case presented in Section 4.1. Figure 19, Figure 20, Figure 21, Figure 22, Figure 23 and Figure 24 show a set of test results; Figure 19 shows the waveforms of measured phase-a voltage and three-phase currents of the grid from t0 to t2. Figure 20 shows the DC link voltage and the output three-phase currents of the shunt APF from t0 to t2. The related waveforms of grid phase-a voltage and three-phase currents and the fast Fourier transform (FFT) of the grid phase-a current before the before and after the APF is activated are shown in Figure 21 and Figure 22, respectively. As can be seen in Figure 22, after the APF is activated the unbalanced and distorted currents have been well compensated and the current is in phase with the grid voltage achieving the control objective of unity power factor. To demonstrate the performance of the designed controllers, Figure 23 shows the command and feedback signals of DC link voltage and the PI controller output signals. The dq-axis current commands and feedback signals are shown in Figure 24. To provide a set of quantitative results, Table 4 shows the measured RMS currents and calculated THD data before and after compensation. In the stage of hardware construction and tests, the system efficiencies at different switching frequencies are also explored. The arrangement of the test scenario and the detailed results are presented in the next section.

6. Discussion

6.1. The Analysis of System Efficiency

In this paper, the system efficiencies at different switching frequencies (50 kHz, 80 kHz, and 100 kHz) and under different load levels are explored. Figure 25 shows the system block diagram of the efficiency tests. In this test, the AC terminals of the proposed three-phase GaN-based APF are connected to the three-phase power grid having the line to line voltage of 110 V and its DC terminal voltage is regulated at the designed 200 V by the proposed voltage controller of the APF. For testing the APF efficiencies under different load levels, a programmable electronic load is connected to the DC terminal of the APF. By setting different Pdc and measuring the corresponding Pac, the efficiency at a specific power level and switching frequency can be readily calculated. In this paper, three switching frequencies, i.e., 50, 80, and 100 kHz were tested. The calculated results are graphically shown in Figure 26. As can be seen in Figure 26, the maximum efficiency appears at about 50% of the rated load and it is found that when the switching frequency increases the efficiency decreases. This is mainly due to the increase in switching losses.
In the aspect of the efficiency comparison with different technologies, it is indeed difficult to establish a fair comparative basis due to some system constrains, e.g., the switching technique used, system capacities, quality of components used, and the control functions designed for the circuits. To provide a set comparative result, three recently published technical papers [16,17,18] using different technologies are summarized in Table 5.

6.2. The Thermographic Analysis of the System

Figure 27 shows a set of thermographic photos (using FLIER-E63900, T198547, E4) of the proposed GaN-based three-phase APF prototype operating under the rated capacity of 2 kW with different switching frequencies. As can be seen in the photos, the temperature of the switching devices increases as the switching frequency increases and the temperature of capacitors and the circuit board remain under 25 °C. Table 6 shows the summary of the recorded temperature data gathered from the presented thermographic photos. Based on the results of thermographic analysis, it has been found that the greatest losses are located at the six power-switching devices and the three relays which are designed for ensuring a successful synchronizing control with the power grid to which the proposed APF is connected. It should be noted that in practice, these relays can be removed after the overall control system of the APF has been properly tuned. This means that the maximum efficiency of the proposed GaN-based APF can be further improved.

6.3. Related Technical Issues

As mentioned previously, the proposed GaN-based three-phase APF circuit prototype is demonstrated for the first time. There are some technical issues to be further improved. These include: (1) the driving circuits can be improved to achieve higher switching frequency and to reduce the size of inductors; (2) the three relays can be removed or replaced with new devices having better quality in conduction losses to increase the overall system efficiency; (3) the layout of the circuit can be improved to reduce the noise level in current- and voltage-sensing mechanisms. It is important to note that the noise level in sensing signals constitutes the operating limits of the switching frequency of the proposed GaN-based APF circuit.

7. Conclusions

It has been expected that the mass application of RE-based distributed generation (DG) microgrids or smart grids, and various static and dynamic nonlinear loads is the future trend of development in power systems. To ensure an acceptable PQ level, the development of advanced PQ compensation schemes using new technologies in terms of power-switching devices and state-of-the-art control algorithms is a significant task. In this aspect, this paper has demonstrated, for the first time, a shunt-type GaN HEMTs-based three-phase APF controlled by DSP systems and type II controllers to achieve simultaneous compensation for current harmonics, load imbalance, and reactive currents. Based on the results obtained from simulation and the hardware tests, the proposed 2-kVA GaN-based three-phase shunt APF prototype with digitally integrated control scheme is able to achieve satisfactory compensation results in improving system-wide load current quality of a complex load network consisting of distorted, non-linear and unbalanced loads. In this study, the TPH3207 power switching devices and Si8271 driving integrated circuits (ICs) are successfully adopted. It has been found that GaN HEMTs provide superior performance to conventional Si-based power switches in terms of switching frequency, temperature feature and system efficiency. To further evaluate the system performance of the constructed GaN-based circuit prototype, in terms of efficiency, hotspot distribution and power losses in components, a thermographic analysis has been carried out. Results and discussions for improving the proposed implementation scheme have been presented. With the proposed APF operating at 50 kHz switching frequency, the THD and UR of the three-phase grid currents can be greatly reduced. The best THD improvement recorded is from 20.23% to 4.15% and UR is from 14.83% to 2.13% and the highest system efficiency of 97.2% has been achieved. For future research works, better circuit components and GaN HEMT driving methods based on a bootstrap design can be used for achieving higher switching frequency and better system performance.

Author Contributions

The corresponding author, C.-T.M. conducted the research work, proposed the design methods, designed the simulation and hardware test scenarios, verified the technical contents and polished the final manuscript. Z.-H.G., a postgraduate student in the department of electrical engineering, national united university, performed the paper search, managed figures and checked the related data. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by MOST, Taiwan, with grant numbers, MOST 108-2221-E-239-007, MOST 107-2221-E-239-036 and MOST 106-2221-E-239-026 and the APC was funded by MOST 108-2221-E-239-007.

Acknowledgments

The author would like to thank the Ministry of Science and Technology (MOST) of Taiwan for financially support the energy-related research regarding key technologies and the design of advanced power and energy systems.

Conflicts of Interest

The authors declare no conflict of interest.

References

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Figure 1. Shunt three-phase inverter.
Figure 1. Shunt three-phase inverter.
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Figure 2. Block diagram of d-axis current controller.
Figure 2. Block diagram of d-axis current controller.
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Figure 3. Block diagram of q-axis current controller.
Figure 3. Block diagram of q-axis current controller.
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Figure 4. Bode plot of shunt active power filter (APF) inductor current control loop.
Figure 4. Bode plot of shunt active power filter (APF) inductor current control loop.
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Figure 5. Equivalent circuits of the voltage control loop: (a) equivalent circuit under synchronous reference frame; (b) equivalent circuit on direct current (DC) side.
Figure 5. Equivalent circuits of the voltage control loop: (a) equivalent circuit under synchronous reference frame; (b) equivalent circuit on direct current (DC) side.
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Figure 6. Block diagram of DC voltage loop type II controller.
Figure 6. Block diagram of DC voltage loop type II controller.
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Figure 7. Bode plot of shunt APF inductor DC link voltage control loop.
Figure 7. Bode plot of shunt APF inductor DC link voltage control loop.
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Figure 8. The direct-quadrature axis currents compensation signals of the APF.
Figure 8. The direct-quadrature axis currents compensation signals of the APF.
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Figure 9. The circuit configuration of gallium nitride (GaN)-based shunt APF system and the block diagram of the control scheme.
Figure 9. The circuit configuration of gallium nitride (GaN)-based shunt APF system and the block diagram of the control scheme.
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Figure 10. Powersim (PSIM) simulation model of the proposed APF system.
Figure 10. Powersim (PSIM) simulation model of the proposed APF system.
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Figure 11. Load condition in simulated scenario.
Figure 11. Load condition in simulated scenario.
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Figure 12. Schematic diagram of simulated scenario.
Figure 12. Schematic diagram of simulated scenario.
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Figure 13. The grid-side phase-a voltage and three-phase currents/DC link voltage/shunt APF three-phase currents (t0–t2).
Figure 13. The grid-side phase-a voltage and three-phase currents/DC link voltage/shunt APF three-phase currents (t0–t2).
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Figure 14. Before t1: the grid phase-a voltage and three-phase currents/the fast Fourier transform (FFT) waveform of the grid phase-a current.
Figure 14. Before t1: the grid phase-a voltage and three-phase currents/the fast Fourier transform (FFT) waveform of the grid phase-a current.
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Figure 15. After t1: the grid phase-a voltage and three-phase currents/FFT waveform of the grid phase-a current.
Figure 15. After t1: the grid phase-a voltage and three-phase currents/FFT waveform of the grid phase-a current.
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Figure 16. Shunt APF DC link voltage command and feedback signals (t0–t2).
Figure 16. Shunt APF DC link voltage command and feedback signals (t0–t2).
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Figure 17. Shunt APF dq-axis current commands and feedbacks (t0–t2).
Figure 17. Shunt APF dq-axis current commands and feedbacks (t0–t2).
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Figure 18. (a) Photo of GaN-based three-phase APF hardware; (b) schematic of the hardware test and system.
Figure 18. (a) Photo of GaN-based three-phase APF hardware; (b) schematic of the hardware test and system.
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Figure 19. Grid phase-a voltage and three-phase currents (t0–t2).
Figure 19. Grid phase-a voltage and three-phase currents (t0–t2).
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Figure 20. DC link voltage and the shunt APF three-phase currents (t0–t2).
Figure 20. DC link voltage and the shunt APF three-phase currents (t0–t2).
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Figure 21. Before t1: the grid phase-a voltage and three-phase currents and the fast Fourier transform (FFT) waveform of the grid phase-a current.
Figure 21. Before t1: the grid phase-a voltage and three-phase currents and the fast Fourier transform (FFT) waveform of the grid phase-a current.
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Figure 22. After t1: the grid phase-a voltage and three-phase currents and FFT waveform of the grid phase-a current.
Figure 22. After t1: the grid phase-a voltage and three-phase currents and FFT waveform of the grid phase-a current.
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Figure 23. The command and feedback signals of DC link voltage and the proportional-integral (PI) controller output signal (t0–t2).
Figure 23. The command and feedback signals of DC link voltage and the proportional-integral (PI) controller output signal (t0–t2).
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Figure 24. The shunt APF dq-axis current commands and feedbacks (t0–t2).
Figure 24. The shunt APF dq-axis current commands and feedbacks (t0–t2).
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Figure 25. The system block diagram of the efficiency tests.
Figure 25. The system block diagram of the efficiency tests.
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Figure 26. Efficiencies of GaN-based shunt APF system at different switching frequencies.
Figure 26. Efficiencies of GaN-based shunt APF system at different switching frequencies.
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Figure 27. Thermographic photos of the proposed GaN-based three-phase APF prototype: (a) TPH3207 device switching at 50 kHz; (b) TPH3207 device switching at 80 kHz; (c) TPH3207 device switching at 100 kHz; (d) DSP; (e) communication interface; (f) inductors; (g) relay; (h) signal processing integrated circuits (ICs).
Figure 27. Thermographic photos of the proposed GaN-based three-phase APF prototype: (a) TPH3207 device switching at 50 kHz; (b) TPH3207 device switching at 80 kHz; (c) TPH3207 device switching at 100 kHz; (d) DSP; (e) communication interface; (f) inductors; (g) relay; (h) signal processing integrated circuits (ICs).
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Table 1. Load parameters for simulation scenario.
Table 1. Load parameters for simulation scenario.
Nonlinear LoadLinear LoadUnbalanced Load
RL1LL1LL2RL2RL3, RL4
50 Ω6 mH × 3152 mH × 3∞ Ω50 Ω
Table 2. Root-mean-square (RMS) currents and total harmonic distortion (THD).
Table 2. Root-mean-square (RMS) currents and total harmonic distortion (THD).
Power Grid Currents and Unbalance Ratio (UR)
ItemWithout APF
(t0–t1)
With APF
(t1–t2)
igrid_a (A)2.92.84
igrid_b (A)3.422.87
igrid_c (A)3.872.89
UR (%)14.910.94
THD
ItemWithout APF
(t0–t1)
With APF
(t1–t2)
THD (igrid_a) (%)19.183.91
THD (igrid_b) (%)15.563.94
THD (igrid_c) (%)13.893.94
Table 3. Devices in Figure 18a.
Table 3. Devices in Figure 18a.
NumberDeviceValue/Part Number
(1)MicrocontrollerTMS320F28335
(2)Interface circuit of the microcontrollerN/A
(3)–(5)GaN HEMT pairsTPH3207
(6) and (7)DC link capacitors680 mF/450 V
(8)–(10)Filter inductors0.5 mH
(11)–(13)Filter capacitors10 μF/300 V
Table 4. RMS currents and THD.
Table 4. RMS currents and THD.
Power Grid Currents and Unbalance Ratio (UR)
ItemWithout APF (t0–t1)With APF (t1–t2)
igrid_a (A)2.932.91
igrid_b (A)3.432.94
igrid_c (A)3.953.02
UR (%)14.832.13
THD
ItemWithout APF (t0–t1)With APF (t1–t2)
THD (igrid_a) (%)20.234.15
THD (igrid_b) (%)16.574.08
THD (igrid_c) (%)15.484.05
Table 5. Performance comparison of different technologies.
Table 5. Performance comparison of different technologies.
PaperSwitching DeviceFunctionPowerSwitching FrequencyEfficiency
[16]IGBTMotor drive8 kW20 kHz95.5%
[17]MOSFETMotor drive1.5 kW15 kHz92%
[18]SiCElectric vehicle8.8 kW50 kHz97%
proposedGaNActive power filter2 kVA50 kHz97.2%
80 kHz96.7%
100 kHz95.6%
Table 6. Summary of operating temperatures of individual devices.
Table 6. Summary of operating temperatures of individual devices.
Sensed ObjectOperating Temperature (°C)
TPH3207 @ 50kHz switching frequency40.9
TPH3207 @ 80kHz switching frequency46.7
TPH3207 @ 100kHz switching frequency51.4
DSP47.5
Communication interface46.5
Inductors30.4
Relays43.2
Signal processing integrated circuits (ICs)31.0

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Ma, C.-T.; Gu, Z.-H. Design and Implementation of a GaN-Based Three-Phase Active Power Filter. Micromachines 2020, 11, 134. https://doi.org/10.3390/mi11020134

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Ma C-T, Gu Z-H. Design and Implementation of a GaN-Based Three-Phase Active Power Filter. Micromachines. 2020; 11(2):134. https://doi.org/10.3390/mi11020134

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Ma, Chao-Tsung, and Zhen-Huang Gu. 2020. "Design and Implementation of a GaN-Based Three-Phase Active Power Filter" Micromachines 11, no. 2: 134. https://doi.org/10.3390/mi11020134

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