High-Efficiency Bidirectional DC–DC Converter Control for PV-Integrated EV Charging Stations: A Real-Time MBPC Approach

Abstract

In recent years, the rapid expansion of electric vehicle (EV) charging infrastructure and the increasing penetration of renewable energy sources require highly efficient and dynamically robust power electronic interfaces. In photovoltaic (PV)-assisted EV charging stations and DC microgrids, bidirectional DC-DC converters (BDCs) are essential for managing power flow between PV arrays, battery energy storage systems, and the DC bus supplying EV chargers. This paper presents a novel voltage and current control design for a BDC operating in a PV-powered DC microgrid oriented to EV charging applications. Following a detailed mathematical model of the converter, a digital current controller and a predictive voltage regulator were developed using Model-Based Predictive Control (MBPC). The proposed cascade control structure enables accurate DC bus voltage regulation and seamless bidirectional power flow under dynamic load variations representative of EV charging and discharging scenarios. The control scheme was evaluated in MATLAB/SIMULINK^® and experimentally validated through Field-Programmable Gate Array (FPGA)-based test benches using an OPAL-RT real-time (RT) simulator, integrating the RT-LAB and RT-eFPGAsim environments. The predictive controller achieved precise regulation in both buck and boost modes, reaching efficiencies of 97.07% and 98.57%, respectively. The results demonstrate that integrating MBPC with RT validation provides high performance, fast dynamic response, and computational efficiency, making the proposed approach suitable for renewable-integrated EV charging stations and next-generation DC microgrid-based mobility systems.

1. Introduction

The electrification of transportation is accelerating worldwide as part of global decarbonization strategies aimed at reducing greenhouse gas emissions and mitigating climate change [1]. The rapid growth of EVs is driving the development of advanced charging infrastructure capable of operating efficiently, reliably, and sustainably [2]. In this context, the integration of renewable energy sources, particularly PV systems, into EV charging stations has emerged as a promising solution to reduce grid dependency and carbon footprint.

According to the International Renewable Energy Agency (IRENA), the installed capacity of PV systems is expected to increase dramatically in the coming years [3], making solar energy one of the main contributors to future power generation. The decreasing cost of PV modules, combined with their long operational lifespan of 25–30 years, has facilitated their deployment in commercial, residential, and industrial applications, including renewable-assisted EV charging stations.

EV charging infrastructures increasingly adopt DC architectures to reduce conversion stages, improve overall efficiency, and simplify the integration of battery energy storage systems (BESSs). In such DC microgrids, BDCs play a crucial role by managing power exchange between PV arrays, battery storage, and the DC bus supplying EV chargers. These converters enable energy buffering, peak shaving, and support for islanded operation, ensuring voltage stability and reliable service under highly dynamic load conditions caused by EV charging profiles.

Maintaining stable DC bus voltage and flexible bidirectional power flow is particularly challenging in EV-oriented microgrids due to rapid load variations and potential constant power load behavior of fast chargers. Therefore, advanced control strategies are required to guarantee dynamic stability, high efficiency, and robust operation.

As the electricity demand and the reliability of power supplies continues to increase, microgrids have emerged as a viable answer, combining cutting-edge power electronics, control, and communication technologies [4]. Due to the high amount of DC power generated by renewable sources and the widespread use of DC loads, DC microgrids and their operation alongside AC microgrids are becoming increasingly common [5]. In conjunction with super-capacitors and batteries as energy accumulators, power electronics converters are frequently employed to guarantee steady functioning under various demands and conditions in some microgrids [6]. In PV systems, battery storage reduces power fluctuations caused by the features of PV arrays and solar irradiance [7].

PV battery control techniques need to be able to both flexibly adjust the power flows and stabilize the bus voltages [7]. PV emulator controllers were deployed in microcontroller-based implementations, where a classic proportional–integral (PI) cascade control was successfully tested in [8]. However, these implementations can face limitations in computational throughput and integration complexity when scaling to multivariable control architectures [8]. This can also be achieved using electronic development cards and even with FPGAs to reduce debugging costs and effort during testing [9]. Nevertheless, FPGA-based development often requires specialized hardware description language expertise, which can increase the initial design effort and verification complexity [9].

Conventional control techniques, such as PI cascade control, have been widely implemented in DC-DC converters due to their simplicity and ease of tuning. Several studies have demonstrated satisfactory performance using PI-based approaches in PV battery systems and DC microgrids [5,7,10,11]. However, these methods may exhibit limited dynamic performance and reduced robustness under sudden load variations and bidirectional transitions typical of EV charging and Vehicle-to-Grid (V2G) scenarios because they rely on fixed gains and lack predictive capabilities to anticipate future disturbances. In contrast, advanced control strategies, including MBPC, sliding mode control (SMC), disturbance estimation techniques, and intelligent control approaches, have been proposed to address these limitations [6,12]. Each of these advanced strategies, however, introduces its own trade-offs. SMC can exhibit chattering phenomena that may excite unmodeled high-frequency dynamics, while intelligent control methods often require extensive training data and lack formal stability guarantees. Among them, MBPC-based techniques offer fast dynamic response, inherent multivariable handling capability, and improved constraint management, making them suitable for high-performance EV power electronic interfaces. On the other hand, MBPC’s main disadvantages include higher computational complexity compared to PI controllers, sensitivity to model parameter accuracy, and increased implementation effort for RT execution on resource-constrained embedded platforms.

In some cases, non-isolated converters were analyzed for SI-MIMO topologies. In [13], some control techniques such as state space modeling, proportional–integral–derivative (PID), MBPC, SMC, and fuzzy logic control were included and used with non-isolated DC-DC converters. In addition, settling problems, response time, and complexity were considered. Power densities and cost parameters were investigated for different bi-directional power converters and their efficiencies, including flyback, forward, and push–pull converters in [14]. Control methods were examined, including the advantages and disadvantages of Pulse Width Modulation (PWM) and hysteresis control, as well as how they influence converter performance. Specifically, PWM offers fixed switching frequency and predictable harmonic content but suffers from slower transient response, whereas hysteresis control provides fast dynamics at the expense of variable switching frequency and increased electromagnetic interference (EMI).

In EV-charging-oriented DC microgrids, ensuring accurate voltage regulation during rapid power transitions between PV generation, battery storage, and EV loads is critical for system reliability and efficiency. However, the implementation of predictive control in BDCs requires careful design to balance computational burden and RT feasibility, especially in FPGA-based platforms.

This paper proposes a cascade control structure combining a digital current controller with an MBPC-based voltage regulator for a BDC integrated into a PV-assisted DC microgrid targeting EV charging applications. The main contributions of this work are:

• Novel cascade PI-MBPC formulation for BDCs: Unlike conventional voltage MBPC approaches and current loops within a single optimization layer, the proposed structure assigns computationally intensive voltage regulation to the MBPC while maintaining a simple, low-latency digital PI controller for the current loop. This reduces prediction horizon requirements and enables real-time feasibility on FPGA targets.
• Experimental validation under realistic bidirectional power flow: The proposed controller is validated under both buck and boost modes with load transitions (essential/non-essential loads) and PV with irradiance profiles to include environmental conditions, demonstrating recovery times and voltage overshoots that confirm robustness through a parameter variation study.
• FPGA-in-the-loop RT validation: Unlike purely offline simulation studies, the control scheme is implemented on an OPAL-RT platform with FPGA-based power electronics emulation, providing realistic switching-frequency timing and enabling validation of computational latency constraints.
• The demonstration of stable operation and high efficiency in both buck and boost modes, confirming the effectiveness of the proposed control approach in practical scenarios.
• A trade-off-oriented control strategy, which achieves improved dynamic performance compared to classical PI-PI based approaches while maintaining significantly lower computational complexity than full-MPC implementations, making it suitable for RT applications.

This paper is structured as follows: Section 2 presents the PV-fed DC microgrid power circuits, while Section 3 provides a detailed design of the current and voltage control strategies implemented in these circuits. Section 4 introduces the concepts of RT simulation, along with the corresponding configurations and designs for the DC microgrid. Section 5 presents the results from both offline and RT simulations. Section 6 is dedicated to the discussion of the findings, and finally, Section 7 presents the conclusions of the study.

2. Description of the Microgrid

The area irradiance data and the DC microgrid nominal electrical parameters needed to be calculated to simulate the PV battery system. Figure 1 shows a simplified topology where power flow is illustrated, and the components are briefly described below.

The DC-DC power converter then needed to be modeled and designed. Lastly, many offline and RT simulations were conducted, and the outcomes were compared for each cascade control scheme applied to the converter. Both essential and non-essential loads were considered to confirm how the microgrid operated to ensure efficiency, reliability, and DC bus stability in critical operations. A load control block and test benches were included for these tasks. This block executes a decision-making algorithm based on the State of Charge (SoC) of energy storage and can communicate with a central microgrid controller to optimize distribution.

2.1. PV Generator

PV modules often comprise several linked, mechanically shielded PV cells whose working principle is the photoelectric effect. A single PV module suffices for certain low-energy-consumption applications, such as shrimp aquaculture; however, PV arrays are necessary when greater PV generation is required. Here, PV modules are linked in series to produce a higher voltage and in parallel to provide a higher current. Therefore, a combined series–parallel topology is needed to generate higher power, although other combined topologies include bridge-linked, honeycomb, and total cross-tied [15].

When DC-DC converters are used with multiple PV strings, energy harvesting can be optimized, and power is subsequently delivered at a DC output [7], as exemplified in Figure 2. Commonly, the PV system’s size is determined by the manufacturer’s data and the maximum operating conditions. The photocurrent generated when sunlight strikes each PV cell or generator can be modeled as a simple current source that feeds the power circuit of this DC microgrid. Additionally, the generated PV power will oscillate due to voltage ripples at the PV terminals, resulting in reduced average power output; therefore, adding a C_PV capacitor to the bus will smooth this ripple [16].

Maximum power point (MPP)-tracking algorithms optimize PV module efficiency by preventing voltage collapse while maximizing power delivery to loads or batteries. MPP varies with PV module characteristics and environmental factors, such as changes in light intensity due to clouds [17]. These algorithms continuously adjust the PV generator’s observed impedance to maintain optimal performance.

A PV module’s current/power characteristic curves as a function of the voltage at its terminals are presented in Figure 3, which shows the MPP. These characteristic curves provide MPP values for PV generator sizing. The I_MPP is the current and P_MPP is the power when a V_MPP voltage is reached or extremely close values are reached [18]. Also, threshold values, such as the open-circuit voltage V_OC and the short-circuit current I_SC, impact the ranges of these curves.

MPP values are commonly indicated in the manufacturer’s datasheet for a single PV panel. This information, along with a defined P_n power, will help determine the PV generator’s size [20], compounded by N_S modules connected in series and N_P modules in parallel, as indicated in (1).

$$P_n=P_{MPP}=\left({N_{S}V}_{MPP}\right)\left({N_{P}I}_{MPP}\right)$$

(1)

2.2. Bidirectional DC-DC Converter

BDCs themselves provide a DC voltage at a desired level. Based on the relationship between the output/input voltage levels, they can be broadly categorized as either buck, boost, or buck–boost. Another way to classify these converters into five classes is based on their ability to allow input/output power flow [21].

Buck and boost converters are classified as Class A since they only allow unidirectional flow with positive output voltage and current. Class B is also unidirectional, with a difference in negative output current. A two-quadrant converter that handles bidirectional flow is produced by combining two one-quadrant converters, such as a buck and a boost converter, or any Class A or B converter. Classes C and D are categorized as two-quadrant converters, with Class C only for positive output voltage and Class D only for positive output current. The most comprehensive is Class E, with four-quadrant bidirectional capability, which provides solutions for constant-power loads [22].

A typical BDC is shown in Figure 4, and as can be seen, it can operate as a buck or boost converter depending on the duty cycle of switches Q1 and Q2 [11]. Since only the current polarity can be changed, not the positive output voltage, this topology operates as a Class C converter, also known as a half-bridge topology. Sometimes, a three-phase rectifier compound of power diodes can provide the battery voltage with a prominent DC link capacitor bank to smooth fluctuations.

Another important detail is that Q1 and Q2 are mutually exclusive, allowing two operating modes. In mode I, Q1 is switched on, and power flows from the DC bus to the battery (charging). In mode II, when Q1 is switched off (or Q2 is switched on), power flows from the battery to the DC bus (discharging). Consistent with bidirectional operation, i_bat > 0 denotes buck mode (charging), while i_bat < 0 denotes boost mode (discharging).

Parametrically, during the boost operation, the inductor L and the DC link capacitor C_dc can be calculated as (2) and (3), respectively [11], where V_bat is the battery bank voltage, D₀ is the duty ratio, f_SW is the switching frequency, and ∆V₀ and ∆I_bat are the voltage/current ripples, which are usually between 1% and 5% [20].

$$L=\left({\displaystyle \frac{V_{dc}-V_{bat}}{f_{SW}{∆I}_{bat}}}\right)\left({\displaystyle \frac{V_{bat}}{V_{dc}}}\right)$$

(2)

$$C_{dc}=\left({\displaystyle \frac{V_{dc}{D}_0}{{R∆V}_{dc}{f}_{SW}}}\right)$$

(3)

Regardless of the type, PWM is a mandatory technique employed in DC-DC converters. It is produced by comparing a modulating signal d(t) with a sawtooth carrier signal v_st(t) that fluctuates at a switching frequency f_SW [20] or a switching period T_SW. The square signals v_Q(t) and their complement are widened or narrowed at a constant frequency f_SW, depending on the nominal duty cycle D₀. This traditional PWM technique is called “Trailing-Edge Modulation” when the sawtooth wave is skewed to the right, “Leading-Edge Modulation” when it is skewed to the left, and “Symmetrical Modulation” when it is an unbiased triangular wave [14].

Before designing controllers, it is customary to obtain a system model, either by parametric methods or by system identification. In this case, Kirchhoff’s laws will be used to analyze modes I and II to obtain an average model and tune a proper controller. Once the parameters of the DC-DC converter have been obtained, the mathematical representation of the system will be through the state space matrices in two complementary intervals: mode I will be during an interval d, and for mode II, this interval will be 1–d.

By applying Kirchhoff’s voltage/current mesh analysis to the input and load loops in mode I, along with the governing equations of each energy storage component, Equations (4) and (5) are obtained:

$$v_L={-V}_{bat}-r_L{i}_{bat}+v_{dc}=L\left({\displaystyle \frac{d{i}_{bat}}{dt}}\right)$$

(4)

$$i_C=C_{dc}\left({\displaystyle \frac{d{v}_{dc}}{dt}}\right)=-i_{bat}-{\displaystyle \frac{v_{dc}}{R_{load}}}+i_{PV}$$

(5)

With these expressions, the system behavior in mode I can be represented as (6):

$$\left(\begin{array}{c}{\displaystyle \frac{d{i}_{bat}}{dt}}\\ {\displaystyle \frac{d{v}_{dc}}{dt}}\end{array}\right)=\left(\begin{array}{cc}-{\displaystyle \frac{r_L}{L}}& {\displaystyle \frac{1}{L}}\\ -{\displaystyle \frac{1}{C_{dc}}}& -{\displaystyle \frac{1}{{R_{load}C}_{dc}}}\end{array}\right)\left(\begin{array}{c}{i}_{bat}\\ v_{dc}\end{array}\right)+\left(\begin{array}{c}-{\displaystyle \frac{1}{L}}\\ {\displaystyle \frac{1}{C_{dc}}}\end{array}\right)\left(\begin{array}{c}{V}_{bat}\\ i_{PV}\end{array}\right)$$

(6)

On the other hand, in mode II, similarly, the results of Kirchhoff’s voltage/current analysis in isolated meshes will be (7) and (8):

$$v_L=-V_{bat}-r_L{i}_{bat}=L\left({\displaystyle \frac{d{i}_{bat}}{dt}}\right)$$

(7)

$$i_C=C_{dc}\left({\displaystyle \frac{d{v}_{dc}}{dt}}\right)=-{\displaystyle \frac{v_{dc}}{R_{load}}}+i_{PV}$$

(8)

With these expressions, the system behavior in mode II will be as follows in (9):

$$\left(\begin{array}{c}{\displaystyle \frac{d{i}_{bat}}{dt}}\\ {\displaystyle \frac{d{v}_{dc}}{dt}}\end{array}\right)=\left(\begin{array}{cc}-{\displaystyle \frac{r_L}{L}}& 0\\ 0& -{\displaystyle \frac{1}{{R_{load}C}_{dc}}}\end{array}\right)\left(\begin{array}{c}{i}_{bat}\\ v_{dc}\end{array}\right)+\left(\begin{array}{c}-{\displaystyle \frac{1}{L}}\\ {\displaystyle \frac{1}{C_{dc}}}\end{array}\right)\left(\begin{array}{c}{V}_{bat}\\ i_{PV}\end{array}\right)$$

(9)

To obtain the average matrices A_p, B_p, C_p, and E_p for steady-state representation, it is necessary to apply the algebraic sum of the matrices in each switching interval, as indicated in (10) and (11). In this case, a summarized expression has been obtained due to the following model assertions:

• Output matrix C_p is an identity matrix since i_bat and v_dc are the main output variables.
• The E_p matrix is null due to the system’s input does not directly influence the outputs.

$$A_p=A_{mode\_I}d+A_{mode\_II}\left(1-d\right)$$

(10)

$$B_p=B_{mode\_I}d+B_{mode\_II}\left(1-d\right)$$

(11)

With these matrices, a system with two inputs u = [V_bat i_PV]^T and two states x = [i_bat v_dc]^T can be performed, whose state matrices are represented by (12) and (13), where the second state corresponds to the desired output. The system dynamics contain slight changes in the duty cycle.

$$A_p=\left(\begin{array}{cc}-{\displaystyle \frac{r_L}{L}}& {\displaystyle \frac{d}{L}}\\ -{\displaystyle \frac{d}{C_{dc}}}& -{\displaystyle \frac{1}{{R_{load}C}_{dc}}}\end{array}\right)$$

(12)

$$B_p={\left(-\begin{array}{cc}{\displaystyle \frac{1}{L}}& {\displaystyle \frac{1}{C_{dc}}}\end{array}\right)}^T$$

(13)

2.3. Efficiency Analysis

The efficiency η is generally defined in terms of the output power P_out and the input power P_in. The input power feeds the circuit, and the BDC elements consume some of it. Therefore, Equation (14) is obtained, where P_Loss is the power consumed due to losses from several factors, including component quality, switching element losses, parasitic elements, internal resistances of converter components, and switching frequency [23].

$$\eta ={\displaystyle \frac{P_{out}}{P_{out}+P_{Loss}}}$$

(14)

According to [21], the efficiency of the proposed BDC was calculated. The BDC was analyzed by operating as a buck converter and later as a boost converter. In the case of buck operation, we have Equation (15), with the parameters A₁ and A₂ defined by (16) and (17).

$${\eta }_1={\displaystyle \frac{P_{out}}{P_{out}+P_{switch}+P_{conduction}}}={\displaystyle \frac{V_{bat}}{A_1{i}_{bat}+A_2}}$$

(15)

$$A_1=D_{01}{R}_{on1}+\left(1-D_{01}\right)R_{D2}+r_L$$

(16)

$$A_2=V_{bat}$$

(17)

Based on the model used, D₀₁ is the duty cycle in buck mode defined by (18); R_on1 is the Q1 resistance when the switch is ON; R_D2 is the Q2 internal diode resistance in conduction; and r_L is the inductor resistance.

$$D_{01}=V_{bat}/V_{dc}$$

(18)

On the other hand, in boost operation, we have Equation (19), whose parameters B₁, B₂, and B₃ are defined by (20)–(22).

$${\eta }_2={\displaystyle \frac{P_{out}}{P_{out}+P_{switch}+P_{conduction}}}={\displaystyle \frac{V_{dc}}{B_1{i}_{bat}+B_2+\frac{B_3}{i_{bat}}}}$$

(19)

$$B_1={(1-D}_{02})R_{on2}+D_{02}{R}_{D1}+r_L$$

(20)

$$B_2=V_{dc}$$

(21)

$$B_3={\displaystyle \frac{R_{C_{dc}}{(V}_{dc}{)}^2{D}_{02}}{12(f_{sw }L{)}^2}}$$

(22)

Identically, D₀₂ is the duty cycle in boost mode defined by (23); R_on2 is the Q2 resistance when the switch is ON; and R_D1 is the Q1 internal diode resistance in conduction.

$$D_{02}={1-V}_{bat}/V_{dc}$$

(23)

The efficiency of these converters is commonly greater than 91% [24]. Converters designed for high-efficiency applications, such as those used in PV energy or energy storage systems, may operate near the upper end of this range, as presented in this paper.

2.4. Battery Bank

In contemporary electric grids, energy storage systems are becoming increasingly important as renewable energy integration is rapidly increasing. These systems offer numerous services, including energy time-shifting, capacity firming, handling of intermittent sources, and power quality enhancements. Among distributed networks, BESSs are the most widely used and fundamental because they are simpler to set up than other storage technologies [25].

Utilizing BDCs can isolate the battery from the DC bus voltage. As a result, the bus voltage will not be impacted if the battery experiences any problems. The BESS absorbs excess power to maintain power balance, i.e., to keep the converter operating in charging mode. However, to maintain power balance, i.e., to keep the converter operating in discharging mode, the BESS provides electricity to the DC microgrid when load demand exceeds total power generation [22]. If not, the BESS is either charged at a set rate or stays floating.

The difference between a fully charged battery and one in use is known as the battery’s SoC. It corresponds to the remaining amount of electricity available in each battery cell. Local factors such as the SoC and load/generation conditions are used to optimize battery management systems. Considering Q as the actual battery charge, the expression governing the SoC will be as follows in (24):

$$SoC=\left(1-{\displaystyle \frac{1}{Q}}\int i_{bat}dt\right)\times 100$$

(24)

3. DC-DC Converter Control Strategy and Design

Nonlinear components can be found in the state matrices related to the system that characterizes the dynamics of the DC-DC converter. To find the parameters of an operational point, these matrices must be linearized around it, considering nominal data V_dc0 and D₀ and solving x₀′ = [i_bat0 V_dc0]^T. Two transfer functions, v_dc(s)/d(s) and v_dc(s)/V_bat(s), can be found with the linearized state matrices A_p0 and B_p0 [26]. This allows for direct voltage control in response to variations in d and V_bat.

Since v_dc(s)/d(s) offers a non-minimum phase response that creates a phase lag in the v_dc voltage, direct voltage control becomes complex and prone to transient instability [27], even when a typical controller with good regulation performance is implemented.

As the i_bat current initially decreases, it generates a right-half-plane (RHP) zero, indicating that a progressive increase in duty cycle results in a temporary voltage decline before an eventual rise, causing v_dc to initially respond inappropriately and further weakening the transient response [28].

A cascade control architecture was implemented to mitigate this phenomenon, comprising an inner current loop and an outer voltage loop. The rapid inner loop stabilizes the inductor current and decouples its dynamics from the slower voltage dynamics, thereby insulating the outer controller from the RHP zero. Consequently, the voltage loop exhibits a modified minimum-phase behavior, enabling the predictive voltage controller to operate with enhanced precision.

3.1. Digital Current Control

Digital signal processors are commonly used in power conversion systems because they enable high-speed transmission of semiconductor gate signals to MOSFETs or IGBTs. As already indicated, DC-DC converters also feature a PWM stage, whose pulse generation can be implemented using digital circuits, including a hardware accumulator, an up/down counter, and a free-running counter [12]. In microprocessor applications, the operating voltage decreases from 5 V to 3.3 V or lower, and the load accelerates the transition from sleep mode to high-speed computing mode.

For these reasons, digital control solutions are suitable for DC-DC converters, utilizing signal converters for control measurements, analog-to-digital, and vice versa. Detectors and conditioning blocks are frequently used for voltage sampling, while Hall-effect-based chips are used to process current signals [29]. Zero-order hold (ZOH) circuits with a sampling period T_S are typically used to convert signals for boost converter current/voltage measurements. In certain situations, digital low-pass filters (DLPFs) are also used to mitigate stochastic noise; however, compared to analog electronics, digital implementation offers far greater flexibility and a stronger tolerance to EMI via an external interface in a network connection [21].

In contrast, three conduction modes of DC/DC converters describe the inductor current’s switching behavior during the converter’s switching stage [11]. The first is the Continuous Conduction Mode, in which some current continuously flows through the regulator’s inductor. When the inductor current falls to zero, it enters the Critical Conduction Mode and turns on. This can only occur when a particular duty cycle is met. In the Discontinuous Conduction Mode, the PWM signal pulses whenever the inductor current reaches zero, which may occur if the load is too light or the duty cycle is too long. This demonstrates that the inductor current is critical to the converter’s operation and control.

A cascade control can be utilized for voltage or power settings, or scaling can be used to control another electrical variable, even if it is not the desired variable to regulate. Figure 5 illustrates the i_bat current digital control scheme applied to a BDC, which helps to visualize all facts and components described in this section. It is essential to note that, in microgrids, the current reference i_bat* is typically provided by another control stage, either for voltage or power regulation.

Considering this assessment, the transfer function i_bat(s)/d(s) must be obtained from the averaged system model, as expressed by (25), and later discretized. The digital control system receives the i_bat continuous-time error signal and converts it to a format that an analog/digital interface can process. Then, this signal is sent to a controller PI(z), whose output is injected into the PWM stage.

$${\displaystyle \frac{i_{bat}\left(s\right)}{d\left(s\right)}}={\displaystyle \frac{V_{dc0}}{Ls+r_L}}$$

(25)

A straightforward way to get PI(z) is to convert the integral term K_I/s of a continuous controller PI(s) to its discrete-time counterpart, given a sampling period of T_S. This paper employs K-factor control (modified PI control) as a frequency-response-based method. This technique involves three types of controllers: type I (integrator), type II (lead-type controller with a pole at the origin), and type III (lead–lead-type controller also with a pole at the origin) [26]. Types II and III ensure zero steady-state errors, with a maximum phase ϕ_boost of 90° and 180°, respectively.

In type II controllers, the pole/zero combinations provide an adjustable ϕ_boost from 0° to 90° at a given crossover frequency ω_c. Therefore, the K-factor, given by (26), will have its pole/zero locations ω_p and ω_z represented by (27):

$$K=\tan \left({\displaystyle \frac{{\varnothing }_{boost}}{2}}+{\displaystyle \frac{\pi }{4}}\right)$$

(26)

$${\omega }_p=K{\omega }_c, {\omega }_z={\displaystyle \frac{{\omega }_c}{K}}$$

(27)

Regardless, in type III controllers, the adjustable ϕ_boost is from 90° to 180°, the K-factor is given by (28), and its pole/zero locations ω_p and ω_z are represented by (29):

$$K={\left(\tan \left({\displaystyle \frac{{\varnothing }_{boost}}{4}}+{\displaystyle \frac{\pi }{4}}\right)\right)}^2$$

(28)

$${\omega }_p=\sqrt{K}{\omega }_c, {\omega }_z={\displaystyle \frac{{\omega }_c}{\sqrt{K}}}$$

(29)

An important fact is that the calculation of ϕ_boost depends on a given phase margin PM and the phase ϕ_sys of the system, or the DC-DC converter, as follows:

$${\varnothing }_{boost}=PM-\left({\varnothing }_{sys}-90°\right)+180°$$

(30)

3.2. Model-Based Predictive Control

Predictive control strategies share standard features, such as using an optimal control action determined by a cost function and calculating future outputs using a system model [30]. These control methods compute a fresh, optimized forecast at each iteration, advancing the horizon with each step. Applying a range of constraints on the relevant process variables is also feasible.

In predictive control, on the other hand, control vectors are optimized first, and the computer or high-speed processors then resolve them. This process has a significant computational load; however, if it is not restricted, it can be reduced. Furthermore, the excellent processing speed of modern multicore microprocessors implies that computations can be completed in reasonable amounts of time [27].

MBPC for power converters is characterized by multivariable, optimal control, with superior performance compared to linear control methods, although model uncertainties and sensor measurement noise limit its performance. Model-free predictive control based on an ultra-local model and a conventional extended state observer can mitigate model uncertainties, although it is limited in noise suppression [31].

The required measurements are entered into the hierarchical predictive structure, then the model results are calculated, and finally, the control algorithm solves a classical optimization or quadratic programming problem [31]. This prediction procedure is presented in Figure 6a, and the control sequence is shown in Figure 6b.

Some variations have been developed within the theory of predictive control, among which are Dynamic Matrix Control (DMC), Generalized Predictive Control (GPC), Nonlinear Model Predictive Control (NMPC), Extended Prediction Self-Adaptive Control (EPSAC), and Model Predictive Control with Autoregressive Disturbance (MPC-AR), among others [32]. There are differences among controller types based on the model’s methodology, the optimization technique used, and whether restrictions are considered during optimization, even when disturbances are included [33].

Considering a step input type, the response of a linear dynamic system can be represented by (31), where v_dc(t) is the plant response, g_i is the coefficient for a step response, ∆p_ref is the control signal increment, and v_dc0 is the initial output.

$$v_{dc}\left(t\right)={v_{dc}}_0+\sum _{i=1}^{\infty }{g}_i∆p_{ref}\left(t-i\right)$$

(31)

Furthermore, this can be represented with a predicted output as follows:

$$\widehat{v_{dc}}\left(t+k/t\right)=\sum _{i=1}^{\infty }{g}_i∆p_{ref}\left(t+k-i\right)$$

(32)

When representing this predictive output in a discrete domain, g_i corresponds to the plant’s response to a pulse input. As for ∆p_ref, the future time iterations will occur when k > i, and past time iterations will occur when k < i. Therefore, separating the sum for future times and past times results in:

$$\widehat{v_{dc}}\left(t+k/t\right)=\sum _{i=1}^k{g}_i∆p_{ref}\left(t+k-i\right)+\sum _{i=k+1}^{\infty }{g}_i∆p_{ref}\left(t+k-i\right)$$

(33)

A disturbance n(t) will be added to the predicted output expression to complete the prediction model, as shown in Figure 7.

$$\widehat{v_{dc}}\left(t+k/t\right)=\sum _{i=1}^k{g}_i∆p_{ref}\left(t+k-i\right)+\sum _{i=k+1}^{\infty }{g}_i∆p_{ref}\left(t+k-i\right)+n\left(t\right)$$

(34)

Considering that v_{dc_m}(t) is the actual plant output:

$$\begin{gathered} \widehat{v_{dc}}\left(t+k/t\right)=\sum _{i=1}^k{g}_i∆p_{ref}\left(t+k-i\right)+\sum _{i=k+1}^{\infty }{g}_i∆p_{ref}\left(t+k-i\right)+v_{dc\_m}\left(t\right) \\ -\widehat{v_{dc}}\left(t/t\right) \end{gathered}$$

(35)

Because there are predicted elements from the past and future in the expected output $\widehat{v_{dc}}$(t/t), it is necessary to separate them. Setting k = 0 in the past component brings it to the current time:

$$\widehat{v_{dc}}\left(t\right)=v_{dc\_m}\left(t\right)+\sum _{i=k+1}^{\infty }{g}_i∆p_{ref}\left(t+k-i\right)-\sum _{i=1}^{\infty }{g}_i∆p_{ref}\left(t-i\right)$$

(36)

A change in variable is done by having various times for the addition in order to leave the expression in the same index, which results in:

$$\widehat{v_{dc}}\left(t\right)=v_{dc\_m}\left(t\right)+\sum _{j=1}^{\infty }\left(g_{j+k}-g_j\right)∆p_{ref}\left(t-j\right)$$

(37)

In addition, the sum that represents the prediction is truncated in a prediction horizon P. By carrying out the entire mathematical procedure, the complete prediction model can be reached, as given by:

$$\widehat{v_{dc}}\left(t+k/t\right)=\sum _{i=1}^k{g}_i∆p_{ref}\left(t+k-i\right)+v_{dc\_m}\left(t\right)+\sum _{j=1}^P\left(g_{j+k}-g_j\right)∆p_{ref}\left(t-j\right)$$

(38)

The first sum is the forced response, and the rest corresponds to the free response. Then, the first prediction when k = 1 is made:

$$\widehat{v_{dc}}\left(t+1/t\right)=g_1∆p_{ref}\left(t\right){+v}_{dc\_m}\left(t\right)+\sum _{j=1}^P\left(g_{j+1}-g_j\right)∆p_{ref}\left(t-j\right)$$

(39)

The subsequent predictions, matrix-represented, are indicated in (40) and can be written as v_dc = Gp_ref + f, where f is the free response, which is formed by the current response of the system v_{dc_m}(t) plus past responses.

$$\left[\begin{array}{c}\widehat{v_{dc}}\left(t+1/t\right)\\ \widehat{v_{dc}}\left(t+2/t\right)\\ ⋮\\ \widehat{v_{dc}}\left(t+P/t\right)\end{array}\right]=\left[\begin{array}{cccc}{g}_1& 0& \dots & 0\\ g_2& g_1& \dots & 0\\ ⋮& ⋮& \ddots & ⋮\\ g_P& g_{P-1}& \dots & g_1\end{array}\right]\left[\begin{array}{c}∆p_{ref}\left(t\right)\\ ∆p_{ref}\left(t+1\right)\\ ⋮\\ ∆p_{ref}\left(t+P-1\right)\end{array}\right]+\left[\begin{array}{c}f\left(t+1\right)\\ f\left(t+2\right)\\ ⋮\\ f\left(t+P\right)\end{array}\right]$$

(40)

The objective function J of MBPC is given by a multi-objective function that seeks, in the first summation, to minimize the squared error caused by the difference between the setpoint and the process output [27], as indicated in (41).

The second summation penalizes the control effort required to reach the desired operating point, thereby reducing the overall energy consumption. The weighting matrices δ and λ define the relative importance of the tracking error and the control effort, respectively, while N denotes the control horizon.

Accordingly, the cost function J is defined in (41). When system delays are present, the cost function can be equivalent to that expressed in (42), where N₁ represents the number of samples corresponding to the delay.

$$J=\sum _{i=1}^P\delta {\left[\widehat{v_{dc}}\left(t+i\right)-V_{dc}^{*}\left(t+i\right)\right]}^2+\sum _{i=1}^N\lambda {\left[∆p_{ref}\left(t+i-1\right)\right]}^2$$

(41)

$$J=\sum _{j=N_1}^P\delta \left(j\right){\left[\widehat{v_{dc}}\left(k+j/k\right)-V_{dc}^{*}\left(k+j\right)\right]}^2+\sum _{j=1}^N\lambda \left(j\right){\left[∆p_{ref}\left(k+j-1\right)\right]}^2$$

(42)

As can be seen, the control action acts at a lower instance and is used to calculate the new output and is represented in matrix format:

$$J={\left(\widehat{v_{dc}}-V_{dc}^{*}\right)}^T\delta \left(\widehat{v_{dc}}-V_{dc}^{*}\right)+\lambda \Delta {P_{ref}}^T\Delta P_{ref}$$

(43)

Finally, the following is ued to find the cost function in vector format considering x(k)= [i_bat(k) v_dc(k)]^T:

$$J={\left(G\Delta P_{ref}+Fx\left(k\right)-V_{dc}^{*}\right)}^T\delta \left(G\Delta P_{ref}+Fx\left(k\right)-V_{dc}^{*}\right)+\lambda \Delta {P_{ref}}^T\Delta P_{ref}$$

(44)

For the case without constraints, optimization becomes minimizing the objective function, which analytically will be:

$${\displaystyle \frac{\partial J}{\partial u}}=2\left(G^T\delta G+\lambda I\right)\Delta P_{ref}+2{\left(Fx\left(k\right)-V_{dc}^{*}\right)}^T\delta G=0$$

(45)

In addition, the minimum of J is analytically expressed in (46), where it can be noted that everything with W − Fx(k) is a matrix, called K for simplicity, whose values are calculated only once and from which the first row is used.

$$∆P_{ref}={\left(G^T\delta G+\lambda I\right)}^{-1}{G}^T{\delta }^T\left(V_{dc}^{*}-Fx\left(k\right)\right)$$

(46)

The law control obtained without restrictions is:

$$\Delta P_{ref}=K\left(V_{dc}^{*}-Fx\left(k\right)\right)$$

(47)

On the other hand, if there are constraints, the exact cost function in (42) is considered to find the minimum; it is necessary to solve a quadratic programming problem according to the following expression:

$${min}_x{\displaystyle \frac{1}{2}}{x}^{T}Hx+f_0^{T}x+l$$

(48)

The expression J is manipulated to express it as a quadratic programming problem; the results are described in (49) with two parts: one section to optimize and another that the optimization does not affect.

$$\begin{gathered} J=\left[\Delta {P_{ref}}^T\left(G^T\Delta {P_{ref}}^{T}G+\lambda I\right)\Delta P_{ref}+2{\left(Fx\left(k\right)-V_{dc}^{*}\right)}^T\delta G∆P_{ref}\right] \\ +\left[{\left(Fx\left(k\right)-V_{dc}^{*}\right)}^T\delta \left(Fx\left(k\right)-V_{dc}^{*}\right)\left(x\right)\right] \end{gathered}$$

(49)

Multiplying by ½ gives the J function in the format that quadratic programming requires, as shown in (50), and the third addend does not affect the optimization result. It is essential to note that obtaining the result requires equipment capable of handling high computational loads.

$$J={\displaystyle \frac{1}{2}}\Delta {P_{ref}}^T\left(G^T\Delta {P_{ref}}^{T}G+\lambda I\right)\Delta P_{ref}+{\left(Fx\left(k\right)-V_{dc}^{*}\right)}^T\delta G∆P_{ref}$$

(50)

This control technique can manage SISO (Single-Input, Single-Output) and MIMO (Multiple-Input, Multiple-Output) systems, making it a suitable control solution. Another advantage is digital implementation, which enables development of digital signal processors. The prediction stage can be summarized as the process of predicting an electrical variable to reduce errors between its setpoint and the measured values in the converter.

3.3. Model Validation

To validate the accuracy of the model used in the MBPC formulation, a comparison between the system response and the model-based predicted response was performed. The prediction model is derived from the step response of the system, which is used to construct the dynamic matrix G.

Figure 8 shows the comparison between the actual DC bus voltage response and the model prediction under a step change condition. It can be observed that the model accurately captures the main dynamics of the system, with minor deviations attributed to higher-order effects and nonlinearities. This validation confirms that the identified model is suitable for predictive control implementation.

3.4. Justification of the PI-MPC Cascade Structure

The selection of a cascade structure with an inner digital PI current loop and an outer MBPC voltage loop is motivated by three considerations:

• Comparison with alternatives: Compared to SMC, which exhibits chattering and requires high switching frequencies, the proposed MBPC operates at a fixed frequency compatible with FPGA implementation. Compared to classical PID, the MBPC voltage loop anticipates disturbances (e.g., load steps, PV variations) using the system model, leading to improved transient response without gain rescheduling.
• Computational efficiency: Implementing full MBPC for both voltage/current loops would require a short sampling period, making RT execution on low-cost FPGAs challenging. By confining MBPC to the slower voltage loop and using a simple digital PI for the faster current loop, the overall computational burden is significantly reduced without compromising dynamic performance.
• Performance trade-offs: Full MBPC would offer marginal improvements in current tracking at the cost of higher resource utilization and latency. Conversely, a pure digital PI cascade would be simpler but would lack predictive capability for the voltage loop, resulting in larger overshoots and slower recovery during load transients. The proposed hybrid approach balances complexity and performance.

3.5. Design Summary with Parameters

Figure 9a shows the power and control stages in the DC microgrid; likewise,

Table 1. DC microgrid parameters.

Symbol	Description	Value
IPV(max)	Maximum PV generator current	30 A
VDC(ref)	Nominal DC voltage	400 V
CPV	PV capacitor	6000 μF
rCpv	PV capacitor resistance	0.01 Ω
Ress	Essential load resistance	16.7 Ω
Rness	Non-essential load resistance	16.7 Ω
rL	Inductor resistance	0.1 Ω
L	Series inductance	4 mH
rON1	Q1 resistance (switch ON)	1 mΩ
rD1	Q1 diode resistance	0.03 Ω
rON2	Q2 resistance (switch ON)	1 mΩ
rD2	Q2 diode resistance	0.03 Ω
Vbat	Battery nominal voltage	192 V
Ibat	Battery nominal current	50 A
Ebat	Battery nominal energy	691,200 J
fSW	Switching frequency	10 kHz
PM	Phase margin for digital PI controller	60°
ωc	Bandwidth for digital PI controller	500 Hz
KP	Digital PI controller proportional gain	0.0301
KI	Digital PI controller integral gain	44.4
TS	Digital PI controller sampling time	50 μs
Tsampl	MBPC clock sampling time	15 ms
P	MBPC prediction horizon	18
N	MBPC control horizon	5
fcih	DLPF cut-off frequency	300 Hz

presents summarized and calculated data for both stages. As a first step, the power circuit is represented, considering that a current i_PV source produced by solar radiation, a diode, a resistor in parallel, and a resistor in series, which represent the material’s internal resistance to current flow, generally make up the equivalent electrical circuit of a PV generator. PV efficiency does not affect both parallel/series resistances; therefore, they can be assumed to be open-circuit and short-circuit, respectively.

The proposed controller approach differs from conventional formulations by employing a simplified prediction model specifically tailored to the BDC voltage dynamics. This avoids the use of constraints, significantly reducing computational complexity and making methods suitable for RT implementation.

The selection of both MBPC horizons follows practical tuning guidelines. In fact, P was chosen to adequately capture the dominant system dynamics, ensuring that P.T_sampl spans the settling time. Furthermore, N was selected as N < P, providing a balance between control performance and computational efficiency. After evaluating different configurations, the values presented in Table 1 were selected, as they provided stable operation, fast dynamic response, and feasible RT implementation.

The power circuit was set up with network elements calculated to operate at nominal values. When the operating point is reached, the experiment starts by applying repeated pulses of identical increments to the reference; therefore, p_ref started from its nominal value and increased to its new reference value. The test began at 0.3 T_sim by activating the p_ref pulse and recording the DC voltage output. Throughout the experiment, changes in the plant’s output on the DC bus were recorded.

To eliminate the offset effect, the input and output signals were expressed incrementally with respect to their initial values. Since the system dynamics remained constant between experiments, the responses obtained were averaged to mitigate the effect of measurement noise. From the average step response, the dynamic coefficients used to construct the G matrix of the predictive controller were calculated, and then the predictive control was activated by adding the G matrix, obtained from the experiment conducted:

$$G=\left[\begin{array}{ccccc}-0.0002& 0& 0& 0& 0\\ -0.0047& -0.0002& 0& 0& 0\\ -0.0085& -0.0047& \ddots & 0& 0\\ -0.0114& -0.0085& \ddots & \ddots & 0\\ -0.0135& -0.0114& \ddots & \ddots & -0.0002\\ -0.0150& -0.0135& \ddots & \ddots & -0.0047\\ -0.0162& -0.0150& \ddots & \ddots & -0.0085\\ -0.0170& -0.0162& \ddots & \ddots & -0.0114\\ -0.0176& -0.0170& \ddots & \ddots & -0.0135\\ -0.0181& -0.0176& \ddots & \ddots & -0.0150\\ -0.0184& -0.0181& \ddots & \ddots & -0.0162\\ -0.0187& -0.0184& \ddots & \ddots & -0.0170\\ -0.0189& -0.0187& \ddots & \ddots & -0.0176\\ -0.0190& -0.0189& \ddots & \ddots & -0.0181\\ -0.0191& -0.0190& \ddots & \ddots & -0.0184\\ -0.0192& -0.0191& \ddots & \ddots & -0.0187\\ -0.0193& -0.0192& \ddots & \ddots & -0.0189\\ -0.0193& -0.0193& \ddots & \ddots & -0.0190\end{array}\right]$$

(51)

After this, the power setpoint p_ref* was determined based on the MBPC stage using the parameters indicated in the tabulated data summary; consequently, the i_bat* reference was obtained, as shown in Figure 9b. In addition, a feedback DLPF implementation for the DC bus voltage was required for MBPC computation. The adopted filter is a first-order low-pass structure in state-space, defined by (52), ensuring unity gain at low frequencies and a smooth attenuation of high-frequency components.

$$A_{ih}=-{2\pi f}_{cih}; B_{ih}=-{2\pi f}_{cih};{ C}_{ih}=1; E_{ih}=0$$

(52)

4. RT Simulation Testing

Classical offline simulations are run to produce valid results at any time, retaining the processes required to accomplish a desired calculation; however, due to the high-cost nature of microgrids, the ideal method for various prototypes is RT equipment. RT simulation is valuable in designing successful applications, enabling rapid, accurate, and reliable investigations. There are a few simulators on the market right now, and OPAL-RT is technically more feasible due to its swift and reliable performance.

Deterministic responses can be obtained with the RT simulator by attaching real hardware or installing a hardware-in-the-loop (HIL) system. It is crucial to note that the RT concept can be applied rigorously while accounting for each system’s limitations. This suggests that sampling for an electrical system might differ from sampling for a mechanical or thermal system. This kind of simulation runs at a sampling time T_{s_CPU}, which is configurable based on the system in use [34].

This work was developed in a research center with the resources needed to conduct projects in the power electronics and power systems sectors, both in academic and industry settings. The OMICRON CMS 356 power amplifier exchanges voltage/current signals with protection relays, a processor based on the Xilinx VC707 Virtex-7 FPGA (San José, CA, USA) architecture capable of exchanging voltage/current I/O’s, and a 32-core OPAL-RT platform (OP5607), which are all part of the RT-LAB development package (v2022.1) fully integrated with MATLAB/Simulink R2021a (Mathworks, Inc., Natick, MA, USA.), among other equipment. The host PC console used for model compilation and execution was equipped with an Intel Core i7-4790 processor and 8192 MB of RAM.

The OPAL-RT eFPGAsim library (v2.12.3.86) guarantees an exceptionally low loop latency in all FPGA-based models [27]. Power electronics stages can be adjusted using an FPGA-based solver called Electric Hardware Solver (eHS). The sample time T_{s_FPGA}, which ranges from ns to ms and is usually significantly smaller than T_{s_CPU}, depends on the complexity of the circuit to be constructed [9]. Some RT simulation lab equipment is shown in Figure 10, along with the simulation stages and hardware features.

Achieving the conduction and cut-out of the switches in RT simulations presents a further challenge. The comparison result is tied to the T_{s_CPU} sampling time when pulse generation is performed using standard Simulink blocks; the switching state may lose states and change only at the rising edge of T_{s_CPU} [34]. Because of this, it is advised that PWM pulses should be generated by setting an FPGA’s digital output, including the duty cycle and switching frequency as parameters. These pulses will then be connected to one digital input (Channel 0). The loopback approach is a method for generating high-frequency triggers between T_{s_CPU} transitions.

RT simulation presents challenges in HIL implementations applied to power-electronics-based systems, such as the ability to capture I/O as PWM gate signals at high frequencies and the mathematical resolution of coupled switches and semiconductors, because conductance matrices are usually used to determine the switches in offline simulations or simulations that have been run purely in software. Since the switches are modeled using the Pejovic method in the FPGA simulation, an ideal value for the switching conductance G_S should be determined [34]. To prevent G_S from changing, this technique replaces the switch in the nodal matrix with an inductor L_S while it conducts and a capacitor C_S when it does not. This parameter is defined by (53). Another peculiarity of HIL simulations is the system to be implemented, which can range from signal-level to hardware-based power equipment. A mechanical-level HIL simulation type is sometimes applied for electric drives.

$$G_S={\displaystyle \frac{T_{S\_FPGA}}{L_S}}={\displaystyle \frac{C_S}{T_{S\_FPGA}}}$$

(53)

At the wiring level, there are two alternatives when configuring the digital outputs: one is by enabling two outputs, one main with its complementary signal, with the respective duty cycle and frequency parameters. The other alternative is that, in the eHS configuration, it is indicated that Q1 has high polarity and Q2 has low polarity, thus optimizing the wiring. This means that Q1 is closed when the digital input voltage is high, and Q2 is closed when it is low.

This RT simulation project consists of two top subsystems. The master subsystem includes an eHS block where the converter power circuit is implemented, a stage in the CPU where the current control, including the MBPC stage for p_ref generation, is implemented, and blocks for triggering PWM pulses. A second subsystem, the console subsystem, monitors electrical measurements in the microgrid, including the battery SoC. All CPU/FPGA boundaries are displayed in Figure 11, which depicts the whole RT simulation design. Additionally, an oscilloscope was installed to monitor scaled electrical signals with greater precision.

5. Results and Analysis

Both offline and RT simulations are performed with the designed BDC, including its passive and switching components, to maintain the desired DC voltage for essential and non-essential loads during PV generator connection and disconnection, ensuring adequate DC bus voltage regulation.

5.1. Offline Simulations

MATLAB/Simulink (Mathworks, Inc.) was used to simulate the DC microgrid offline, considering a variable-step solver (ode23s, step size of 50 μs).

5.1.1. Battery SoC Analysis and Load Management

To evaluate the battery bank behavior under different operating conditions, a 25 s simulation was conducted. During this interval, the system was subjected to (i) variations in the DC bus voltage setpoint (from V_dc* to 90% V_dc* and back), (ii) a step increase in PV current to I_PV(max), and (iii) the connection of the non-essential load.

Figure 12a presents the evolution of the battery bank SoC. The SoC exhibits nearly linear behavior, consistent with constant-power charging and discharging. The rate of change in SoC, shown in Figure 12b, clearly reflects the system operating modes:

• During the initial 10 s, with nominal v_dc and no PV generation, the battery bank discharged at an average rate of −1.41%/s.
• Between 3 s and 5 s, when V_dc* was reduced to 90% of its nominal value, the discharge rate decreased slightly to −1.228%/s due to the reduced load power.
• After the PV current increased to 30 A (at t = 10 s), the battery bank transitioned to charging mode, with a positive SoC rate of +0.3533%/s.
• Finally, when the non-essential load was connected (at t = 16 s), the battery bank resumed discharging at a rate of −1.0415%/s.

This SoC behavior was useful for a subsequent 20 s simulation, where the sequence shown in Figure 13 was obtained. The connection and disconnection of essential and non-essential loads are governed by an external supervisory control layer based on predefined operational rules. A priority-based strategy is adopted, where non-essential loads are only connected when essential loads are already supplied.

In the first half of the simulation, the PV generator was connected or an i_PV current equal to I_PV(max) fed the converter, the setpoint V_dc* was equal to V_DC(ref), and only the essential load was connected. Then, V_dc* dropped to 90% of its previous value at 2 s. Subsequently, the non-essential load was connected at 4 s, and both loads were disconnected from the DC bus at 6 s. Consequently, the essential load was reconnected only at 8 s. This load management sequence was repeated in the other half of the simulation, with the difference that V_dc* reached its nominal value at 12 s and the PV generator was disconnected.

5.1.2. Baseline Operation of the DC Microgrid

Each simulation section evaluates the overshoot peaks (OS) and stabilization times (T_SS). Based on these metrics, the following results were obtained:

• As indicated in Figure 14a, the DC link voltage v_dc initially reached the reference value V_DC(ref), with OS ≈ 6% and T_SS ≈ 75 ms. When V_dc* was reduced to 90% of V_DC(ref), OS ≈ 5.5% and T_SS ≈ 55 ms. In load connection events at t ≈ 6 s and t ≈ 16 s, transient overvoltage peaks of approximately 596.7 V and 622.7 V were observed, respectively. During successive load connection and disconnection events, T_SS was 20 ms, 250 ms, 85 ms, and 110 ms for each load connection in each two-second interval. In the second operating stage, when V_dc* was restored to V_DC(ref), OS ≈ 0.75% and T_SS ≈ 90 ms, followed by T_SS being 130 ms, 320 ms, and 150 ms during subsequent load variations. It can be noticed that when there were no connected loads, v_dc stabilized, although small oscillations were observed.
• In contrast, Figure 14b shows the power reference p_ref applied to the DC-DC converter. The power profile followed a stepped pattern associated with load variations and power flow direction changes, ranging from −20.3 kW to 10.5 kW. Short transient peaks of up to 27.98 kW and 12 kW were observed during abrupt transitions at approximately 6 s and 16 s, respectively. Despite these abrupt transitions, the system reached steady state with T_SS between 88.71 ms and 405 ms and without compromising DC-link voltage regulation.
• Finally, Figure 14c illustrates the battery bank current i_bat, and its reference i_bat(ref). The current closely followed the power reference, confirming accurate tracking of the proposed control strategy. It varied between −105.7 A and 54.67 A in steady state, with transient peaks of approximately 144.8 A during charging and 62.52 A during discharging. Stabilization times were consistent with the power response, indicating coherent dynamics and stable operation in both modes.

5.1.3. Robustness Analysis Under Parameter Uncertainties

A simulated robustness analysis was conducted to assess the endurance of the proposed controller, accounting for parametric uncertainties related to the converter, loads, and PV system. The BDC components L and r_L are among the most sensitive parameters due to their manufacturing tolerances and temperature variations. Therefore, these parameters were varied within ±25% of their nominal values, i.e., L ∈ [3, 5] mH and r_L ∈ [0.075, 0.125] Ω.

The proposed controller was designed using the nominal model, and its performance was evaluated under these parameter variations without re-tuning. To assess robustness, extreme combinations of uncertain parameters were analyzed. In particular, the case L = 5 mH and r_L = 0.075 Ω was identified as the most critical condition, as it resulted in slower dynamics and reduced damping. In Figure 15, simulation results under this worst-case scenario show that the proposed controller maintains closed-loop stability and acceptable dynamic performance, with no evidence of instability or sustained oscillations.

In addition to plant uncertainties, the influence of key tuning parameters of the predictive controller on robustness was also investigated. The weighting factor λ was adjusted to balance control performance and robustness. It was observed that lower values lead to faster responses but increased sensitivity to model uncertainties, whereas higher values improve robustness by reducing control aggressiveness.

5.1.4. Validation Under Variable PV Conditions

In this work, the PV source is initially modeled as a controlled current source to enable a focused evaluation of the BDC and its control strategy. This approach allows for isolating the influence of the power stage from the PV generation variability. However, it is acknowledged that this representation does not capture the proper nonlinear characteristics of PV systems. To provide a more realistic assessment, additional simulations were conducted using PV conditions, as shown in Figure 16, with the following:

• A time-varying irradiance profile including sudden changes to represent cloud transients.
• A mild temperature variation to emulate realistic operating conditions, although irradiance remains the dominant factor affecting PV output.

Additionally, a commercial PV module was considered to provide realistic system parameters, whose manufacturer was Canadian Solar, from Ontario, Canada, with part number CS6K-250P. This equipment has electrical characteristics obtained with tests under standard conditions, with 1 kW/m² at 25 °C, as detailed in

Table 2. PV module and generator standard-conditions specifications.

Symbol	Description	PV Module	PV Generator
PMPP	MPP power	250 W	13 kW
VMPP	MPP voltage	30.1 V	391.3 V
IMPP	MPP current	8.3 A	33.2 A
VOC	Open-voltage voltage	37.2 V	483.6 V
ISC	Short-circuit current	8.87 A	35.48 A

. The PV generator was configured to match the DC bus requirements through an appropriate series–parallel arrangement, with 13 panels connected in series and 4 connected in parallel.

As Figure 16 illustrates, the results demonstrate that the controller maintains stable DC bus regulation and proper power flow management despite rapid variations in the PV generation. It is crucial to mention that the implementation of MPP tracking algorithms is considered beyond the scope of this work and is typically addressed at a higher control level in practical PV systems.

5.2. RT Simulations

This subsection presents the dynamic behavior of the DC microgrid under RT conditions, considering a 20 s simulation and load profiles equivalent to those applied in the offline analysis. Similarly, MATLAB/Simulink (Mathworks, Inc.) was used in the DC microgrid RT tests, considering a fixed-step solver (ode4).

5.2.1. RT Validation of the DC Microgrid

The RT implementation was carried out using sampling times of T_{s_CPU} = 50 μs and T_{s_FPGA} = 210 ns, yielding the following results:

• As shown in Figure 17a, the DC link voltage v_dc initially reached the reference value V_DC(ref), with OS ≈ 0.3% and T_SS ≈ 68.14 ms. Then, when V_dc* changed to 90% of V_DC(ref), OS ≈ 5.37% and T_SS ≈ 82.8 ms. After the load connections and disconnections, T_SS was 109.6 ms, 386.5 ms, 77.8 ms, and 131.7 ms in each two-second step. Consequently, in the second part of the simulation, when V_dc* changed to V_DC(REF), OS ≈ 0.71% and T_SS ≈ 101.8 ms, and after this, T_SS was 141.8 ms, 277.5 ms, and 122.5 ms in each two-second step when v_dc stabilized, although some oscillations were present when there were no connected loads.
• In contrast, as shown in Figure 17b, the p_ref power reached staggered values from −20.72 kW to 10.34 kW. Short transient power peaks of approximately 27.22 kW and 11.98 kW were observed during abrupt operating point changes, while T_SS remained within the range of 87.62 ms to 451.65 ms, demonstrating stable RT operation.
• Lastly, Figure 17c shows the behavior of the p_ref power, where the battery bank currents i_bat and i_bat(ref) are similarly scaled, and the stabilization time ranges are like the values determined in the previous paragraph. The battery current varies between −107.91 A and 53.80 A under steady-state conditions, with transient peaks reaching approximately 141.7 A during charging and 62.39 A during discharging events.

As previously discussed, an oscilloscope is employed to visualize the electrical signals of the DC microgrid during RT operation. The measurements are acquired through the FPGA’s scaled I/O channels, which provide an additional level of protection and allow for flexible signal scaling when the power stage is implemented within the eHS block. Figure 18 illustrates the DC-link voltage v_dc and the battery current i_bat captured, using scaling factors of 0.01 units/V for voltage and 0.1 units/A for current, respectively.

5.2.2. RT Validation Under Variable PV Conditions

To further validate the proposed controller under realistic operating conditions, additional RT simulations were considered with variable PV generation profiles. Due to the limitations of the eFPGAsim library, the PV behavior was represented by a time-varying current source, where the i_PV profile was obtained from offline simulations with the same variable irradiance and temperature conditions. This approach preserves the dynamic characteristics of the PV generation while ensuring compatibility with the RT simulation framework.

Figure 19 shows the DC link voltage v_dc and battery bank current i_bat responses under these conditions. These results demonstrate that the proposed controller maintains stable v_dc regulation despite rapid variations in the input power. The battery current dynamically adjusts to compensate for the fluctuations in PV generation, ensuring proper bidirectional power flow.

6. Discussion

A limitation of the validation approach is that the FPGA-based methodology, while enabling RT control testing with accurate switching timing, relies on idealized component models that do not fully capture hardware-specific phenomena. Switching losses are analytically estimable and indirectly reflected in efficiency calculations. In contrast, parasitic effects (e.g., commutation loop inductance), EMI, and non-ideal component behaviors such as temperature-dependent parameters and nonlinear output capacitances are not included in the present model. These factors may quantitatively affect voltage overshoot magnitudes and overall efficiency but do not compromise the qualitative control performance validated herein.

The transient overvoltage peaks detected in the DC bus resulted from abrupt load switching events, which include rapid dynamic reactions due to the system inductances. These transients were brief and quickly attenuated, as corroborated by both offline and RT simulation data. In practical implementations, power electronic components are chosen with adequate voltage margins to withstand such transient conditions. For instance, devices rated significantly above the nominal DC bus voltage (e.g., 650 V for a 400 V system) are typically employed. Moreover, protection mechanisms such as snubber circuits or voltage clamping devices can be used to further mitigate overvoltage stress.

Table 3. Comparison between the current work and related work.

Ref.	PV Feed	Min. OS (%)	TSS (ms)	Offline Val.	Exp. Val.	Efficiency η (%)	Control Complex.
PI + PI [5]		2.5	150	✓		95.04	low
PI + PI [7]	✓	–	800	✓	✓	N/A *	medium
PI + PI [10]	✓	4.7	25.8	✓	✓	95.5	low
SMC [25]	✓	0.1	10	✓	✓	94.6	high
MBPC [30]		0.8	2	✓		93.94	high
This work	✓	0.3	20	✓	✓	Buck: 97.07 Boost: 98.57	high

* Efficiency values are reported only when available in the related works.

presents a comprehensive comparison between the current work and related studies, including aspects such as control strategy, PV integration, power converter design, validation, and voltage response metrics and efficiency (η), employed for BDCs. According to the gathered data, the current work was developed in an RT simulator platform, whereas some of the referenced works rely solely on offline validation. This highlights the practical relevance and implementation-oriented nature of the present study.

Furthermore,

Table 4. BDC efficiency analysis.

Symbol	Description	Buck Mode	Boost Mode
D0	BDC duty cycle	0.48	0.52
η	Efficiency	97.07%	98.57%

presents a BDC efficiency analysis, showing that the developed circuit has achieved acceptable efficiencies in both boost and buck modes under optimal conditions. These high efficiency values are even higher than those achieved with conventional DC/DC converters, such as boost, quadratic boost, and double-cascade boost converters. In addition, the control algorithm was validated to function within RT constraints on the OPAL-RT platform, thereby confirming the computational efficiency of the proposed predictive approach.

To further validate these analytical results, a simulation-based efficiency estimation was performed by computing the input and output power from the DC bus and battery bank waveforms. BDC efficiency was calculated using average power values under steady-state conditions.

Figure 20 illustrates the resulting efficiency profile, where values remain consistently above 96%, demonstrating good agreement with the analytical estimates and confirming the validity of the proposed approach.

It should be noted that during the interval between 16 s and 18 s, no power is transferred between the DC bus and the battery bank, as the battery current is zero. Under these conditions, efficiency is reported as zero due to the absence of power transfer; therefore, this value does not affect a degradation in performance but rather a no-load operating condition.

7. Conclusions

This work demonstrated that the performance of a BDC used in PV-assisted EV charging systems strongly depends on appropriate component sizing and accurate system modeling, as these factors directly influence the predictive capability of the controller and its ability to satisfy dynamic load demands. The proposed control strategy, combining digital PI-based inner loops with MBPC for DC bus regulation, achieved stable operation under bidirectional power flow conditions.

The results obtained from both offline simulations and OPAL-RT tests showed strong agreement, confirming the effectiveness and practical feasibility of the proposed approach for EV charging applications. Both the DC bus voltage and the battery current accurately reached their reference values despite initial transients and potential disturbances, demonstrating robust performance in PV-integrated DC microgrids.

Furthermore, the controller exhibited strong robustness against PV power fluctuations, which are inherent in renewable-assisted EV charging infrastructures. This highlights its suitability for applications with highly variable generation and load profiles.

However, some limitations should be acknowledged. The proposed MBPC strategy was validated under the considered operating scenarios and parameter variations. However, its implementation in systems with significantly different dynamics (e.g., much higher switching frequencies or different converter topologies) would require re-identification of the prediction model and re-tuning of the horizons. In addition, the selection of prediction horizon and tuning parameters introduces a trade-off between control performance and computational burden, which may limit scalability in more complex or large-scale systems.

Future work will focus on addressing these limitations by incorporating robust predictive control strategies as well as extending the validation to real irradiance profiles and HIL experiments with PV emulators. Furthermore, depending on an urban geographic location, additional studies could be conducted to evaluate the performance of the proposed approach in large-scale EV charging scenarios with more complex DC microgrid configurations.