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Article

Advances in High-Voltage Power Electronics Using Ga2O3-Based HEMT: Modeling

King Abdulaziz City for Science and Technology (KACST), Energy and Industry Sector, Microelectronics and Semiconductors Institute, Riyadh 11442, Saudi Arabia
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Authors to whom correspondence should be addressed.
Materials 2025, 18(20), 4770; https://doi.org/10.3390/ma18204770
Submission received: 5 August 2025 / Revised: 23 September 2025 / Accepted: 9 October 2025 / Published: 17 October 2025
(This article belongs to the Section Materials Simulation and Design)

Abstract

Gallium oxide (Ga2O3) is a promising ultra-wide-bandgap (UWBG) material with exceptional transport properties, including a large breakdown voltage, making it ideal for high-voltage power device applications. Recently, Ga2O3 has gained significant attention as a next-generation material for electronic device fabrication aimed at advancing power electronics. In this paper, we investigate the effect of a Ga2O3 buffer layer on a GaN-based high electron mobility transistor (HEMT), focusing on output I–V characteristics and surface charge effects. Furthermore, we explore an advanced approach to enhance HEMT performance by utilizing polarization-induced two-dimensional electron gas (2DEG), as an alternative to conventional doping methods. A III-N/Ga2O3 heterostructure is proposed as a distinctive electrical property and a cost-effective UWBG solution. To evaluate the associated effects, we simulate a two-dimensional (2D) Ga2O3/GaN HEMT structure incorporating surface charge models. Our results confirm that 2DEG formation near the surface creates a conductive channel due to polarization-induced dipoles at the interface. The simulations also show a negative shift in the threshold voltage, a condition typically unattainable without oxidation layers or doping. Finally, we analyze the potential of AlGaN/Ga2O3-based HEMTs for future power electronic applications.

1. Introduction

Gallium oxide (Ga2O3) has emerged as a highly promising semiconductor material for next-generation power electronic applications, owing to its outstanding intrinsic properties, namely, its ultra-wide bandgap (UWBG) and high breakdown electric field strength [1,2,3]. Early studies of Ga2O3 primarily centered on its luminescent behavior; however, in recent decades, attention has increasingly turned to its potential for enabling advanced electronic and optoelectronic devices [1]. This shift has been driven by global demands for more efficient, compact, and thermally robust power systems, as well as by significant progress in wide-bandgap semiconductor technologies [1].
The bandgap of Ga2O3 is typically characterized as ultra-wide, with the most stable β-phase exhibiting a bandgap in the range of approximately 4.7 to 4.9 eV. Nonetheless, the precise value of the bandgap may exhibit slight variations contingent upon the polymorphic form and the degree of crystalline disorder, with certain studies indicating bandgap values as high as 5.1 eV or potentially lower for specific disordered configurations [4,5,6].
Traditional semiconductors, including silicon (Si) and even wide-bandgap materials like silicon carbide (SiC) and gallium nitride (GaN), face inherent limitations under high-voltage and high-temperature conditions [7,8]. Their relatively narrow bandgaps, limited breakdown fields, and modest thermal conductivities result in reduced efficiency and operational reliability under strenuous electrical or thermal loads [7,8]. In addition, the oxide semiconductor materials, such as SrSnO3 [9] and SnO2 [10], also have limitations, where the latter’s limitations include reduced carrier mobility in thin films, limited dopant solubility, and potential instability [11].
Ga2O3 provides a compelling alternative due to its ultra-wide bandgap of approximately 4.9 eV, a theoretical breakdown field nearing 8 MV/cm, and excellent chemical and thermal stability [12]. Empirical studies and device-level demonstrations have confirmed its ability to achieve significantly higher breakdown voltages, reduced conduction losses, and improved overall energy efficiency compared to conventional materials [1,13]. These attributes position Ga2O3 as a transformative material for high-voltage, high-efficiency power conversion systems.
Nonetheless, several material and device-level challenges must be addressed before Ga2O3 can achieve widespread deployment. One of the most critical limitations is its inherently low thermal conductivity, which hinders effective heat dissipation and imposes reliability concerns during continuous high-power operation [14,15]. To mitigate this issue, recent studies have explored advanced solutions such as thermally conductive composite materials, engineered substrates, and novel doping techniques aimed at enhancing heat transport while maintaining favorable electrical characteristics [14,15].
In parallel, research is advancing fabrication techniques to improve the crystal quality and uniformity of Ga2O3 layers. Key developments include refined epitaxial growth processes, enhanced doping accuracy, and strategies for suppressing material defects [16,17]. These improvements have proven essential for producing devices with consistent and reproducible performance metrics, which are prerequisites for commercial scalability [16,17]. The development of advanced characterization tools has also played a pivotal role in accelerating Ga2O3 research. High-resolution microscopy, electrical probing, and spectroscopic methods have enabled a detailed understanding of the relationship between material properties—such as defect density, crystal orientation, and doping profiles—and device performance [18]. These insights have informed the design of more robust device architectures and have facilitated the optimization of fabrication workflows [18].
To contextualize Ga2O3’s performance, comparative studies with other conventional UWBG materials—namely, GaN, SiC, and diamond [1,19]—have provided important benchmarks [20,21,22]. While Ga2O3 offers distinct advantages such as the availability of native substrates and higher theoretical breakdown strength, it also lags in areas like thermal conductivity and doping capability. These comparative analyses help guide the design of hybrid systems and inform material selection for specific high-voltage applications [20,21]. Figure 1 power versus voltage application space for key semiconductor materials used in power electronics. Ga2O3 occupies a unique position due to its exceptionally large breakdown field, enabling it to handle high voltage, high power levels, and high-efficiency applications [22,23], compared to that of conventional semiconductors such as Si and SiC [13,24,25].
High-power electronics, with their electrical properties, support the development of compact, high-voltage power devices that outperform in many applications. Particularly, Schottky barrier diodes (SBDs) fabricated from β-Ga2O3 provide low forward voltage drop and reverse leakage current, resulting in high efficiency and thermal resilience [26]. Vertical device configurations using bulk β-Ga2O3 enhance heat dissipation and withstand greater electric stress. Current research focuses on advanced surface passivation and optimized metallization to address these limitations and enhance device performance. Photodetectors and optoelectronics β-Ga2O3’s strong absorption in the solar-blind deep ultraviolet (DUV) region (<280 nm), combined with its transparency to visible light, makes it highly effective for UV photodetection. This spectral selectivity is crucial in secure communication, flame detection, and environmental monitoring. Innovations such as heterojunction photodetectors combining β-, α-, and ε-phase Ga2O3 with p-GaN, and in situ GaON interlayers, improve interface quality and charge separation [27].
Ongoing research aims to improve device responsivity, sensitivity, and operational stability in low-power conditions [27,28]. Wafer bonding using in situ silicon thin films offers a viable route for integrating Ga2O3/Si interfaces without high-temperature annealing. This reduces thermal mismatch and maintains the structural integrity of UWBG and silicon materials [29]. High electron mobility transistors (HEMTs) based on AlN/β-Ga2O3 grown on SiC substrates demonstrate significant potential for radio frequency and portable power applications. Their UWBG characteristics and superior electron mobility enable high-frequency operation, reduced power loss, and improved heat dissipation. The use of SiC substrates contributes further to thermal stability and mechanical reliability under harsh operating conditions such as those in aerospace and defense [13].
Plasma-Enhanced Chemical Vapor Deposition (PECVD) enables the deposition of amorphous Ga2O3 thin films at temperatures below 200 °C, allowing integration with flexible polymer substrates. These films exhibit high optical transparency, chemical and thermal stability, and sufficient carrier mobility for use in flexible displays, UV sensors, and wearable electronics [30]. Graphene/β-Ga2O3 heterojunctions are being explored to improve contact properties in Ga2O3-based devices, leveraging graphene’s high conductivity, mechanical flexibility, and chemical robustness [31]. These developments are crucial for producing scalable and reliable transparent or wearable electronic systems. In epitaxial growth and substrate engineering, the choice of substrate—such as sapphire, MgO (110), or epi-GaN—affects lattice match, defect density, and carrier transport. To mitigate lattice mismatch, buffer layers and precise growth condition control are applied. Current efforts focus on enhancing crystal uniformity and expanding integration to cost-effective, thermally matched substrates like SiC, with the aim of achieving scalable, high-performance device fabrication [3,32,33].
Calculations based on ab initio have been performed on the vacancy defect of the β-Ga2O3 crystal [34,35]. Usseinov et al. revealed that in instances where pair vacancies are thermally activated, the transition energy levels are elevated to approximately 2.0 eV above the upper boundary of the valence band. At this energy level, the recombination of electrons and holes becomes feasible, as similarly evidenced in the scenario involving single vacancies [34]. Furthermore, Hao et al. conducted an examination of polarons within β-Ga2O3. Their findings indicate that small hole polarons may arise at various oxygen sites, specifically, OI, OII, and OIII, with the OII site demonstrating the highest stability. Additionally, there is no indication of the existence of polaronic states for electrons, whether large or small, in β-Ga2O3 [35].
In a recent study, Xianxu Li et al. successfully synthesized β-Ga2O3/ε-Ga2O3 phase junctions on sapphire substrates utilizing an atmospheric-pressure chemical vapor deposition process. Consequently, the phase junction demonstrates a type II energy band alignment, with measured valence and conduction band offsets of 0.54 eV and 0.41 eV, respectively [36]. Moreover, the engineering of Ga3O2 substrates encompasses the enhancement of material characteristics and device efficacy through growth on indigenous substrates [24] or the application of a buffer layer on non-native substrates [37,38].
Ga2O3 demonstrates inherently low and anisotropic thermal conductivity, with the beta (β) phase exhibiting values generally varying between 11 and 29.6 W/(m·K), contingent upon the specific crystallographic direction. This characteristic is affected by several determinants, including crystallinity, the quality of interfaces, and the presence of defects, which are crucial for its utilization in power electronics and thermal management applications [37,39,40,41,42].
Furthermore, due to the limited thermal conductivity inherent in β-Ga2O3, it is essential to implement thermal management strategies at the device scale to facilitate high-power performance. Research conducted by Samuel Kim et al. demonstrates that the integration of double-sided cooling alongside a heat spreader can significantly reduce the thermal resistance of the device from 24.5 to 4.86 mm·°C/W, thereby enabling a high power density [43].
A recent investigation by A. Revathy et al. studied a β-Ga2O3 substrate with a 55 nm InAlN/InGaN/GaN/AlGaN HEMT, achieving impressive DC characteristics, including a peak drain current density of 5.5 A/mm and an ON-resistance of 9.23 Ω mm. The device displayed excellent electrostatic control with an ION/IOFF ratio over 1013 and a maximum transconductance of 0.77 S/mm. Reliability was confirmed with a breakdown voltage of up to 55 V [3].
Recent experimental progress has highlighted the remarkable potential of β-Ga2O3 for high-power electronics. For example, Cai et al. (2023) demonstrated normally-off β-Ga2O3 MOSFETs with a threshold voltage of ~9 V and breakdown voltage of 834 V, emphasizing the feasibility of enhancement-mode operation [44]. Similarly, β-Ga2O3 trench Schottky barrier diodes fabricated by novel Ga-flux etching achieved a record breakdown field of >5.10 MV/cm with a breakdown voltage of 1.45 kV [45]. In 2024, vertical enhancement-mode β-Ga2O3 FinFETs reported an average breakdown strength of 2.7 MV/cm with positive threshold voltages [46].
The ongoing advancement of Ga2O3-based power devices is underpinned by multidisciplinary efforts encompassing materials science, device engineering, and system-level integration. The overarching objective remains to realize power electronics that are not only more efficient and compact but also capable of operating under increasingly stringent thermal and electrical conditions. Continued innovation in this field is expected to substantially contribute to the development of more sustainable and high-performance energy technologies [1,12].
In this work, N/Ga2O3 is proposed as a material with distinctive electrical properties and as a cost-effective option among UWBG materials. Thus, we investigate the effect of a Ga2O3 buffer layer-based HEMT, focusing on interface charge effects and output I–V characteristics. Furthermore, we explore an advanced process to enhance HEMT performance by utilizing polarization-induced 2DEG due to polarization-induced dipoles at the interface, via simulating a 2D Ga2O3 HEMT structure incorporating surface charge models using numerical simulation based on a TCAD software [33]. The simulation results suggest high device performance and a shift in the threshold voltage.
Despite these advances, most prior studies rely on experimental demonstrations with specific substrates or device geometries. In contrast, the novelty of this work lies in performing substrate-free TCAD simulations, which provide a direct comparison of Ga2O3 against other wide-bandgap semiconductors. Our results reveal distinct advantages of Ga2O3, including its wider bandgap and higher critical electric field, and benchmark the simulated I-V and threshold voltages against the most relevant experimental reports. This establishes Ga2O3 as a fundamental candidate for future high-power device applications.

2. Methodologies

Modeling and simulation of the HEMT device structure, using Ga2O3 as a buffer layer of device in three cases: without foreign substrate, with GaN substrate, and with SiC substrate.
The high electron mobility transistor (HEMT) device is comprised of a 1200 nm GaN substrate doped with p-type conductivity at a concentration of 1 × 1017 cm−3, succeeded by a 200 nm buffer layer of β-Ga2O3 doped with n-type conductivity at a concentration of 1 × 1018 cm−3. Over the buffer layer, an undoped AlGaN barrier layer measuring 10 nm is placed. The undoped AlGaN (barrier) and doped β-Ga2O3 (buffer) layers constitute two distinct semiconductors that establish a heterojunction. This heterojunction facilitates the spontaneous formation of a two-dimensional electron gas (2DEG) layer as illustrated in Figure 2. This is achieved through the transfer of electrons from the doped layer to the undoped layer, resulting in the accumulation of charge carriers at the interface, which forms the 2DEG. The defined gate length of the device is 2 μm (LG), while the source (LS) and drain (LD) lengths are 0.5 μm, with a total channel length measuring 9 μm. Ohmic contacts for the source and drain were established by setting the work function of the electrode at 3.93 eV, whereas the Schottky gate contact was achieved by defining the electrode work function at 5 eV. The voltage applied to the drain was maintained at a constant value of 50 V, while the voltage on the gate was incrementally adjusted from −16 V to 16 V in steps of 4 V. Detailed structural parameters of the HEMT device are presented in Table 1. Figure 3 illustrates the schematic cross-sectional design of the HEMT utilizing β-Ga2O3 as a buffer layer.
TCAD software 2D device simulation.
The energy band diagram resulting from the TCAD simulation at zero gate bias and drain bias conditions is illustrated in Figure 3. The polarization interface charge in the 2DEG originated from the built-in electric field which generated due to the discontinuity in spontaneous and piezoelectric polarization present between two distinct semiconductor materials (AlGaN/β-Ga2O3). This electric field facilitates the formation of a 2DEG at the interface by confining electrons from the bulk material into a narrow region, thereby delivering the elevated mobility essential for the operation of HEMT [38]. This diagram reveals the conduction band discontinuity present at the interface of AlGaN/β-Ga2O3. The sheet charge density (Qf) of 1.0 × 1010 cm−2 was derived from the device simulation. Complementary details regarding the polarization charge are depicted in Figure 4. The material parameters incorporated into the simulation are summarized in Table 2 [47]. Moreover, the device structural details such as the defects, strain, and so on in the device simulation are illustrated in Table 3.
The fundamental device physics models applicable to all semiconductor devices are grounded in Maxwell’s equations, Schrödinger’s equation, the Shockley–Read–Hall (SRH) recombination framework, Poisson’s equations, continuity equations, and the drift-diffusion transport equations [1]. The quantum electron density is determined by the one-dimensional (1D) Schrödinger’s equation, which links the eigenstate energies E i v (x) and the wave function φ i v (x, y). The subsequent sections provide a comprehensive discussion of these equations.
h 2 2 y 1 m y v x , y φ i v y + E c x , y φ i v = E i v φ i v
In this context, m y v (x, y) represents the spatially dependent effective mass, while E c (x, y) denotes the conduction band edge. Poisson’s equation serves as a significant partial differential equation that is widely applied within the domains of electrostatics and theoretical physics. In semiconductor modeling, it often provides the essential framework for deriving quantitative solutions for electrostatic parameters [1]. The equations formulated by Poisson delineate a relationship among the electric field (E), electrostatic potential (ψ), and spatial charge density (ρ). This relationship can be articulated as follows [1]:
2 Ψ = E = ρ ε
The continuity and transport equations define the temporal changes in electron (n) and hole (p) densities resulting from carrier transport mechanisms, carrier generation processes (designated as Gn and Gp), and carrier recombination phenomena (denoted as Rn and Rp). The continuity equations are expressed through the subsequent mathematical expressions [1]:
n t = 1 q J n + G n R n
p t = 1 q J p + G p R p
The drift-diffusion model pertaining to carrier transport is firmly rooted in Boltzmann transport theory, which delineates a relationship between the current densities (Jn and Jp) and the quasi-Fermi levels (∅n and ∅p). Additionally, these quasi-Fermi levels are connected to carrier concentrations and potentials through the application of Boltzmann approximations [1]:
J n = q μ n n n
J p = q μ p n p
The application of a gate voltage to the device results in a proportional alteration of the sheet charge concentration ns, as articulated in Equation (7). In this equation, ϵ N is the permittivity of the barrier, d = d i + d d is the thickness of the doped-plus-undoped barrier layer, d is a correction factor, q is the elementary charge, V g is the gate voltage, and V o f f is the threshold voltage [48].
n s = ϵ N q d + d V g V o f f
The threshold voltage constitutes a pivotal parameter as it indicates the point at which the HEMT device initiates conduction. V o f f is defined in Equation (8) as:
V o f f = ϕ B Δ E c q q N D 2 ϵ N d 2
where ϕ B represents the Schottky barrier height at the gate, Δ E c denotes the alteration in the conduction band at the heterojunction, and N D refers to the background doping level of the β-Ga2O3 layer [48]. Meanwhile, the saturation current IDSat can be expressed as Equation (9):
I D S a t = ϵ N W d + d V g V o f f V 0 ν s a t
where ν s a t is the carrier saturation velocity and V 0 = E s L , with E s being the electric field in the channel that produces the saturation velocity [48].

3. Results

In this work, the DC operation of an n-type Ga2O3 HEMT device was simulated using Silvaco TCAD 2D device software. A 200 nm Ga2O3 buffer layer was placed from the source to drain beneath the gate to establish a conductive channel and enable normally-on operation ( V t h < 0). Figure 2 shows the device structure, highlighting a high electron concentration at the interface, confirming the presence of a two-dimensional electron gas (2DEG), as shown in Figure 3. In the positive surface charge model (Qf = 1 × 1010 cm−2), the 2DEG is formed near the β-Ga2O3 interface due to dipole bonds induced by surface charge. The peak electron concentration reaches approximately 5 × 1020 cm−3, which corresponds to a sheet carrier density on the order of 1013 cm−2 [1]. The band diagram shows downward bending of the conduction band, with the Fermi level positioned near the conduction band minimum due to n-type doping, as shown in Figure 5.
The I–V output characteristics of the HEMT device demonstrate full channel pinch-off and current saturation ( I D S = 23 A/mm) when a gate bias of +16 V and a drain voltage of 50 V are applied, with a voltage step of 4 V, as shown in Figure 6. The threshold voltage is measured at ( V t h = −7 V), indicating depletion-mode (normally-on) operation (Figure 7).
When using a GaN substrate, the drain current in the saturation region increased to ( I D S = 16 A/mm), as shown in Figure 8a. In addition, Figure 8b shows the threshold voltage in this case ( V t h = −4 V). Using a SiC substrate, the drain current increased further to ( I D S = 28 A/mm) and the threshold voltage was measured at ( V t h = −16 V), as shown in Figure 9a,b. This enhancement may be attributed to the electric field generated at the Ga2O3/SiC interface.

4. Discussion

In electronic devices, interface polarization typically refers to the buildup of electric charge or the alignment of dipole bonds at the interface between two materials. This phenomenon is common in heterojunction devices, such as metal/semiconductor or semiconductor/semiconductor structures. In this work, the Ga2O3 buffer layer was n-type-doped, and the GaN substrate was assumed to be p-type. This heterojunction allows for spontaneous or piezoelectric polarization to occur due to lattice mismatch or crystal structure differences.
Interface dipoles are formed by charge transfer, leading to carrier accumulation—specifically, the formation of a 2DEG in the HEMT structure. Assuming the GaN substrate has a p-type doping concentration of 1 × 1017 cm−3 and the Ga2O3 buffer layer has an n-type doping concentration of 1 × 1018 cm−3, the Fermi level is pinned near 0.2 eV below the conduction band minimum, as shown in Figure 5. When a positive fixed sheet charge is applied at the interface, it creates an electric field that shifts the Fermi level closer to the conduction band. As the barrier width increases, the surface donor level approaches the Fermi level, allowing electrons to transfer from surface donor states into the conduction band. Simultaneously, a conduction band offset (ΔEc = 0.95 eV, Figure 5) at the heterojunction creates an energy step that enables polarization-induced electron accumulation at the interface, leading to 2DEG formation.
On β-Ga2O3, the conduction band intersects downward with the Fermi level and forms a triangular quantum well, capable of holding a significant number of trapped electrons. In contrast, a negative sheet charge at the AlGaN/β-Ga2O3 interface fails to induce 2DEG formation.
Current–voltage characteristics:
The current–voltage (I–V) characteristics of the simulated HEMT were analyzed using the fixed positive interface charge model, as discussed in the Results section. In the baseline structure (without GaN or SiC substrate), the simulation shows high current density when a positive gate voltage is applied to the n-type Ga2O3 channel. As shown in Figure 6, the drain current reaches a maximum of 23 A/mm at a gate bias of +16 V, with a channel length of 9 µm (LGD = 3.5 µm) and a gate length of 2 µm. The threshold voltage ( V t h = −7 V) confirms normally-on operation, as shown in Figure 7. The onset gate voltage (threshold) in a device like an HEMT corresponds to the semiconductor bandgap. The wide-bandgap semiconductors often allow for higher Vth devices due to higher breakdown strength, different charge distributions, and so on. It reflects the condition where enough charge is accumulated at the interface to confirm a conductive layer. The channel starts to conduct when applied gate bias. It depends on many factors such as the work function difference between the gate metal and semiconductor, interface charges (fixed or polarization charges), and the doping concentration.
The enhancement mode behavior is primarily enabled by interface dipole polarization, which establishes the 2DEG and modulates channel conductivity. Deep donor doping in Ga2O3 (1 × 1018 cm−3) was used to fix the Fermi level in a position favorable for channel inversion. This is supported by Figure 5, where the device characteristics confirm enhancement-mode operation. These results align with previous experimental studies, such as those in [7].
In alternate structures with GaN and SiC substrates, similar I–V characteristics were obtained. Figure 8 and Figure 9 show comparative simulation results of the drain current. The maximum drain current value is different between GaN and SiC substrates that applied with a gallium oxide layer, possibly due to lattice mismatch or crystallographic incompatibility. The drain current values obtained were Ga2O3, 23 A/mm; with GaN substrate, 16 A/mm; and with SiC substrate, 28 A/mm, respectively. Ga2O3 is monoclinic, while GaN is hexagonal, making direct epitaxial growth difficult. The literature suggests the use of a transition layer between the buffer and substrate to address this issue [8,12]. Although GaN had minimal effect on performance, SiC substrate significantly improved the HEMT operation.
In summary, as confirmed in the results section, the β-Ga2O3-based HEMT demonstrates stable and high-performance operation in normally-on mode. These findings suggest that Ga2O3 is a strong candidate for next-generation power semiconductor applications due to its favorable electronic properties and cost-effectiveness compared to other UWBG materials. It has low thermal conductivity, which is much worse in SiC and GaN for heat removal. This can lead to hot spots, self-heating, and reliability issues under high current/high power [49]. Moreover, the possibility of growing large, high-quality, native Ga2O3 bulk crystals can reduce costs compared to heteroepitaxially growing GaN or SiC or using foreign substrates [50].

5. Conclusions

A computational study on the effect of a Ga2O3 buffer layer with a positive fixed surface charge model in an HEMT structure was presented in this paper. The device was designed using TCAD simulations, with gallium oxide grown on a gallium nitride (GaN) substrate. The modeling process began by defining the β-Ga2O3 material and device parameters in the simulation environment. The results demonstrate that a high-density two-dimensional electron gas (2DEG) can be formed in the Ga2O3 HEMT structure, which significantly contributes to improved output characteristics, including high drain current. In addition, a relatively high threshold voltage was observed, confirming the device’s normally-on operation and indicating enhanced performance due to strong interface polarization effects. These promising results support the potential of β-Ga2O3 as a next-generation material for power electronic devices. Its advantages in polarization behavior, current handling capability, and compatibility with GaN or SiC-based substrates make it a competitive alternative to other wide-bandgap (WBG) materials.

Author Contributions

Methodology, R.A.; Software, R.A.; Validation, R.A., H.H., M.A.A., A.H. and A.A.; Formal analysis, R.A.; Resources, R.A., H.H., M.A.A. and A.H.; Data curation, R.A.; Writing—original draft, R.A., H.H., M.A.A. and A.H.; Writing—review & editing, R.A.; Supervision, R.A. and A.A.; Project administration, A.A.; Funding acquisition, R.A., H.H., M.A.A., A.H. and A.A. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The original contributions presented in this study are included in the article. Further inquiries can be directed to the corresponding authors.

Acknowledgments

The authors would like to extend our gratitude to King Abdulaziz City for Science and Technology (KACST). This research was supported in part by the Institute of Microelectronics and Semi-conductors from (KACST), Energy and Industry Sector, Riyadh, Saudi Arabia, for the use of their equipment and use to perform the Atlas TCAD simulation.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Key of the power-voltage semiconductor UWBG materials of power electronics application.
Figure 1. Key of the power-voltage semiconductor UWBG materials of power electronics application.
Materials 18 04770 g001
Figure 2. HEMT device structure using β-Ga2O3 as buffer layer. In AlGaN/n-Ga2O3 HEMT, a 2DEG is generated at the interface as a consequence of polarization phenomena and interface charge.
Figure 2. HEMT device structure using β-Ga2O3 as buffer layer. In AlGaN/n-Ga2O3 HEMT, a 2DEG is generated at the interface as a consequence of polarization phenomena and interface charge.
Materials 18 04770 g002
Figure 3. Ga2O3 HEMT diagram of the heterostructure at zero bias conditions (at Vg and Vd = 0 V) without foreign substrate, with Qf = 1 × 1010 cm−2. The 2DEG was confirmed close to surface with high electron concentration.
Figure 3. Ga2O3 HEMT diagram of the heterostructure at zero bias conditions (at Vg and Vd = 0 V) without foreign substrate, with Qf = 1 × 1010 cm−2. The 2DEG was confirmed close to surface with high electron concentration.
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Figure 4. The polarization charges are 55 and its distribution throughout the Ga2O3 HEMT device. (a) Polarization structure and (b) polarization interface without substate, with Qf = 1 × 1010 cm−2, and at Vg and Vd = 0 V.
Figure 4. The polarization charges are 55 and its distribution throughout the Ga2O3 HEMT device. (a) Polarization structure and (b) polarization interface without substate, with Qf = 1 × 1010 cm−2, and at Vg and Vd = 0 V.
Materials 18 04770 g004aMaterials 18 04770 g004b
Figure 5. Ga2O3 HEMT band diagram of the heterostructure at zero bias conditions (at Vg and Vd = 0 V) without foreign substrate, with Qf = 1 × 1010 cm−2. The downward bands indicating to the 2DEG confirmed close to the interface.
Figure 5. Ga2O3 HEMT band diagram of the heterostructure at zero bias conditions (at Vg and Vd = 0 V) without foreign substrate, with Qf = 1 × 1010 cm−2. The downward bands indicating to the 2DEG confirmed close to the interface.
Materials 18 04770 g005
Figure 6. I D S V D s output characteristics of the β-Ga2O3 HEMT device without substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 23 A/mm).
Figure 6. I D S V D s output characteristics of the β-Ga2O3 HEMT device without substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 23 A/mm).
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Figure 7. I D S V G s output characteristics of the β-Ga2O3 HEMT device without substrate; threshold voltage is measured at ( V t h = −7 V).
Figure 7. I D S V G s output characteristics of the β-Ga2O3 HEMT device without substrate; threshold voltage is measured at ( V t h = −7 V).
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Figure 8. (a) I D S V D s output characteristics of the β-Ga2O3 HEMT device with GaN substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 16 A/mm). (b) The threshold voltage is measured at ( V t h = −4 V).
Figure 8. (a) I D S V D s output characteristics of the β-Ga2O3 HEMT device with GaN substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 16 A/mm). (b) The threshold voltage is measured at ( V t h = −4 V).
Materials 18 04770 g008
Figure 9. (a) I D S V D s output characteristics of the β-Ga2O3 HEMT device with SiC substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 28 A/mm). (b) The threshold voltage is measured at ( V t h = −16 V).
Figure 9. (a) I D S V D s output characteristics of the β-Ga2O3 HEMT device with SiC substrate, gate bias of +16 V and a drain voltage of 50 V, ( I D S = 28 A/mm). (b) The threshold voltage is measured at ( V t h = −16 V).
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Table 1. Detailed structural parameters of the HEMT device.
Table 1. Detailed structural parameters of the HEMT device.
LayerMaterialThickness (nm)Doping Concentration (cm−3)
Barrier layerAlGaN10Undoped
Buffer layer β -Ga2O3200n-type 1 × 1018 cm−3
SubstrateGaN1200p-type 1 × 1017 cm−3
SubstrateSiC1200Undoped
Table 2. Material parameters values incorporated into the simulation process [47].
Table 2. Material parameters values incorporated into the simulation process [47].
ParameterSymbolUnitValue
β -Ga2O3 BandgapEgeV4.8
Permittivityɛr-10
Effective conduction band density of statenc300cm−33.72 × 1018
Effective valence band density of statenv300cm−33.72 × 1018
Electron mobility in the surface regionμn cm 2 V · s118 cm−2/Vs
Hole mobility in the surface regionμp cm 2 V · s50 cm−2/Vs
Electron affinityEAeV4.0
Contact gate work functionWFgeV5
Contact drain and sourceWFdeV3.93
Interface sheet charge Qf (positive)Qfcm−21 × 1010
Table 3. Structural details for device simulation.
Table 3. Structural details for device simulation.
Structural AspectIncludedHow It Is Modelled in Silvaco TCAD
Fixed interface chargeYesinterface with qf = 1 × 1010
Polarization and strainYesmodel polarization calc.strain
Basic material structureYescustom material definitions
SRH recombinationYesmodels srh
Carrier mobilityPartialtmun
Traps/defectsYesmaxtrap = 20
Interface trapsYesdefined
Thermal effectsYeslow thermal conductivity input for Ga2O3
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Alhasani, R.; Hussain, H.; Alkhamisah, M.A.; Hiazaa, A.; Alharbi, A. Advances in High-Voltage Power Electronics Using Ga2O3-Based HEMT: Modeling. Materials 2025, 18, 4770. https://doi.org/10.3390/ma18204770

AMA Style

Alhasani R, Hussain H, Alkhamisah MA, Hiazaa A, Alharbi A. Advances in High-Voltage Power Electronics Using Ga2O3-Based HEMT: Modeling. Materials. 2025; 18(20):4770. https://doi.org/10.3390/ma18204770

Chicago/Turabian Style

Alhasani, Reem, Hadba Hussain, Mohammed A. Alkhamisah, Abdulrhman Hiazaa, and Abdullah Alharbi. 2025. "Advances in High-Voltage Power Electronics Using Ga2O3-Based HEMT: Modeling" Materials 18, no. 20: 4770. https://doi.org/10.3390/ma18204770

APA Style

Alhasani, R., Hussain, H., Alkhamisah, M. A., Hiazaa, A., & Alharbi, A. (2025). Advances in High-Voltage Power Electronics Using Ga2O3-Based HEMT: Modeling. Materials, 18(20), 4770. https://doi.org/10.3390/ma18204770

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