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Article

RMS-Based PLL Stability Limit Estimation Using Maximum Phase Error for Power System Planning in Weak Grids

1
School of Electrical and Electronics Engineering, Korea University, Seoul 02841, Republic of Korea
2
Department of Power System Research, Korea Electric Power Research Institute, Daejeon 34056, Republic of Korea
3
Department of Electrification System Research, Korea Railroad Research Institute, Uiwang 16105, Republic of Korea
*
Author to whom correspondence should be addressed.
Energies 2026, 19(1), 281; https://doi.org/10.3390/en19010281
Submission received: 10 November 2025 / Revised: 28 December 2025 / Accepted: 30 December 2025 / Published: 5 January 2026
(This article belongs to the Section F1: Electrical Power System)

Abstract

The increasing interconnection of inverter-based resources (IBRs) with low short-circuit current has weakened grid strength, making phase-locked loops (PLLs) susceptible to instability due to accumulated phase-angle error under current limiting. This study defines such instability as IBR instability induced by reduced grid robustness and proposes a root-mean-square (RMS) model-based screening method. After fault clearance, the residual q-axis voltage observed by the PLL is treated as a disturbance signal and, using the PLL synchronization equations, is analyzed with a standard second-order formulation. The maximum phase angle at which synchronization fails is defined as θ p e a k , and the corresponding q-axis voltage is defined as V q , c r i t . This value is then mapped to a screening metric P p e a k suitable for RMS-domain assessment. The proposed methodology is applied to the IEEE 39-bus test system: the stability boundary and P p e a k are obtained in Power System Simulator for Engineering (PSSE), and the results are validated through electromagnetic transient (EMT) simulations in PSCAD. The findings demonstrate that the RMS-based screening can effectively identify operating conditions that are prone to PLL instability in weak grids, providing a practical tool for planning and operation with high IBR penetration. This screening method supports power system planning for high-penetration inverter-based resources by identifying weak-grid locations that require EMT studies to ensure secure operation after grid faults.

1. Introduction

As the power system paradigm rapidly shifts from conventional synchronous generator-dominated architectures to IBRs, dynamic system behavior is changing markedly. In particular, IBRs typically provide a lower short-circuit current (≈1.1–2.0 p.u.) than synchronous generators (≈10 p.u.), reducing overall short-circuit capacity and thereby weakening grid strength [1,2,3]. Grid strength broadly reflects a power system’s ability to maintain or return to a stable operating point after disturbances; weaker grids exhibit slower post-disturbance recovery and larger voltage excursions [4]. Consequently, in weak grids, PLLs used for grid synchronization of grid-following inverters are prone to synchronization instability [1,2,3,4,5,6,7,8,9,10]. High voltage sensitivity in weak grids amplifies voltage variations caused by inverter output changes or nearby disturbances, which stresses the PLL and increases the likelihood of PLL-induced synchronization instability [8,9,10,11,12,13]. Fundamentally, this arises from adverse interactions between inverter controllers and low grid strength—i.e., high grid impedance—thereby threatening power quality and system stability. Therefore, system strength assessment is essential for secure planning and operation when integrating IBRs [14].

1.1. Motivation: Why RMS Screening Is Needed and Why PLL Instability Is Mechanism-Driven

From an energy-transition perspective, increasing penetration of inverter-based generation changes short-circuit strength and post-fault recovery characteristics, making PLL-driven synchronization stability a practical concern for transmission planning and grid-code compliance. Therefore, a scalable RMS-based screening tool is valuable to prioritize EMT studies and reduce the study burden in large energy systems.
Traditionally, grid strength has been assessed using the short-circuit ratio (SCR) based on RMS-domain models. The SCR is defined as the ratio of the short-circuit capacity (SCC) at the point of common coupling (PCC) to the rated capacity of the interconnected generation resource P r a t e d :
S C R P C C = S C C P C C P r a t e d
Whereas phenomena in synchronous-machine-dominated systems are comparatively tractable in the RMS framework, IBRs feature fast and complex control-loop dynamics, for which EMT modeling and analysis are increasingly emphasized [6,7]. EMT simulations capture detailed inverter control dynamics but are computationally burdensome for large-network studies; RMS simulations are scalable and remain the primary tool for system-wide planning studies [15,16,17].
A key practical challenge is that PLL instability is triggered by a control-driven transient mechanism, particularly under faults in weak grids. When a disturbance occurs, the inverter increases d/q-axis current commands to support voltage recovery, but an internal current limit (typically 1.2 p.u.) is enforced. If voltage recovery remains slow, the PLL continues to observe a nonzero q-axis voltage (phase-error signal), persistently integrating erroneous frequency/phase and potentially losing synchronism. Therefore, planners need a scalable RMS-domain approach that is not only computationally efficient but also explicitly tied to the PLL instability mechanism so that it can reliably flag where EMT studies are necessary [16,17].

1.2. Related Work: PLL Stability Studies and the Limitations of Existing RMS-Based Approaches

As IBRs are increasingly interconnected at weak points of the grid, several studies have investigated the limitations of RMS models in capturing PLL-driven instability. Wang et al. demonstrated that conventional RMS positive-sequence models may fail to identify unstable dynamics that become evident only through three-phase EMT simulations [18]. From a theoretical perspective, Li et al. developed a small-signal model interpreting PLL instability using a torque-like concept and related instability to a critical SCR threshold [12]. Arasteh and Cutululis analyzed loss of synchronization under deep voltage depressions, and they proposed remedies based on adaptive PLL control and impedance estimation, emphasizing PLL-driven instability during severe ride-through conditions [19]. At the system level, other studies have reported that PLL dynamics can interact with network impedance to induce adverse feedback effects, leading to instability in weak grids [8].
Recent studies have further reported that PLL-induced interactions with grid impedance—such as PLL frequency-coupling effects—can significantly reduce the stability margin of grid-connected converters in weak grids [20]. Other recent work has addressed robust PLL-based grid synchronization and practical tuning considerations under highly distorted grid conditions [21]. In addition, a recent review has summarized transient synchronization stability mechanisms of grid-following converters and highlighted the importance of control-loop coupling and grid–converter interactions in post-fault stability assessment [22].
Collectively, the literature converges on two points: (i) PLL stability is fundamentally dynamic and requires EMT-level fidelity to be accurately captured, and (ii) system planners still require fast and scalable tools to identify potential PLL instability without running EMT simulations for every case. Accordingly, there has been active research on screening weak-grid areas using RMS models to identify locations requiring EMT-level strength analysis. However, EMT-based analyses often focus on validating specific phenomena and do not provide a standardized quantitative screening target that can be directly predicted in the RMS environment. As a result, there is no clearly defined target to predict and screen in RMS tools for PLL loss-of-synchronism risk.

1.3. Research Gap and Novelty: Mechanism-Informed RMS Screening Target Based on Maximum PLL Phase Error

To address this gap, this paper defines inverter instability due to reduced grid robustness as PLL instability and proposes a mechanism-informed RMS screening method that bridges controller-level instability physics and system-level planning studies. The central idea is to use an interpretable synchronization margin: the maximum admissible PLL phase excursion θ p e a k after fault clearing. Because the SRF-PLL q-axis voltage reflects the phase error in the dq frame, θ p e a k can be mapped to a critical PLL variable V q , c r i t and then linked to measurable grid and inverter parameters (e.g., Thevenin impedance and current limits) to obtain an analytical stability boundary for active-power transfer.
Importantly, θ p e a k has practical relevance: it represents a post-fault synchronization margin that can be selected to align with the phase-jump ride-through criterion specified by system operators, thus serving as a meaningful engineering benchmark for planning-oriented screening studies. Based on this benchmark, the proposed RMS workflow provides a clear planning action: operating points that violate the computed boundary are flagged for EMT validation, enabling scalable system-wide screening while reserving EMT simulations for the most critical regions.
The main contributions are as follows:
  • Defining inverter instability in weak grids as PLL instability.
  • Proposing a method to compute a predictive stability boundary in RMS models based on the PLL instability mechanism.
  • Validating the approach on the IEEE 39-bus test system with EMT simulations.
In the proposed workflow, the stability boundary is first computed in the RMS tool (PSSE) and then validated via fault scenario simulations in PSCAD. The remainder of this paper is organized as follows: Section 2 analyzes the PLL instability mechanism via the PLL grid-synchronization process. Section 3 identifies key variables that reflect the PLL instability mechanism and uses them to derive a stability boundary within the RMS framework. Section 4 presents the application to the IEEE 39-bus test system and the corresponding simulation results. Section 5 concludes and discusses directions for future work.

2. Mechanism of PLL Instability

This section explains the grid-synchronization mechanism of the synchronous reference frame phase-locked loop (SRF-PLL), which is widely used for IBR synchronization, and analyzes the mechanism by which PLL instability arises to establish a stability boundary. The SRF-PLL structure and key signals considered in this section are summarized in Figure 1.

2.1. Synchronization Mechanism of the PLL System

Most grid-connected inverters operate in a grid-following (GFL) mode and, therefore, employ a PLL for grid synchronization. In three-phase power systems, the PLL typically adopts an SRF-PLL to overcome the accuracy limits of direct phase tracking [23]. The SRF-PLL transforms three-phase quantities into the dq reference frame and tracks the phase in the synchronously rotating coordinates. In this frame, the d-axis voltage represents the grid-voltage magnitude, while the q-axis voltage reflects the phase error with respect to the PLL angle.
The SRF-PLL computes a phase error signal v q * from the measured q-axis voltage (the phase-angle information of the grid) and the PLL’s current output angle, and it regulates its output to drive v q * = 0 for synchronization. A proportional–integral (PI) controller processes v q * to produce a frequency correction, which is combined with a feedforward frequency term ω f f for robust control. Integration of the controlled frequency then yields the PLL output phase angle. In short, the PLL receives the three-phase grid voltage as input and computes an output angle that matches the grid phase.

2.2. Cause of PLL Instability

PLL instability denotes a condition in which the PLL feedback loop fails to maintain stable phase synchronization. It typically occurs when grid strength is markedly low or when inverter control gains and/or bandwidth are inappropriately tuned. Once triggered, PLL instability can manifest as oscillation, divergence, or excessive phase lag in the PLL output, thereby inducing system-wide instability [24].
When a disturbance occurs on the grid, the inverter injects active and reactive currents, which appear as d- and q-axis current components in the controller. The disturbance produces a nonzero v q * in the PLL, which is interpreted as a synchronization error and prompts corrective action at the PLL output. In weak grids, however, the faulted-bus voltage recovers slowly. The inverter attempts to aid voltage recovery by increasing its d/q-axis current outputs, but an internal current limit—typically around ≈1.2 p.u.—is enforced to protect devices under fault conditions and to prevent overheating or damage to switching semiconductors. Consequently, even if the inverter commands higher current for voltage support, the current limiter prevents additional injection.
As a result, the bus voltage fails to recover adequately, the PLL continues to observe a nonzero v q * , and the controller persistently integrates an erroneous frequency and phase. This leads to abnormal increases or decreases in the PLL output frequency, loss of synchronism with the grid, and ultimately, PLL instability.

3. Proposed Screening Method

Building on the PLL and PLL-instability mechanisms analyzed in Section 2, this section derives a PLL stability limit to screen the likelihood of PLL instability when integrating IBRs. The derivation proceeds as follows: (1) the admissible phase-angle error between the grid and the PLL that still preserves post-disturbance synchronization is defined as θ p e a k using a standard second-order model; (2) θ p e a k is mapped to a critical PLL variable V q , c r i t ; and (3) V q , c r i t is linked to measurable grid and inverter parameters to obtain an analytical threshold for active-power transfer P c r i t .

3.1. Critical Phase Error of the PLL for the PLL Stability Limit

From a control-theoretic standpoint, PLL instability can be characterized as a condition in which, after fault clearance, the bus voltage fails to recover to its steady state and a persistent phase-angle discrepancy causes the q-axis voltage in the PLL to remain nonzero, leading to an overshoot in the PLL angle. The proposed method linearizes the relationship between the post-fault maximum overshoot of the PLL’s q-axis voltage and that of the PLL angle, then it computes the maximum phase-angle error beyond which PLL instability is triggered. Using this maximum phase-angle error, a corresponding critical q-axis voltage is derived.
As described in Section 2, the SRF-PLL computes the difference between the grid phase angle and the PLL angle, and it uses a PI controller to drive this difference to zero, thereby achieving phase synchronization. From the PLL’s perspective, the input is the phase-angle difference between the grid and the PLL, and the output is the PLL angle itself. This relationship can be expressed mathematically as follows:
e ( t ) = v q ( t ) + d ( t )
e θ ( t ) = Δ θ ( t ) = θ g ( t ) θ P L L ( t )
u ( t ) = K p e ( t ) + K i 0 t e ( τ ) d τ
where θ g and θ P L L are the grid and PLL phase angles, respectively. The input signal to the PLL e ( t ) is composed of the q-axis voltage v q ( t ) and a disturbance d ( t ) that aggregates measurement noise, harmonic distortion, unmodeled couplings, and feedforward errors.
To regulate the phase error e θ ( t ) to zero, the PLL adjusts its estimated frequency through PI compensation, and the estimated phase θ ^ P L L ( t ) is obtained by integration. The Park transformation is then applied to the three-phase grid voltages to extract the q-axis voltage component, which serves as the error signal driving the PI controller.
Under balanced three-phase operation, linearization around synchronism ( Δ θ 0 ) gives
v d ( t ) V
v q ( t ) V Δ θ ( t )
or, equivalently,
v q ( t ) k θ Δ θ ( t )
k θ = V
In per-unit representation, with V = 1 , it is common to set k θ 1 for screening-level analysis.
To establish a predictive threshold for PLL stability—specifically, a limit beyond which the PLL phase exhibits pre-overshoot instability—we derive the Laplace-domain mapping from input disturbances to the PLL’s estimated angle. A standard SRF-PLL operating under balanced conditions and linearized around synchronism is considered.
The governing time-domain equations are as follows:
e ( t ) = v q ( t ) + d ( t ) = k θ Δ θ ( t ) + d ( t )
u ( t ) = K p e ( t ) + K i 0 t e ( τ ) d τ
Δ θ ( t ) = θ g ( t ) θ P L L ( t )
where d ( t ) represents an external disturbance. Near synchronism, the frequency feedforward effectively cancels the grid frequency, so that the estimated phase deviation satisfies Δ θ ^ ( t ) u ( t ) . Applying Laplace transforms to (9)–(11) yields the closed-loop transfer function:
Δ Θ ( s ) D ( s ) = K p s + K i s 2 + K p k θ s + K i k θ
= K p s + K i s 2 + 2 ζ ω n s + ω n 2
with the natural frequency and damping ratio defined as follows:
ω n = k θ K i
ζ = K p / 2 k θ / K i
This canonical second-order form provides the basis for characterizing the overshoot threshold and determining the critical V q , c r i t .
The maximum overshoot of an underdamped second-order system is expressed as follows:
| Δ θ peak | = ( 1 + M p ) | Δ θ | , M p = exp π ζ 1 ζ 2
where Δ θ is the steady-state phase error. For a step disturbance D ( s ) = V q / s , the final value theorem gives the following:
Δ θ = lim t Δ θ ( t ) = lim s 0 s Δ Θ ( s ) = V q k θ
Substituting (17) into (16) yields the canonical peak bound:
V q , crit = k θ 1 + M p ( ζ ) | Δ θ peak |
In screening applications, a conservative engineering bound is often more practical. Approximating the trajectory prior to the first peak as a triangular ramp, we evaluate (9)–(11) at t = 0 + (post-fault clearing, pre-disturbance synchronism):
e ( 0 + ) = V q
u ( 0 + ) = K p V q
Δ θ ( 0 + ) = 0
Δ θ ^ ( 0 + ) = K p V q
Using the exact first-peak time,
t peak = π ω n 1 ζ 2 = π ω d
the phase excursion is approximated by a triangular area:
θ peak lin 1 2 | Δ θ ^ ( 0 + ) | t peak = 1 2 K p | V q | t peak
A geometric approximation used to estimate the first-peak phase excursion is illustrated in Figure 2.
Enforcing an overshoot allowance θ p e a k gives a conservative linearized threshold:
| V q | V q , crit = 2 θ peak K p t peak
By substituting the rule-of-thumb approximation t p e a k 1 / ( ζ ω n ) and expressing ζ and ω n in terms of ( K p , K i , k θ ), we obtain the commonly used engineering bound:
V q , crit k θ θ peak K p 2 K i ( with k θ 1 p . u . in screening )
Equations (18) and (23) together provide both a canonical form (enforcing a specified damping ratio) and a conservative engineering approximation (gain-based) for estimating the critical q-axis voltage threshold.

3.2. Derivation of the Critical Active Power ( P c r i t )

In the preceding subsection, the critical q-axis voltage threshold associated with PLL instability—manifested as phase overshoot—was derived. For RMS-based screening, this threshold must be translated into measurable grid-level variables. To this end, we derive the corresponding critical active power by relating the network conditions at the point of interconnection to the mapping between the PLL and the inverter’s output.
Consider an IBR connected to an arbitrary bus i. The post-fault network conditions and inverter limits are expressed as follows:
Z t h = R + j X
I = I d + j I q
V q = X I d + R I q
I d 2 + I q 2 I max 2 ( I max 1.2 p . u . )
Equations (36)–(39) summarize the equivalent Thevenin network, the inverter current decomposition in the SRF-PLL, the post-fault q-axis voltage relation, and the hardware current limit, respectively.
From the current-circle constraint, the q-axis current can be expressed as follows:
I q = I max 2 I d 2 with I d 2 + I q 2 I max 2
Substituting (40) into (38) and imposing the stability condition V q = V q , c r i t yields a quadratic equation in I d . The physically meaningful root gives the critical d-axis current:
I d , c r i t = X V q , c r i t + R ( R 2 + X 2 ) I max 2 V q , c r i t 2 R 2 + X 2
Finally, the critical active power follows from the standard d-axis mapping:
P c r i t = I d , c r i t S r a t e d

3.3. RMS-Based Screening Workflow

This subsection presents a practical, system-level workflow for identifying buses and operating points that are vulnerable to PLL instability using RMS (phasor-domain) models. The procedure connects the admissible q-axis voltage, derived at the controller level, to grid-level quantities through the critical active-power threshold.

3.3.1. Inputs and Assumptions

The required inputs for the screening procedure are as follows:
  • The Thevenin impedance at the PCC: Z t h = R + j X .
  • Inverter data: Maximum current I max and S r a t e d .
  • PLL/controller data: SRF–PLL gains ( K p , K i ) and the admissible phase excursion θ peak (rad). We adopt the PSCAD detailed model values K p = 500 and K i = 2000 , and we take k θ = 1 p.u. for screening.
  • Operating point: Active-power setpoint P set for the bus/scenario under study.

3.3.2. Preprocessing

We first define the admissible q-axis bound V q , c r i t from the allowable phase excursion θ p e a k . The choice of θ p e a k should align with the phase-jump ride-through criterion specified by the relevant system operator; therefore, it varies across jurisdictions [25,26]. In this study, we adopt θ p e a k = 10 (≈0.1745 rad). Since V q , c r i t θ p e a k , the resulting values of I d , c r i t and P c r i t (and consequently, the pass/flag outcomes) are sensitive to this benchmark [27].
For fast and conservative screening, the engineering bound is employed.

3.3.3. Critical Current and Power Calculation

The bound V q , c r i t is then translated into a system-level active power threshold:
  • Closed-form binding solution: When binding, solve the quadratic
    ( R 2 + X 2 ) I d 2 2 X V q , c r i t I d R 2 I max 2 V q , c r i t 2 = 0
    and retain the physically admissible root
    I d , c r i t = X V q , c r i t + R ( R 2 + X 2 ) I max 2 V q , c r i t 2 R 2 + X 2
  • Critical active power: P c r i t = I d , c r i t S r a t e d
The overall RMS-based screening workflow is summarized in Figure 3.

3.3.4. Screening Criterion

The proposed RMS-based workflow applies a straightforward screening rule:
P set P crit PASS P set > P crit FLAG for EMT
Operating points flagged by this criterion are subsequently validated through EMT simulation to confirm instability and explore mitigation strategies.
V q , c r i t k θ θ peak K p 2 K i ( k θ = 1 p . u . )

4. Validation and Results

4.1. IEEE 39-Bus Test System

The IEEE 39-bus system was adopted to validate the proposed methodology. This network—comprising ten generators, thirty-nine buses, and multiple loads—captures key transmission-level dynamics and provides a meaningful testbed for assessing PLL instability phenomena under different strength conditions. To ensure comparability between the RMS and EMT domains, identical network topologies and operating points were enforced in both simulations.
The IEEE 39-bus test system used for RMS screening and EMT validation is shown in Figure 4.
Representative RMS screening results are provided in Table 1. As expected, P c r i t increases with SCC and decreases with larger Thevenin impedance. These results confirm that weaker buses are more prone to PLL instability and should be prioritized for EMT-level validation.

4.2. RMS Model (PSSE)

Phasor-domain simulations were performed in PSSE (v35) to compute bus-level screening indices. Using the Automatic Sequence Fault Calculation (ASCC), positive-sequence Thevenin impedances were extracted and combined with fixed controller parameters ( K p = 500 , K i = 2000 , I max = 1.2 p.u.) to calculate V q , c r i t , I d , c r i t , and P c r i t . These screening outcomes identify vulnerable buses for detailed EMT study.

4.3. RMS-Based Screening Results

The P c r i t -based screening was applied to the IEEE 39-bus system to quantitatively identify vulnerable regions. As a first step, the Thevenin equivalent seen from each bus was computed using the ASCC in PSSE, performing three-phase short-circuit studies at the buses of interest and returning ( R , X ) on the converter base.
Using the extracted impedances together with the inverter parameters defined in Section 3 (e.g., controller gains and current limit), the admissible q-axis bound V q , c r i t and the corresponding screening index P c r i t were evaluated for each bus.
Table 1 summarizes representative results. Figure 5 illustrates the relation between the proposed screening index and conventional grid strength measures for the selected buses. As the grid becomes stronger (larger SCC), the required q-axis support at fault clearing is reduced, permitting a higher admissible d-axis current and, hence, a larger P c r i t . Conversely, P c r i t is strongly anti-correlated with the Thevenin impedance Z t h .
These empirical trends—computed on a subset chosen for EMT validation—are consistent with the closed-form screening relations and indicate that low-SCC/high- | Z t h | locations should be prioritized for EMT study.

4.4. EMT Model (PSCAD)

To assess the dynamic behavior at locations flagged by the RMS screening, and to verify the predictive accuracy of the index, EMT studies were carried out in PSCAD using the software’s standard detailed library models.
  • Synchronous generators: Ideal voltage sources used in the RMS model were replaced by standard synchronous-machine models to reproduce electromechanical and electromagnetic dynamics and to capture system-voltage responses in the EMT domain.
  • Inverter-based resource: To directly observe PLL behavior, a GFL inverter model from the PSCAD library was connected at the bus under study. The model included internal control loops (including the SRF–PLL), enabling faithful simulation of PLL instability mechanisms under weak-grid conditions.

4.5. EMT Simulation Validation

This subsection reports time-domain EMT simulations that validate the effectiveness of the RMS-screened critical power P c r i t . Bus 1 is used as a representative case; its analytical value from the RMS screen is P c r i t = 1620 MW. The simulation cases are summarized in Table 2; the results are shown in Figure 6 and Figure 7.

4.5.1. Cases 1–3: Validating P c r i t and Current-Limit Impact

These cases test the predicted stability threshold and isolate the role of the inverter current limit.
Case 1 (Stable baseline): With P s e t = 1600 MW ( < P c r i t ), the post-fault voltage recovers to nominal after clearing at t = 4.1 s. Although the inverter current saturates at 1.2 p.u. during the fault, it quickly returns to a steady state. The PLL error v q * converges to zero, and the PLL frequency settles at 60 Hz (Figure 6).
Case 2 (Unstable, P s e t > P c r i t ): Increasing the power to 1700 MW produces sustained oscillations: the bus voltage fails to recover, the inverter current remains at the 1.2 p.u. limit after clearing, and the PLL error shows a persistent offset, with the PLL frequency oscillating instead of converging. This confirms the predictive accuracy of the analytical P c r i t .
Case 3 (Restored stability by raising the current limit): Keeping P s e t = 1700 MW but increasing the current limit to 1.3 p.u. restores stability; the waveforms recover similarly to Case 1. The current briefly saturates at 1.3 p.u. during the fault and then returns to a steady state. This demonstrates that the observed instability in Case 2 is caused by current-limit saturation, which accumulates PLL phase error and triggers loss of synchronism, in agreement with the proposed mechanism.

4.5.2. Cases 4–6: Effect of Reduced Grid Strength on P c r i t

To assess the effect of reduced grid strength on the screening threshold, one synchronous generator was removed from the Case 1 base system. The resulting increase in the Thevenin equivalent impedance at the PCC reduced the SCC; accordingly, the proposed index predicted a lower critical active power of approximately P c r i t 1500 MW. All other controller parameters and operating conditions were kept unchanged.
Case 4 (Unstable at 1600 MW in a weaker grid): A power level that was stable in Case 1 becomes unstable: the post-fault bus voltage oscillates, the inverter current remains saturated at 1.2 p.u., and neither the PLL error nor the frequency converges.
Case 5 (Near threshold at 1500 MW): At the new analytical boundary, the system exhibits poorly damped post-fault oscillations and intermittent current-limit engagement, eventually leading to PLL loss of synchronism—consistent with operation at the margin.
Case 6 (Stable at 1400 MW): Reducing the setpoint below the new threshold results in successful fault ride-through and smooth convergence of all variables.

4.5.3. Results: Summary and Discussion

Table 3 and Figure 8 summarize the screening outcomes across the seven candidate buses using K p = 500 , K i = 2000 , θ p e a k = 10 , and I max 1.2 p.u. In every case, the analytically computed threshold is conservative, i.e., P c r i t , i P crit , sim , i for all i = 1 , , 7 , where P c r i t , s i m denotes the instability boundary observed in EMT. The ratio P c r i t , s i m / P c r i t ranges from approximately 1.03 to 1.24 (median 1.09 ), indicating a modest, intentional safety margin suitable for system-wide screening.
The largest deviation occurs at Bus 12, where the EMT-observed threshold exceeds the analytical value by a wide margin. This behavior is consistent with the network metrics in Figure 9: Bus 12 exhibits the largest Thevenin impedance magnitude | Z t h | and the lowest SCC among the simulated locations. In the RMS screening, Z t h is treated as a static phasor quantity, and the current limit is enforced as an instantaneous circular bound; consequently, the post-fault q-axis requirement V q = X I d + R I q is maximized, and the admissible I d (hence, P c r i t ) is minimized—by design a conservative “worst-case” estimate for weak buses. In contrast, the EMT model captures frequency-dependent network behavior (e.g., line charging along the long electrical path to synchronous support) and the delayed action of AVR/PSS, both of which reduce the residual v q * seen by the PLL during the early post-fault interval. Moreover, measurement filtering and practical current-limit logic (d/q priority, rate limits, anti-windup) preserve I d for a finite time, further lifting the instability boundary. Taken together, these dynamic effects make the effective impedance during the transient less severe than the static Z t h used in screening so that P c r i t , s i m > P c r i t is most pronounced at Bus 12—precisely where | Z t h | is largest and SCC is smallest.

5. Conclusions

This paper proposes a practical approach to estimate PLL stability limits within an RMS framework by explicitly linking the loss-of-synchronism mechanism to a planning-oriented screening criterion. The key contribution is a mechanism-informed procedure in which an admissible maximum PLL phase excursion θ p e a k is used to determine a critical PLL variable V q , c r i t , and this result is then used to derive a closed-form critical active-power boundary P c r i t from RMS quantities such as the Thevenin equivalent and inverter current limits. This provides an actionable workflow for system studies: operating points that satisfy P s e t P c r i t are screened as feasible, while violations are flagged to prioritize detailed EMT validation. EMT simulations on the IEEE 39-bus system confirmed that the proposed boundary yields a conservative and interpretable screening margin for identifying vulnerable locations.
Overall, the proposed framework provides a practical planning-oriented metric for maintaining secure operation of inverter-dominated energy systems by efficiently flagging buses and operating points that may violate post-fault synchronization limits.
Compared with related works, the proposed framework bridges two common but separate approaches. While EMT-centered studies offer high-fidelity, case-specific observations, and RMS/small-signal criteria often rely mainly on network-strength proxies, this work delivers a controller-mechanism-based RMS screening rule derived from the post-fault PLL dynamics under current limiting. In particular, the proposed mapping from θ p e a k to V q , c r i t , and then to P c r i t , enables bus-wise, scalable prioritization of regions that require EMT assessment without performing EMT simulations for every operating point.
This study is intended for screening and, therefore, has limitations. The derivation relies on linearization around synchronism and simplified RMS representations (e.g., balanced positive-sequence and static Thevenin equivalents), and it assumes specific controller and current-limiting behaviors; thus, it may not capture all implementation-dependent or frequency-dependent effects observed in EMT models. In addition, the screening outcome depends on the selected θ p e a k , which should be chosen to align with applicable grid-code ride-through requirements and may vary across systems. The validation scope is also limited to the considered grid-following inverter configuration and test system.
Future work will extend the framework to broader operating conditions and models—including unbalanced faults, alternative PLL/control structures, and more detailed limiter implementations—and will refine the screening formulation to reduce conservatism while maintaining reliability for system-wide EMT prioritization.

Author Contributions

Conceptualization, B.K. and S.O.; Methodology, B.K., H.C. and B.L.; Validation, B.K.; Writing—original draft, B.K.; Writing—review & editing, B.K.; Visualization, J.P.; Supervision, B.L. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported in part by a grant from the National Research Foundation of Korea (NRF), funded by the Korean Government Ministry of Science and ICT (MSIT) under Grant RS-2024-00355622.

Data Availability Statement

The original contributions presented in the study are included in the article, further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. SRF-PLL block diagram and signal definitions used in the analysis.
Figure 1. SRF-PLL block diagram and signal definitions used in the analysis.
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Figure 2. Geometric approximation of the first-peak phase excursion: triangular area using the initial slope Δ θ ˙ ( 0 + ) and the time-to-peak t p e a k to estimate θ p e a k .
Figure 2. Geometric approximation of the first-peak phase excursion: triangular area using the initial slope Δ θ ˙ ( 0 + ) and the time-to-peak t p e a k to estimate θ p e a k .
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Figure 3. RMS-based workflow for screening PLL stability limit.
Figure 3. RMS-based workflow for screening PLL stability limit.
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Figure 4. IEEE 39-bus test system used for RMS screening and EMT validation.
Figure 4. IEEE 39-bus test system used for RMS screening and EMT validation.
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Figure 5. Bus-wise relationship between the proposed screening index P c r i t and grid strength metrics (SCC and Z t h ); weaker buses (low SCC/high | Z t h | ) yield lower P c r i t values.
Figure 5. Bus-wise relationship between the proposed screening index P c r i t and grid strength metrics (SCC and Z t h ); weaker buses (low SCC/high | Z t h | ) yield lower P c r i t values.
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Figure 6. EMT validation results at Bus 1 (Cases 1–3), showing (a) RMS voltage of Bus 1, (b) inverter current (with saturation), (c) PLL phase-error signal v q * , and (d) PLL frequency, comparing stable operation ( P s e t < P c r i t ), instability when P s e t > P c r i t under the current limit, and stability recovery by increasing the current limit.
Figure 6. EMT validation results at Bus 1 (Cases 1–3), showing (a) RMS voltage of Bus 1, (b) inverter current (with saturation), (c) PLL phase-error signal v q * , and (d) PLL frequency, comparing stable operation ( P s e t < P c r i t ), instability when P s e t > P c r i t under the current limit, and stability recovery by increasing the current limit.
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Figure 7. EMT validation results at Bus 1 under reduced grid strength (Cases 4–6): (a) RMS voltage of Bus 1, (b) inverter current (saturation), (c) PLL phase-error signal v q * , and (d) PLL frequency, showing that weaker grid conditions reduce the stability limit and can trigger PLL instability at lower P s e t .
Figure 7. EMT validation results at Bus 1 under reduced grid strength (Cases 4–6): (a) RMS voltage of Bus 1, (b) inverter current (saturation), (c) PLL phase-error signal v q * , and (d) PLL frequency, showing that weaker grid conditions reduce the stability limit and can trigger PLL instability at lower P s e t .
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Figure 8. Comparison of analytical (RMS) and EMT-observed critical power across screened buses; all points below the y = x line indicate conservative screening ( P c a l c < P s i m ).
Figure 8. Comparison of analytical (RMS) and EMT-observed critical power across screened buses; all points below the y = x line indicate conservative screening ( P c a l c < P s i m ).
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Figure 9. EMT-observed critical power P s i m versus grid strength metrics across buses (e.g., SCC and | Z t h | ), showing lower stability limits at weaker buses.
Figure 9. EMT-observed critical power P s i m versus grid strength metrics across buses (e.g., SCC and | Z t h | ), showing lower stability limits at weaker buses.
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Table 1. RMS-based screening results for selected buses.
Table 1. RMS-based screening results for selected buses.
Bus Z th (p.u.)SCC (MVA) P crit (MW)
10.01686259301620
70.01576563431860
90.01745857281680
120.0324123082964
260.01592262802040
270.01778756221650
280.02167546131420
Table 2. Simulation cases for EMT validation at Bus 1.
Table 2. Simulation cases for EMT validation at Bus 1.
CaseP of IBR (MW)Current Limit (p.u.)SCR Index
Case 116001.23.706
Case 217001.23.488
Case 317001.33.488
Case 416001.23.543
Case 515001.23.779
Case 614001.24.049
Table 3. Summary of EMT results.
Table 3. Summary of EMT results.
BusCalculated P crit [MW]EMT P crit [MW]SCR at P crit , sim
1162017003.49
7186021003.02
9168018003.18
1296412002.57
26204021002.99
27165022002.56
28142015003.08
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Kim, B.; Park, J.; Oh, S.; Cho, H.; Lee, B. RMS-Based PLL Stability Limit Estimation Using Maximum Phase Error for Power System Planning in Weak Grids. Energies 2026, 19, 281. https://doi.org/10.3390/en19010281

AMA Style

Kim B, Park J, Oh S, Cho H, Lee B. RMS-Based PLL Stability Limit Estimation Using Maximum Phase Error for Power System Planning in Weak Grids. Energies. 2026; 19(1):281. https://doi.org/10.3390/en19010281

Chicago/Turabian Style

Kim, Beomju, Jeonghoo Park, Seungchan Oh, Hwanhee Cho, and Byongjun Lee. 2026. "RMS-Based PLL Stability Limit Estimation Using Maximum Phase Error for Power System Planning in Weak Grids" Energies 19, no. 1: 281. https://doi.org/10.3390/en19010281

APA Style

Kim, B., Park, J., Oh, S., Cho, H., & Lee, B. (2026). RMS-Based PLL Stability Limit Estimation Using Maximum Phase Error for Power System Planning in Weak Grids. Energies, 19(1), 281. https://doi.org/10.3390/en19010281

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