A Fifth-Generation-Based Synchronized Measurement Method for Urban Distribution Networks

Abstract

This work proposes a 5G-based synchronized measurement method for urban distribution networks. First, downlink frequency synchronization is achieved by cross-correlating the Primary and Secondary Synchronization Signals (PSSs/SSSs) within gNB-broadcast Synchronization Signal Blocks (SSBs), enabling accurate alignment with the 5G system clock. Then, uplink phase synchronization is refined using Timing Advance (TA) feedback to compensate for propagation delays. Based on the recovered 5G Pulse Per Second (PPS) signal, a dynamic compensation algorithm is applied to discipline the SAR ADC sampling process. This algorithm tracks crystal oscillator drift, accumulates sub-cycle deviations, and corrects integer timer counts only when the error exceeds $\pm 0.5$. Simulations under a 228 MHz oscillator and 1200 samples per cycle demonstrate that the accumulated phase error remains below 0.00008°, satisfying IEEE C37.118 precision requirements. Compared with traditional GPS-based synchronization methods, the proposed solution offers greater deployment flexibility and can operate reliably in GPS-denied environments such as indoors and urban canyons.

1. Introduction

With the large-scale integration of renewable energy and distributed energy resources (DERs), modern power systems are increasingly characterized by bidirectional power fluctuations, rapid variations in power flow, and heightened regional operational uncertainty [1,2,3]. These evolving characteristics significantly increase the structural complexity of the grid, rendering traditional monitoring approaches inadequate for comprehensive state awareness and timely control [4,5]. Under these conditions, wide-area synchronized measurement technology [6], owing to its capability for high-precision temporal alignment, has become a critical enabler for system monitoring [7], state estimation [8], and coordinated control [9], and is playing an increasingly vital role in the evolution of next-generation power systems.

A typical wide-area measurement system (WAMS) comprises three core components: Phasor Measurement Units (PMUs), Phasor Data Concentrators (PDCs), and backend application platforms [10]. PMUs are deployed at strategically selected nodes across the grid to perform time-synchronized sampling of voltage and current waveforms, using high-stability timing sources to generate timestamped synchrophasor data [11]. PDCs are responsible for aggregating, sorting, and time-aligning synchrophasor streams from multiple PMUs to form a structured and coherent spatiotemporal dataset, which serves as the data foundation for a wide range of backend applications, including event detection, system situational awareness, and decision support [12]. Several field-deployed WAMS implementations have demonstrated practical value, including the FNET/GridEye system [13], the Grid Radar system in Europe [14], and the Hydro-Québec WAMS for transmission network monitoring in cold regions [15].

Time synchronization [16] serves as the foundation of wide-area synchronized measurement systems, enabling consistent temporal alignment across spatially distributed observations. Among existing approaches, the most widely adopted method is based on Global Navigation Satellite Systems (GNSSs) which provide absolute time references via satellite signals. In typical Phasor Measurement Unit (PMU) architectures, a Pulse-Per-Second (PPS) signal derived from GNSS is used to anchor the start of each second, while the intra-second sampling timing is governed by a locally disciplined crystal oscillator [17,18].

Despite its widespread use, GNSS-based synchronization suffers from several limitations. In complex urban environments or indoor substations, satellite signals are prone to blockage, multipath interference, or intentional spoofing [19], leading to frequent loss of synchronization lock. Once GNSS lock is lost, the system falls back to free-running mode, and oscillator drift causes rapid degradation in timing accuracy.

To address these issues, alternative and supplementary synchronization methods have been explored. For example, Synchronous Ethernet (SyncE) delivers stable frequency references over dedicated optical links but lacks absolute time alignment. The Precision Time Protocol (PTP, IEEE 1588) supports packet-based timing and can achieve sub-microsecond accuracy under controlled network conditions; however, its performance is highly sensitive to path asymmetry and jitter in general-purpose IP networks. Holdover solutions such as rubidium clocks or chip-scale atomic clocks (CSACs) provide excellent local stability in GNSS-denied environments, yet their cost, power requirements, and integration complexity limit widespread deployment in distribution-level infrastructure [13].

In addition, most practical PMU implementations face a structural timing mismatch between the oscillator frequency and target sampling rate. Since these frequencies are typically not integer-divisible, timer counts must be rounded, introducing subtle but periodic sampling time deviations. Over time, these accumulate as “sawtooth-like” phase misalignments [20], further exacerbated by oscillator drift due to temperature variation, voltage fluctuations, and aging effects. For instance, an oscillator with 50 ppm drift can result in a cumulative time error of up to 56 microseconds within six minutes—equivalent to a phase deviation exceeding 0.02 radians in a 60 Hz system—violating IEEE C37.118 precision requirements [21].

In recent years, with the rapid development of fifth-generation (5G) cellular communication technology, 5G network-based time synchronization methods have attracted increasing attention in the power systems domain [22]. The 5G system provides high-precision and low-latency time synchronization capabilities, offering a viable alternative to satellite-based timing in constrained environments. These capabilities play an essential role in enabling advanced power system applications such as digital twins—where synchronized data streams are critical for accurate real-time modeling—and peer-to-peer (P2P) energy trading and net billing schemes, which require shared temporal references to ensure transaction traceability, coordination, and fairness among distributed energy resources [23,24]. In principle, user equipment (UE) can acquire frequency reference by correlating with the downlink Synchronization Signal Blocks (SSBs) [25], which contain the Primary Synchronization Signal (PSS) and the Secondary Synchronization Signal (SSS) [26]. Meanwhile, the uplink Timing Advance (TA) mechanism can be utilized to estimate round-trip delay and perform compensation for propagation-related phase misalignment. In addition, certain commercial 5G modules support physical timing outputs, such as Pulse Per Second (1PPS) signals or timestamp interfaces, enabling local clock anchoring for measurement devices.

As a synchronization method with wide coverage and high availability, 5G shows promising potential for time delivery in GNSS-denied environments such as indoor spaces and urban canyons. However, the application of 5G-based timing in synchronized phasor measurement systems remains largely unexplored. Relevant engineering implementations and standardization efforts are still in their infancy, and the suitability of 5G synchronization—particularly in terms of phase accuracy and timing stability—has yet to be rigorously validated for high-precision power system measurements. Therefore, investigating key enabling technologies for 5G-based synchronized measurement and establishing a robust multi-source timing architecture capable of operating reliably in GNSS-constrained scenarios is of significant theoretical and practical importance.

The main contributions and innovations of this paper are summarized as follows:

(1)

A novel 5G-based synchronized measurement framework is proposed, in which timing references are passively extracted from Synchronization Signal Blocks (SSBs), allowing the generation of PPS-equivalent signals without relying on dedicated GNSS receivers.

(2)

An adaptive sampling control algorithm is designed to compensate for quantization errors and oscillator drift, enabling sub-microsecond synchronization accuracy in practical power grid environments.

(3)

The proposed method is validated through both simulation and hardware experiments, and its compliance with IEEE C37.118 standards is demonstrated. This work provides a viable solution for synchronized measurements in GNSS-denied scenarios such as indoor substations and urban canyons.

2. Fifth-Generation-Based Synchronized Measurement Method

2.1. Overview of 5G Timing Architecture

Figure 1 presents the wireless time dissemination architecture enabled by cellular networks which comprises three functional layers: the timing source layer, the transport and access layer, and the terminal device layer. This architecture is designed to deliver unified, scalable, and high-precision time synchronization services across distributed systems. Reference time signals, sourced from national UTC timing centers or GNSS common-view techniques, are processed by enhanced time servers to apply delay compensation, signal conditioning, and standardization. These processed timing references are then transmitted via the cellular core network to base stations, where they are mapped onto the physical-layer 5G frame structure and broadcasted wirelessly to end devices through the air interface.

Building upon this infrastructure, we address the challenges faced by urban distribution networks operating in GNSS-denied or signal-obstructed environments—such as pad-mounted transformers, compact substations, and indoor utility facilities—where conventional satellite-based synchronization becomes unreliable or infeasible. To this end, we propose a 5G-assisted terminal-side synchronized measurement framework that enables precise time alignment and synchrophasor estimation under deep-coverage conditions.

The proposed framework operates in three main stages. First, it extracts a Pulse-Per-Second (PPS)-equivalent timing reference by demodulating periodic Synchronization Signal Blocks (SSBs) transmitted by nearby 5G base stations. These SSBs contain structured signals (e.g., PSS/SSS/PBCH) that are inherently aligned with the 5G radio frame, enabling the construction of a local time base consistent with the cellular system time. Second, the extracted timing pulses are used to discipline the internal sampling timer of the measurement device, thereby triggering analog-to-digital conversions (ADCs) precisely at second boundaries. This ensures that voltage and current waveforms are sampled in strict temporal alignment with the network time. Finally, synchrophasor estimation is performed using discrete Fourier transform (DFT) or recursive filtering algorithms, yielding synchronized measurements of magnitude, phase, frequency, and ROCOF. By eliminating the dependency on GNSS, this architecture provides a robust and scalable solution for deploying synchronized measurement units in constrained urban environments.

2.2. Synchronized 1PPS Signal Generation Method Based on 5G Network

The proposed Synchronized 1PPS generation method leverages the periodic transmission of Synchronization Signal Blocks (SSBs) in 5G networks, which serve as over-the-air time references. Wide-area synchronized measurement devices monitor the arrival time of Primary Synchronization Signals (PSSs) within a fixed-length detection window. By recording the phase of the local oscillator at the time of signal arrival, the device estimates the pseudo-phase offset and adjusts the oscillator frequency to maintain synchronization. This procedure is illustrated in Figure 2.

We assume that the radio frame containing the first synchronization signal block begins at $t=0$ and that the transmission time of the block is denoted as ${\Phi }_c$. After a propagation delay of $e_{delay}$, the signal arrives at the detection window of the measurement device at time $t_0$. The phase reading of the local oscillator at time $t_0$ is given by

$${\Phi }_{Lo}\left(t_0\right)=e_{ini}+{\displaystyle \frac{\Delta f+f}{f}}{t}_0$$

(1)

where f is the nominal frequency of the local oscillator, $e_{ini}$ is the initial phase offset relative to the base station clock, and $\Delta f$ represents the frequency deviation.

Rearranging the above expression yields the phase offset between the local and base station clocks at time $t_0$ as

$${\Phi }_{Lo}\left(t_0\right)-t_0=e_{ini}+{\displaystyle \frac{\Delta f}{f}}{t}_0.$$

(2)

However, the actual arrival time $t_0$ of the synchronization signal block is not directly observable. As shown in Figure 2, this arrival time is related to the transmission time and propagation delay by

$$t_0={\Phi }_c+e_{delay}.$$

(3)

Substituting into Equation (2) gives

$${\Phi }_{Lo}\left(t_0\right)-({\Phi }_c+e_{delay})=e_{ini}+{\displaystyle \frac{\Delta f}{f}}{t}_0.,$$

(4)

rewriting the following expression:

$${\Phi }_{Lo}\left(t_0\right)-{\Phi }_c=e_{delay}+e_{ini}+{\displaystyle \frac{\Delta f}{f}}{t}_0$$

(5)

We let $e^{\prime }\left(t_0\right)={\Phi }_{Lo}\left(t_0\right)-{\Phi }_c$ denote the pseudo-phase offset between the local and base station clocks. Since both ${\Phi }_{Lo}\left(t_0\right)$ and ${\Phi }_c$ are observable, $e^{\prime }\left(t_0\right)$ can be estimated locally. If the local oscillator is adjusted such that $e^{\prime }\left(t_0\right)=0$ at all times, then

$$\Delta f=0,e_{ini}=-e_{delay}.$$

(6)

This indicates that when the pseudo-phase offset is kept at zero, the local oscillator becomes frequency-synchronized with the cellular network, and the residual constant phase offset equals the propagation delay. To achieve this, a proportional-integral (PI) controller  is designed to continuously adjust the output frequency of a Numerically Controlled Oscillator (NCO), as described below.

An NCO is a digital signal generator that synthesizes precise output frequencies. It uses a phase accumulator to incrementally add a frequency control word (FCW), generating corresponding phase changes, which are then mapped to waveform amplitudes via a lookup table. The output frequency of the NCO can be modeled as in [20]:

$$f_{\mathrm{out}}={\displaystyle \frac{FCW·f_{\mathrm{clk}}}{2^n}},$$

(7)

where $f_{\mathrm{clk}}$ is the clock frequency of the oscillator and n is the number of bits in the phase accumulator. Equation (7) shows that adjusting the FCW allows near-linear control over the NCO output frequency.

To maintain zero pseudo-phase error, the FCW should be increased when the local clock lags the wireless frame, and decreased when it leads. A PI controller automatically performs this adjustment as [27]

$$FCW\left(t\right)=K_p·\phi \left(t\right)+K_i{\int }_0^t\phi \left(\tau \right)d\tau ,$$

(8)

where $FCW\left(t\right)$ is the control word at time t, $\phi \left(t\right)$ is the instantaneous pseudo-phase error, and $K_p$ and $K_i$ are proportional and integral gains, respectively. The control system is illustrated in Figure 3.

In the figure, $R\left(s\right)$ is the Laplace transform of the reference phase, $Y\left(s\right)$ is the Laplace transform of the observed phase, $E\left(s\right)$ is the pseudo-phase error, and $G\left(s\right)$ is the open-loop transfer function.

Given that $E\left(s\right)=R\left(s\right)-Y\left(s\right)$ and $Y\left(s\right)=G\left(s\right)E\left(s\right)$, the error can be solved as

$$E\left(s\right)={\displaystyle \frac{R\left(s\right)}{1+G\left(s\right)}}.$$

(9)

Following standard PI control design [27], the transfer function is

$$G_c\left(s\right)=K_p+{\displaystyle \frac{K_i}{s}},$$

(10)

and the NCO can be modeled as an integrator with

$$G_p\left(s\right)={\displaystyle \frac{1}{s}}.$$

(11)

Assuming a unit step input $R\left(s\right)=1/s$, the steady-state error can be derived using the final value theorem:

$$\begin{array}{cc}\hfill e_{ss}& =\underset{t\to \infty }{lim}e\left(t\right)=\underset{s\to 0}{lim}sE\left(s\right)\hfill \\ \hfill & =\underset{s\to 0}{lim}s·{\displaystyle \frac{s}{s^2+K_{p}s+K_i}}\hfill \\ \hfill & =\underset{s\to 0}{lim}{\displaystyle \frac{s^2}{s^2+K_{p}s+K_i}}.\hfill \end{array}$$

(12)

Since $K_i\ne 0$, as $s\to 0$, we have

$$e_{ss}=\underset{s\to 0}{lim}{\displaystyle \frac{s^2}{K_i}}=0.$$

(13)

This confirms that the PI controller is capable of eliminating the pseudo-phase error in steady state, thereby achieving precise frequency synchronization between the local NCO and the cellular network, in accordance with Equation (6).

2.3. Performance Evaluation of 5G-Based 1PPS Synchronization via Simulation

This section presents an adaptive synchronous sampling scheme that uses the 5G-derived PPS signal to trigger a SAR ADC. To eliminate residual timing error caused by the non-integer ratio between the local crystal frequency and the ideal sampling frequency, we propose a variable sampling-interval method that dynamically compensates for timer-count quantization error. The crystal frequency is measured in real time via the PPS, and sampling parameters are adjusted on the fly to suppress drift-induced error, thereby improving immunity and stability in synchronous sampling [28]. Figure 4 depicts the relationship between sampling events and the PPS.

In a synchronous phase measurement unit, the first valid ADC sample aligns with the PPS rising edge, ensuring that all grid measurement devices begin sampling simultaneously [29,30]. Between consecutive PPS pulses, the timer in the master chip counts local clock cycles (driven by the crystal oscillator) to schedule ADC conversions [31,32]. However, two main challenges arise:

• Crystal Oscillator Frequency Uncertainty [33]: The oscillator’s frequency can drift due to environmental factors (temperature, humidity, vibration, aging), causing timer counts to deviate.
• Non-Integer Sampling Ratio: The ideal sampling interval $T_s$ and the local clock period $1/f_{\mathrm{osc}}$ often do not form an integer ratio. We let $f_{\mathrm{osc}}$ be the nominal crystal frequency and $\Delta f_{\mathrm{osc}}$ its deviation. The nominal timer count for one sampling interval is

  $$C_s=T_s\left(f_{\mathrm{osc}}+\Delta f_{\mathrm{osc}}\right).$$

  (14)
  Rounding $C_s$ to the nearest integer, $\left[C_s\right]$, introduces a fractional error

  $$\Delta C_s=\left[C_s\right]-C_s,|\Delta C_s|\le 0.5.$$

  (15)
  The impact of timer quantization on phase error is modeled following [20]; the error accumulates across k samples, producing a phase error at the kth sample:

  $$\Delta {\theta }_k=\Delta C_s·k·{360}^{\circ }{\displaystyle \frac{f_0}{f_{\mathrm{osc}}}},$$

  (16)

  where $f_0=50$ Hz is the grid nominal frequency. The corresponding frequency error is

  $$\Delta f_k={\displaystyle \frac{1}{{360}^{\circ }}}{\displaystyle \frac{d(\Delta {\theta }_k)}{dt}}.$$

  (17)
  Under $f_{\mathrm{osc}}=228$ MHz, $f_s=6000$ Hz, and $\Delta C_s=0.5$, the worst-case phase error reaches $0.{24}^{\circ }$, exceeding the IEEE C37.118 limit of $\pm 0.{01}^{\circ }$. Figure 5 illustrates how $\Delta {\theta }_k$ grows with different $\Delta C_s$ values.

To mitigate phase error from timer-count quantization, we propose a dynamic compensation algorithm (Algorithm 1). By estimating the actual number of clock cycles between PPS pulses, we correct the sampling-time deviation in real time. The algorithm infers the true crystal frequency and adjusts future sampling intervals so that each PPS aligns with the start of the second. This “soft” synchronization requires only simple arithmetic operations, reducing computational burden.

Algorithm 1 Soft synchronous sampling correction method based on error compensation

Require:  1: $f_{osc}^{*}$ Actual crystal frequency (Hz)  2: N Sampling points per second  3: $f_0$ Distribution network nominal frequency (50 Hz) Ensure:  4: $C_s\left(k\right)$ Timer count value after calibration  5: Initialisation phase:  6: $C_s={\displaystyle \frac{f_{osc}^{*}}{N\times f_0}}$ Calculate nominal timer count  7: $\Delta C_s=\left|C_s-\mathrm{round}\left(C_s\right)\right|$ Calculate initial count error  8: $flag=\mathrm{sign}\left(C_s-\mathrm{round}\left(C_s\right)\right)$ Determine the direction of error compensation (+1/−1)  9: $Er=0$ Initialize cumulative error register 10: $k=1$ Starting from the first sampling point in one second 11: $C_s=\left[C_s\right]$ 12: $C_s\left(k\right)=C_s$ 13: $f_0\left(0\right)=f_0$ 14: Dynamic adjustment phase: 15: repeat 16:    if $f_0\left(k\right)\ne f_0(k-1)$ then 17:       $C_s^{\mathrm{new}}={\displaystyle \frac{f_{osc}^{*}}{N\times f_0\left(k\right)}}$ 18:       $\Delta C_s=\left|\left[C_s^{\mathrm{new}}\right]-\mathrm{round}\left(C_s^{\mathrm{new}}\right)\right|$ 19:       $flag=\mathrm{sign}\left(C_s^{\mathrm{new}}-\mathrm{round}\left(C_s^{\mathrm{new}}\right)\right)$ 20:       $\Delta C_s^{int}=[\Delta C_s\times 10000]$ 21:    end if 22:    $Er=Er+\Delta C_s^{int}$ 23:    if $Er\ge 5000$ then 24:       $Er=Er-10000$ 25:       $C_s\left(k\right)=C_s+flag$ 26:    else 27:      $C_s\left(k\right)=C_s$ 28:    end if 29:    $k=k+1$ 30: until Next synchronisation clock PPS signal arrives return$C_s\left(k\right)$

After computing $\Delta C_s$ from (15), any detected deviation is accumulated in $Er$. When $Er\ge 5000$ (i.e., $0.5\times 10,000$), we increment or decrement $C_s$ by one for the next sample, then subtract $10,000$ from $Er$, ensuring no single compensation exceeds $\pm 0.5$ cycles. This dynamic adjustment aligns each PPS with the actual start of the second, minimizing accumulated phase error.

The two main advantages of this algorithm are the following:

• It minimizes error by adjusting the integer timer count only when the accumulated fractional error exceeds $\pm 0.5$;
• It performs real-time adaptive sampling control with lightweight arithmetic, reducing computation compared to conventional weighted-switch methods.

2.4. Phasor Estimation Based on DFT

Currently, commonly used synchrophasor estimation methods include zero-crossing detection, parametric estimation, Kalman filtering, and Fourier transform-based techniques. Among these, zero-crossing and discrete Fourier transform (DFT) methods are more suitable for embedded platforms. However, the accuracy of zero-crossing methods is often limited when facing dynamic frequency variations, harmonic distortion, and hardware inconsistencies. Therefore, this work adopts the DFT-based approach for synchrophasor computation, and the following presents the detailed computational procedure.

We assume that the input signal is a steady-state power-frequency waveform, described by

$$x\left(t\right)=X_{m}cos(2\pi f_{0}n\Delta t+\varphi ),$$

(18)

where $\Delta t=1/\left(N{f}_0\right)$ is the sampling interval and N is the number of samples per cycle. Based on the standard DFT phasor estimation method [34], the synchrophasor is computed as

$$\mathbf{X}\left(m\right)={\displaystyle \frac{2}{N}}\sum _{k=0}^{N-1}x\left(k\right)e^{-j{\displaystyle \frac{2\pi mk}{N}}}$$

(19)

where $\mathbf{X}\left(0\right),\mathbf{X}\left(1\right),\dots ,\mathbf{X}(N/2)$ correspond to the DC component, fundamental, and higher-order harmonics. For power system applications, the fundamental component is of primary interest, obtained by setting $m=1$:

$$\mathbf{X}={\displaystyle \frac{2}{N}}\sum _{k=0}^{N-1}x\left(k\right)e^{-j{\displaystyle \frac{2\pi k}{N}}}$$

(20)

The synchrophasors for two consecutive windows can be expressed as

$$\begin{array}{cc}\hfill {\mathbf{X}}^{N-1}& ={\displaystyle \frac{\sqrt{2}}{N}}\sum _{k=0}^{N-1}x\left(k\right)e^{-j{\displaystyle \frac{2\pi k(N-1)}{N}}}\hfill \\ \hfill {\mathbf{X}}^N& ={\displaystyle \frac{\sqrt{2}}{N}}\sum _{k=0}^{N-1}x(k+1)e^{-j{\displaystyle \frac{2\pi k(N-1)}{N}}}\hfill \end{array}$$

(21)

Multiplying both sides of the expression for ${\mathbf{X}}^N$ by $e^{-j{\displaystyle \frac{2\pi }{N}}}$, we obtain

$${\mathbf{X}}^N={\mathbf{X}}^{N-1}+{\displaystyle \frac{\sqrt{2}}{N}}[x\left(N\right)-x\left(0\right)]e^{-j{\displaystyle \frac{2\pi }{N}}}$$

(22)

The initial phasor can be decomposed into its real and imaginary components as:

$$\begin{array}{cc}\hfill {\mathbf{X}}^0& =X_c^{\left(0\right)}+j{X}_s^{\left(0\right)}\hfill \\ \hfill & ={\displaystyle \frac{1}{\sqrt{2}}}\left({\displaystyle \frac{2}{N}}\sum _{k=1}^N{x}_{k}cos\left({\displaystyle \frac{2\pi }{N}}k\right)-j{\displaystyle \frac{2}{N}}\sum _{k=1}^N{x}_{k}sin\left({\displaystyle \frac{2\pi }{N}}k\right)\right)\hfill \end{array}$$

(23)

The recursive expressions for subsequent phasors are

$$\begin{array}{cc}\hfill X_c^{(k+1)}& =X_c^{\left(k\right)}+{\displaystyle \frac{2}{N}}(x_{k+1}-x_{k+1-N})cos\left({\displaystyle \frac{2\pi }{N}}k\right)\hfill \\ \hfill X_s^{(k+1)}& =X_s^{\left(k\right)}-{\displaystyle \frac{2}{N}}(x_{k+1}-x_{k+1-N})sin\left({\displaystyle \frac{2\pi }{N}}k\right)\hfill \end{array}$$

(24)

Phasor magnitude and angle are

$$X\left(k\right)=\sqrt{{\left(X_s^{\left(k\right)}\right)}^2+{\left(X_c^{\left(k\right)}\right)}^2}$$

(25)

$$\psi \left(k\right)={tan}^{-1}\left(-{\displaystyle \frac{X_s^{\left(k\right)}}{X_c^{\left(k\right)}}}\right)$$

(26)

Assuming the phasor angle evolves quadratically,

$$\psi \left(k\right)=a_0+a_{1}k+a_2{k}^2.$$

(27)

Then,

$$\left[\begin{array}{c}{\psi }_1\\ {\psi }_2\\ ⋮\\ {\psi }_M\end{array}\right]=\left[\begin{array}{ccc}1& 1& 1\\ 1& 2& 4\\ ⋮& ⋮& ⋮\\ 1& M& M^2\end{array}\right]\left[\begin{array}{c}{a}_0\\ a_1\\ a_2\end{array}\right]$$

(28)

$$\mathit{\psi }=\mathbf{X}\mathbf{a}$$

(29)

$$\mathbf{a}={\left({\mathbf{X}}^{\mathrm{T}}\mathbf{X}\right)}^{-1}{\mathbf{X}}^{\mathrm{T}}\mathit{\psi }$$

(30)

To ensure monotonicity and avoid phase wrapping, angle correction using $\pm \pi$ is applied. For consistency, ${\psi }_1$ is typically set to zero and subtracted from all subsequent angles.

Following the polynomial phase model suggested in [21], the frequency and ROCOF are estimated as

$${\displaystyle \frac{d\psi }{dk}}=a_1+2a_{2}k$$

(31)

$$k=N{f}_{0}t,{\displaystyle \frac{dk}{dt}}=N{f}_0$$

(32)

$${\displaystyle \frac{d\psi }{dt}}=N{f}_0\left(a_1+2a_{2}k\right)$$

(33)

$$\begin{array}{cc}\hfill \Delta \omega & \approx N{f}_0(a_1+2a_{2}N{f}_{0}t)\hfill \\ \hfill \Delta f& \approx {\displaystyle \frac{1}{2\pi }}N{f}_0(a_1+2a_{2}N{f}_{0}t)\hfill \end{array}$$

(34)

This shows that frequency variation is assumed constant within the estimation window, but the estimated value corresponds to the midpoint of the window.

3. Performance Evaluation and Experimental Validation

3.1. Simulation-Based Evaluation of 5G-Based 1PPS

Based on the closed-loop architecture illustrated in Figure 3, this section presents a simulation framework developed in MATLAB/Simulink to evaluate local clock frequency tuning under the 5G FDD mode. The model consists of three core components: a phase detector, a proportional-integral (PI) controller, and a numerically controlled oscillator (NCO). The phase detector is realized using a subtractor followed by a 1 ms delay element, emulating the extraction of phase offset between the received Synchronization Signal Block (SSB) and the local reference clock.

The PI controller outputs a frequency correction term $\Delta f\left[n\right]$, which drives the NCO. The NCO follows a second-order time–phase evolution model:

$$\theta [n+1]=\theta \left[n\right]+T_s·f\left[n\right],f[n+1]=f\left[n\right]+\Delta f\left[n\right]$$

(35)

where $\theta \left[n\right]$ is the accumulated phase, $f\left[n\right]$ is the current local clock frequency, $\Delta f\left[n\right]$ is the PI control output, and $T_s$ is the simulation sampling period. This model enables dynamic compensation for both frequency deviations and phase misalignment, forming a reconfigurable and interpretable testbed for timing loop evaluation.

To simulate realistic field conditions, the NCO is initialized with a frequency offset of $50\mathrm{ppm}$, and white Gaussian phase noise is superimposed on the SSB signal with a signal-to-noise ratio of $60\mathrm{dB}$. The reference frequency is set to the nominal grid value of $50\mathrm{Hz}$. These parameters reflect typical scenarios encountered by PMU-class devices operating in noisy indoor or urban environments.

Multiple sets of PI controller gains were evaluated to assess their influence on loop convergence and steady-state phase accuracy across 300 synchronization intervals. The controller parameters were selected based on stability criteria and practical tuning heuristics. During the simulation, both the instantaneous phase deviations and control outputs were recorded to quantify the impact of each configuration. Representative results are shown in Figure 6, illustrating the trade-offs between responsiveness, overshoot, and residual jitter.

As shown in Figure 6, the dynamic and steady-state behaviors of the control loop are highly sensitive to the selected PI gains. Configurations such as $(K_p=0.3$, $K_i=0.3)$ and $(K_p=0.6,K_i=0.03)$ exhibit pronounced overshoot during initial transients, with normalized phase deviations exceeding 0.3. These cases also show underdamped oscillations that persist for over 15 s before convergence, although frequency locking is eventually achieved within 30 s. Such behavior may be problematic in latency-critical synchronization scenarios.

In contrast, settings like $(K_p=0.6,K_i=0.3)$ and $(K_p=0.3,K_i=0.03)$ provide smoother transient responses with no overshoot and startup deviations confined within 0.2. However, a notable trade-off is observed: the configuration $(K_p=0.6,K_i=0.3)$ achieves faster convergence but exhibits larger steady-state ripple, while $(K_p=0.3,K_i=0.03)$ shows a slower settling process that spans nearly 120 s.

To better illustrate these subtle differences in long-term stability, a zoomed-in view covering the interval from 80 to 130 s is embedded in Figure 6. This inset reveals that the normalized phase error for $(K_p=0.3,K_i=0.03)$ remains consistently within $\pm 2\times {10}^{-4}$, while other configurations show comparatively higher fluctuations. Given the 20 ms period of the synchronization pulse, this corresponds to a maximum timing offset of $\pm 4\mathsf{\mu }\mathrm{s}$, thereby meeting the microsecond-level synchronization accuracy required in wide-area measurement systems.

Overall, the configuration $(K_p=0.3,K_i=0.03)$ achieves the best balance between convergence speed, overshoot control, and steady-state accuracy, validating the effectiveness of the proposed control scheme under realistic operating conditions.

3.2. Experimental Validation of the Soft Synchronous Sampling Algorithm

To assess the performance of the proposed soft synchronous sampling strategy, simulation experiments were conducted using a nominal oscillator frequency of $f_{\mathrm{osc}}=228\mathrm{MHz}$ and a sampling configuration of 1200 samples per nominal cycle. Two test scenarios were considered, corresponding to grid frequencies $f_0=50.10\mathrm{Hz}$ and $f_0=50.15\mathrm{Hz}$, respectively. According to the theoretical relationship, the expected timer counts per sample are

$$C_s={\displaystyle \frac{228\times {10}^6}{1200\times 50.10}}=3792.41,C_s={\displaystyle \frac{228\times {10}^6}{1200\times 50.15}}=3788.63$$

(36)

Rounding yields $\left[C_s\right]=3792$ and 3789, resulting in residuals $\Delta C_s=0.41$ and $0.63$. According to the algorithm, the control flag is set as $+1$ for $f_0=50.10\mathrm{Hz}$ and $-1$ for $f_0=50.15\mathrm{Hz}$, corresponding to over- and under-sampling cases.

Figure 7 and Figure 8 present the simulation results for the timer-count adjustment $C_s$ and the corresponding accumulated phase error $\Delta \theta$ over the first 20 sampling intervals under different input frequencies. Specifically, the top panel corresponds to $f_0=50.10\mathrm{Hz}$ and the bottom panel to $f_0=50.15\mathrm{Hz}$.

In both cases, the proposed adaptive sampling control algorithm (orange curve) maintains a nearly constant accumulated phase error around zero, demonstrating effective phase alignment throughout the sampling process. In contrast, the fixed sampling interval algorithm (green dashed curve) exhibits a clear linear drift in $\Delta \theta$, reaching approximately $-5.5\times {10}^{-4}°$ in the 50.10 Hz case and $+5.5\times {10}^{-4}°$ in the 50.15 Hz case, indicating significant timing mismatch due to frequency deviation.

Meanwhile, the proposed method achieves this robustness by periodically adjusting $C_s$, as shown on the left axis. The timer-count values remain stable in the fixed-interval case (blue dots), whereas the proposed algorithm dynamically compensates for frequency deviations by oscillating around the nominal value of $C_s$. These results quantitatively verify that the proposed control scheme effectively suppresses phase accumulation error caused by off-nominal grid frequencies.

When $\Delta C_s>0.5$, the timer count $C_s$ is adjusted by $\pm 1$ (scaled by 10,000) in one sampling instance. If $\Delta C_s<0.5$, the correction is deferred, leading to an accumulated phase error up to $0.5+\Delta C_s$. Since $|\Delta C_s|\le 0.5$, the worst-case phase deviation per sample is bounded as

$$\Delta {\theta }_{max}=(0.5+0.5)·360°·{\displaystyle \frac{f_0}{f_{\mathrm{osc}}}}$$

(37)

Substituting typical values gives

$$\Delta {\theta }_{max}=360°·{\displaystyle \frac{50}{228\times {10}^6}}\approx 0.000079°$$

(38)

As seen from (37), higher oscillator frequencies yield smaller maximum phase errors, making them desirable for high-resolution synchrophasor systems.

In terms of computational cost, conventional dithering-based methods require updating selection counters $\upsilon \left(k\right)$ based on residual weighting. In contrast, the proposed algorithm accumulates rounding error $Er$, adjusting $C_s$ only when $Er\ge 0.5\times \mathrm{10,000}$, thus significantly reducing real-time overhead in embedded implementations.

3.3. Hardware Testing and Validation

The HackRF One was used to capture the PSS within the SSB, thereby achieving frequency alignment between the local clock and the 5G base-station clock. In the experiment, the RF center frequency was set to 3.51 GHz, the sampling rate to 30 MSPS, and data were continuously acquired for 2 s. A matched-filtering approach was applied to the collected data: time-domain correlation was performed sequentially for the three possible PSS sequences, and the sequence yielding the largest correlation peak was selected as the best match. The optimal matching result is shown in Figure 9.

As shown in Figure 9, a pronounced correlation peak appears at approximately sample index 80, with an amplitude far exceeding the surrounding noise floor, clearly indicating that the complete PSS sequence was successfully captured at that moment. The arrow in the figure denotes the time-domain sample corresponding to the highest correlation among the three candidate PSS sequences, which lies precisely within the PSS symbol interval of an OFDM frame.

Based on the detected PSS arrival time, the local receiver first samples its own clock phase at that instant and computes the difference between the local clock’s phase reading and the ideal 5G frame boundary, thereby obtaining the phase error. A PI controller then adjusts the local clock’s output frequency in real time to track and correct against the 5G base-station clock. After frequency adjustment, the local clock outputs only a PPS signal, representing the regenerated time base synchronized to the 5G signal. An oscilloscope capture of the PPS generated from the 5G synchronization signal and the PPS produced by a GNSS receiver is shown in Figure 10.

Finally, to validate the effectiveness of the PPS signal generated from the 5G synchronization mechanism, a hardware testbed was constructed, as shown in Figure 11. The measurement device used in this experiment is the Universal Grid Analyzer (UGA), which was proposed in our previous work [35]. As shown in the figure, a commercial 5G synchronization receiver (model HR-TD-05A) was employed to extract the Synchronization Signal Block (SSB) from the 5G network and generate a Pulse-Per-Second (PPS) output. This PPS signal serves as the external timing reference for the UGA, enabling the device to align its internal sampling clock with the 5G network time.

To evaluate the phase synchronization performance, a reference sinusoidal signal was generated using a GPS-disciplined signal generator (model AFG1062). The signal has a frequency of 50 Hz, an amplitude of 3.3 V, and an initial phase angle of 45°. It is strictly locked to GPS time and serves as a benchmark for comparing the timing accuracy between GPS-based and 5G-based synchronization. The UGA samples this input signal under different timing sources—once under the GPS PPS and once under the 5G PPS—allowing direct observation of the phase error introduced by 5G-based timing.

The corresponding phase measurement results are presented in Figure 12, which quantitatively compares the relative timing jitter and stability between the two synchronization sources.

As shown in Figure 12, the blue solid line represents the phase trajectory of the PPS signal generated by a GPS-disciplined oscillator while the orange dashed line corresponds to the PPS phase derived from the 5G synchronization signal. Over the full 30-min observation window, both signals remain broadly aligned in phase, indicating that the 5G-based timing mechanism successfully tracks the system clock with high stability.

However, compared to the GPS reference, the 5G-based PPS exhibits noticeable short-term timing jitter. This is particularly evident in the inset box, which magnifies a region between 13.8 and 14.2 min where a transient deviation occurs in the 5G signal. The observed deviation arises from the accumulation and subsequent correction of minor synchronization errors during the timing loop update process. Such fluctuations reflect the inherent limitations of radio-based timing extraction under non-deterministic wireless channel conditions.

Despite these transient disturbances, the overall synchronization quality of the 5G-derived PPS remains acceptable. Throughout the entire test period, the phase deviation relative to the GPS signal stays within $\pm 0.002\mathrm{rad}$, which is significantly below the maximum allowable phase error of $\pm 0.006\mathrm{rad}$ defined in IEEE Std C37.118.1 for steady-state synchrophasor reporting. While the precision of the 5G timing is slightly inferior to that of a fully locked GNSS receiver, the degradation is minimal and does not affect compliance with synchrophasor accuracy standards. This result confirms that the proposed 5G-based method is suitable for time-sensitive measurement applications in GNSS-denied environments.

4. Conclusions

This paper proposes a 5G-based synchronized measurement method tailored for urban distribution networks operating in GNSS-constrained environments. By extracting Pulse-Per-Second (PPS)-equivalent timing references from 5G Synchronization Signal Blocks (SSBs) and refining uplink phase alignment using the Timing Advance mechanism, the proposed system reconstructs a stable local time base without direct reliance on satellite signals. Combined with an adaptive sampling control algorithm that dynamically compensates for crystal-induced quantization errors, the method achieves sub-microsecond timing precision and maintains accumulated phase errors below 0.00008°, thus satisfying the stringent accuracy requirements of IEEE C37.118.

Simulation and hardware validation confirm that the proposed strategy can maintain high stability and synchronization accuracy over extended periods, even in the presence of oscillator drift and signal variation. Furthermore, by leveraging existing 5G infrastructure, the solution avoids the cost and deployment challenges associated with dedicated GNSS receivers or atomic clocks, offering a practical and scalable alternative for indoor or urban measurement scenarios.

However, several limitations of the 5G-based timing approach should be noted. First, 5G timing signals are typically derived from upstream GNSS sources at the base station, making them effectively a relayed form of satellite time rather than an independent time reference. From a traceability standpoint, this limits the long-term timing fidelity compared to direct GNSS access. Second, current 5G networks do not provide native UTC timestamps at the user equipment level.

Future research will focus on enhancing the traceability and resilience of 5G-assisted timing through multi-source clock fusion—integrating GNSS, 5G, and local oscillators—as well as developing lightweight UTC timestamp extraction mechanisms for embedded platforms.