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Article

A Novel High-Gain Multi-Stage Switched-Capacitor-Based DC-DC Boost Converter with Closed-Loop Control

1
Department of Electrical Engineering, National Institute of Technology, Patna 800005, India
2
Discipline of Electrical, Eletronic and Computer Engineering, University of KwaZulu-Natal, Glenwood, Durban 4041, South Africa
*
Author to whom correspondence should be addressed.
Energies 2024, 17(21), 5501; https://doi.org/10.3390/en17215501
Submission received: 7 October 2024 / Revised: 25 October 2024 / Accepted: 31 October 2024 / Published: 3 November 2024
(This article belongs to the Section F1: Electrical Power System)

Abstract

:
In this manuscript, a direct current (DC) boost converter based on a switched-capacitor circuit with closed-loop control, tailored for applications with high-voltage gain, is introduced. The converter utilizes a network with switching capacitors to enhance voltage gain without relying on inductors, making it ideal for high-voltage scenarios. An active disturbance rejection control (ADRC)-based control scheme is used to maintain output voltage stability in the presence of disturbances. The proposed converter’s functionality and performance are assessed through simulations and experimental tests under various load conditions. A loss analysis, considering the losses from switches and diodes, is provided to determine the net efficiency. The results from both simulations and experiments show that the proposed converter achieves a high-voltage gain, excellent load regulation, and rapid transient response, highlighting its potential for applications that require a high-voltage boosting operation.

1. Introduction

In recent times, there has been a significant increase in the use of energy storage devices in conjunction with renewable energy sources like fuel cells and photovoltaics (PVs). The DC characteristics of such energy sources are the major cause of increasing interest in DC microgrids. In order to maintain a steady supply of energy and balance variations in generation and demand, energy storage electrical systems stores the abundant energy for later use. They are essential for grid stability, backup power, renewable energy systems, and electric vehicles (EVs) [1]. However, these devices frequently produce low voltage, which prompts for high-gain converters to raise it to levels that are usable. Also, the energy produced by PV panels generally have low voltage due to various factors such as partial shading, dirt, lower light intensity, and lower designed efficiency of around 20%, and thus the demand for high-gain DC-DC converters is increasing to optimize the flow of power [2]. The voltage can only be increased by around two to three times the input voltage using a traditional boost converter [3]. If its duty cycle further increases to achieve a higher gain, the system tends towards instability and also, at higher duty cycles, the controller may fail to stabilize the converter. Additionally, using a converter at very high duty cycles (0.9 or above) or very low duty cycles (near 0.1) causes unfavorable nonlinear behavior and decreased efficiency [4,5,6,7]. This issue is addressed and solved in [8] by designing a Luo super-lift-based converter consisting of many switches. However, this converter has significantly increased switching losses and could achieve a voltage gain of up to around 10 only. Some authors have used a transformer in the circuit of the converter to achieve a higher gain, as in the flyback converter explained in [9]. Their circuit becomes bulky and costly with the use of a transformer, Also, the converter’s overall efficiency decreases due to the presence of leakage inductance in the transformer.
Researchers attempted to achieve higher gains by eliminating the transformers using non-isolated inductors in [10,11]. In [10], the efficiency of the converter is claimed to be around 92%. Also, the cost of the converter is high due to the presence of two high-frequency inductors. This problem is also faced by the converter in [11] as it has two coupled inductors. Also, this converter has an efficiency of around 92.7%. Some authors have achieved high gains by cascading various individual converter stages [12,13,14]. However, with the cascading phenomenon, the losses increase, resulting in reduced efficiency. In the literature, switched-capacitor-based boost converters (SC-BCs) are receiving tremendous attention from researchers for harvesting energy with a high-voltage gain from non-conventional sources [15,16]. These are hybrid types of converters that do not contain bulky transformers and give much-improved efficiency [16,17,18,19,20]. The main aim of the design of hybrid SC-BC converters is to multiply the input voltage with a network consisting of some switches and capacitors and then feed this voltage to a boost converter, thereby increasing the voltage gain to a larger value. The author in [21] developed a model of a high-gain switched-capacitor-based boost converter without the need of any inductor. However, due to the absence of an inductor, the input current rises instantly during the transient phase. This leads the input source to enter a constant current mode. This may be harmful to the devices connected at the output of this converter. In [22], the author proposed a model of a switched-capacitor-based boost converter consisting of many diodes and MOSFETs. The above-said circuit is further modified by replacing all the diodes with the MOSFETs to eliminate the voltage drops in the diodes [23]. However, this modified circuit contains many switches, that may result in poor efficiency at higher switching frequencies (due to switching losses in the MOSFETs). In [24], a switched-capacitor-based boost converter circuit was designed by the author for high-voltage gain applications with three duty ratios and an efficiency of 93.4%. Nonetheless, the use of three duty ratios makes the controllability of the said converter quite complex.
It has been seen that authors in the previously reported works have focused on the design of switched-capacitor-based converters to achieve a higher gain without considering their closed-loop control. However, it is impossible to achieve a fixed DC voltage at the output of the converter in the presence of unwanted disturbances (varying load, varying input, noise, etc.). Designing control laws for SC-BC converters is a great challenge to researchers, as these circuits are highly nonlinear and exhibit inverse response characteristics. In the present manuscript, a novel switched-capacitor-based boost converter consisting of three diodes, five MOSFETs, three capacitors, an inductor, and a load resistor is proposed. The key advantage of the designed converter is that a substantial voltage gain can be obtained by operating the switches together with two different duty ratios. This concept of two-duty ratios facilitates the user to achieve a substantially high gain without the use of an extreme duty ratio. Furthermore, the active disturbance rejection control (ADRC) is applied to the proposed converter to achieve its stable closed-loop operation. ADRC is an advanced control technique that estimates the disturbances as a separate variable and suppresses them in real time [25,26,27,28,29]. The robustness of the proposed controller towards variations in the reference voltage, input signal, and load resistance is verified through simulations and experiments. The main contributions of this work are therefore summarized as follows:
  • A novel switched-capacitor-based boost converter is proposed that provides a high-voltage gain.
  • The gain of the proposed converter is calculated and found to be higher than a conventional boost converter and the converters in [10,11,24].
  • The recommended converter is controlled using an ADRC technique to achieve a stable and fixed DC under varying loads and environmental conditions increasing its suitability for renewable energy applications.
  • Loss analysis for the circuit is performed for four different loads and efficiencies of more than 94% are achieved.
This paper has been organized in the following way. Section 2 describes the principle of operation of the proposed converter. A brief description of the mathematical modeling for the converter is given in Section 3. The performance characteristics are explained in Section 4. Section 5 describes the design and tuning method for the ADRC-based controller. Section 6 describes the results obtained from the simulation and experimental setups. Furthermore, a loss analysis is also performed which is analyzed in Section 7. The conclusion is derived in Section 8.

2. Proposed Circuit

The complete structure of the proposed switched-capacitor (SC)-based boost converter circuit is shown in Figure 1a. This is a hybrid structure consisting of a switched-capacitor circuit and a boost-converter circuit arranged in a cascaded manner. With the aid of the capacitors, the first stage of the circuit, which consists of a network of switched capacitors, doubles the input voltage. The second stage then increases the input voltage and transfers the energy to the load side with an enhanced output voltage. In the switched-capacitor circuit, there are four MOSFETs ( T 1 , T 2 , T 3 , and T 4 ), two diodes ( d 1 and d 2 ), and two capacitors ( C 1 and C 2 ). The boost converter circuit has an inductor ( L b ), a capacitor ( C b ), a MOSFET ( T b ), a diode ( d b ), and a load resistance ( R L ). The diode voltage drop is denoted by v D which is approximately 0.7 V. There is no such voltage drop in the case of the MOSFETs. There are three different modes in which the circuit can function:
The time span of the first mode is z d T s , where z is the charging duty cycle of the switched-capacitor circuit over the span d T s . The duration of the second and third modes are ( 1 z ) d T s and ( 1 d ) T s , respectively. The circuit diagram of the first mode of operation is depicted in Figure 1b. In this mode, MOSFETs T 2 , T 4 , and T b are switched ON while MOSFETs T 1 and T 3 are kept OFF. The voltage across both the capacitors C 1 and C 2 keeps rising. In the meantime, the load voltage is supplied by the capacitor C b , which discharges through the load resistance R L . In the second stage, as depicted in Figure 1c, the MOSFETs T 1 , T 3 , and T b are switched ON while keeping the MOSFETs T 1 and T 3 OFF. This mode charges the inductor with a voltage three times the input voltage by connecting the voltages across the capacitors and the source in series. On the load side, the capacitor still discharges through the load as in the first stage. In the third stage, only the MOSFET T b is switched OFF keeping the other circuit conditions as they were in the second stage. Here, the stored energy in the capacitors combined with the stored energy in the inductor and voltage source is plunged to the capacitor C b , so that the output voltage is increased in comparison with the input voltage depending on the duty ratio of T b . Also, the load resistor R L is supplied by the load current through the input source.

3. Mathematical Modeling of Proposed Converter

As mentioned in the previous section, the SC-BC has three modes of operation. The differential equations are obtained independently in these three modes of operation. To obtain the combined differential equation, the state-space averaging technique is used. The diode voltage drop is considered to be 0.7 V. The internal resistance of the source voltage ( V i n ) is designated R i n while that of the inductor is designated R L b . The internal resistance of MOSFET is very small and is neglected. The value of the capacitances in the switched-capacitor circuit is equal and can be denoted by C. Also, the voltage across these capacitors will be equal and is denoted by v C .

3.1. Mode 1

The differential Equations (1)–(3) represent the state variables in this mode:
d v C d t = 1 2 C R i n v i n 1 2 C i L b 1 2 C R i n ( v C + v D )
d i L b d t = v C v D L b R L b L b i L b
d v o d t = v o R L C b

3.2. Mode 2

Equations (4)–(6) corresponding to this mode are as follows:
d v C d t = 1 C i L b
d i L b d t = 1 L b v i n 2 L b v C ( R i n + R L ) L b i L b
d v o d t = v o R L C b

3.3. Mode 3

The differential Equations (7)–(9) defining this mode are as follows:
d v C d t = 1 C i L b
d i L b d t = 1 L b v i n 2 L b v C ( R i n + R L + R L b ) L b i L b 1 L b v o
d v o d t = 1 C b i L b 1 R L C b v o
To combine the three modes in a complete interval the state-space averaging technique is used such that the three modes are summed up by multiplying with z d , ( 1 z ) d , and ( 1 d ) , respectively. The averaged Equations (10)–(12) are given as follows:
d v C d t = z d 2 C R i n v i n z d 2 C R i n v C z d 2 C R i n v D ( 2 z d ) 2 C i L b
d i L b d t = ( 1 z d ) L b v i n + ( 3 z d 2 ) L b v C z d L b v D + ( ( z d 1 ) R i n R L b + ( d 1 ) R L ) L b i L b ( 1 d ) L b v o
d v o d t = ( 1 d ) C b i L b 1 R L C b v o
Small signal analysis can be carried out by introducing a small perturbation on all the state variables. However, in order to develop the model, smaller perturbations are ignored, keeping only the average values of the variables such as z d Z D , v i n V i n , v C V C , i L b I L b , v D V D , and v o V o .
Hence, these changes are substituted into Equations (10)–(12) to obtain a large signal model in Equations (13)–(15) written below as follows:
d V C d t = Z D 2 C R i n V i n Z D 2 C R i n V C Z D 2 C R i n V D ( 2 Z D ) 2 C I L b
d I L b d t = ( 1 Z D ) L b V i n + ( 3 Z D 2 ) L b V C ( 1 D ) L b V o + ( ( Z D 1 ) R i n R L b ( 1 D ) R L ) L b I L b Z D L b V D
d V o d t = ( 1 D ) C b I L b 1 R L C b V o
Under steady-state conditions, the above time derivatives may be equated to zero. Therefore, we have the following (16):
d V C d t = d I L d t = d V o d t = 0
Substituting (16) into (13)–(15), we obtain the following:
V 0 = N 1 r D r V i n + N 2 r D r V D
where N 1 r = ( 2 Z D 1 ) Z D ( 1 D ) R o , N 2 r = ( 4 4 Z D ) ( 1 D ) Z D R o , and D r = ( 9 Z D 4 4 Z 2 D 2 ) R i n + ( 2 Z D 3 Z D 2 + Z D 3 ) R o + Z D R L .
The diode voltage drop may be nullified by replacing diodes with MOSFETs.

3.4. Small Signal Modeling of the Developed Converter

The three modes of the converter are explained by assuming the duty ratio of all three modes as D 1 , D 2 , and 1 ( D 1 + D 2 ) , respectively. The timing diagram depicting all the modes is shown in Figure 2. This figure also depicts the ON and OFF times of each switch and diode. Neglecting the diode voltage drop, the averaged model of the suggested converter using Equations (1)–(9) in terms of D 1 and D 2 is given as follows:
d v C d t d i L b d t d v o d t = D 1 2 C R i n D 1 2 2 C 0 3 D 1 2 L b R x D 1 ( R i n + R L ) D 2 R L b L b ( 1 D 1 D 2 ) L b 0 ( 1 D 1 D 2 ) C b 1 C b v C i L b v o + D 1 2 C R i n 1 D 1 L b 0 v i n
where R x = R i n + R L + R L b . The small signal model could be derived by perturbing each of the variables in Equation (18). The perturbed variables could be depicted as d 1 = D 1 + d ^ 1 ; d 2 = D 2 + d ^ 2 ; v C = V C + v ^ C ; i L b = I L b + i ^ L b ; v o = V o + v ^ o ; v i n = V i n + v ^ i n .
The above perturbations are substituted in Equation (18) and the steady-state parts are removed. Hence, the small signal model of the designed converter is obtained as follows:
v ^ ˙ C i ^ ˙ L b v ^ ˙ o = D 1 2 C R i n D 1 2 2 C 0 3 D 1 2 L b R x D 1 ( R i n + R L ) D 2 R L b L b ( 1 D 1 D 2 ) L b 0 ( 1 D 1 D 2 ) C b 1 C b v ^ C i ^ L b v ^ o + I L b + R i n I L b V C 2 C R i n 3 V C + ( R i n + R L ) I L b V o V i n L b I L b C b d ^ 1 + 0 R L b I L b V 0 L b I L b C b d ^ 2 + D 1 2 C R i n 1 D 1 L b 0 v i n
This equation can be written in simplified form as follows:
v ^ ˙ C i ^ ˙ L b v ^ ˙ o = A v ^ C i ^ L b v ^ o + B 1 d ^ 1 + B 2 d ^ 2 + B 3 v i n
where the matrices A, B 1 , B 2 , and B 3 are stated in Equation (19). This equation may be used to obtain the transfer function of the circuit in the terms of different variables such as d 1 , d 2 , and V i n independently.

3.5. Gain Calculations by Volt–Sec Balance of Inductor

The differential equation of the inductor current with respect to time is written for all three modes and, finally, the volt–sec balance is applied over a time period.
Mode 1: Consider that mode 1 operates for a period of D 1 T s , where D 1 is the duty cycle of the switches corresponding to the first mode. Kirchhoff’s voltage law (KVL) is applied to the loop containing the inductor which results in the following:
d i L b d t = v i n L b
Mode 2: Mode 2 is assumed to occur for a period of D 2 T s , where D 2 is the duty cycle of the switches corresponding to the second mode. Hence, applying the KVL across the inductor results in the following equation:
d i L b d t = v i n L b + v C 1 L b + v C 2 L b
Mode 3: The third mode occurs for a time span of 1 ( D 1 + D 2 ) T s . The KVL equation for the inductor is given by the following:
d i L b d t = v i n L b + v C 1 L b + v C 2 L b v 0 L b
The volt–sec balance equation across the inductor for the complete time period T s is given by the following:
0 D 1 d i L b d t I d t + 0 D 2 d i L b d t I I d t + 0 1 ( D 1 + D 2 ) d i L b d t I I I d t = 0
Therefore,
D 1 v i n + D 2 ( v i n + v C 1 + v C 2 ) + 1 ( D 1 + D 2 ) ( v i n + v C 1 + v C 2 v 0 ) = 0
It is presumable in the steady condition that v C 1 = v C 2 = v i n . Hence, the voltage gain equation is calculated as follows:
v 0 v i n = 3 2 D 1 1 ( D 1 + D 2 )

4. Comparison of the Proposed Converter’s Performance

Equation (25) provides the introduced converter’s voltage gain. The gain depends on D 1 as well as D 2 . The effect of D 1 and D 2 on the gain is observed by varying D 2 for a fixed value of D 1 and the response hence obtained is plotted as depicted in Figure 3. Here, different values of D 1 are selected and, at these values, the effect of varying D 2 is studied on the gain. As the value of D 1 increases, the curve shifts from right to left. A few alternative converters shown in [10,11,24] are compared with the proposed converter’s various performance attributes. A gain of 46 is achieved at D 1 = 0.35 and D 2 = 0.6 while, for D 1 = 0.6 , D 2 = 0.25 , and D 3 = 0.1 , the converter in [24] produces a gain of 31. The converter presented in [10] attains its maximum gain of around 35 while the proposed converter achieves its highest gain of 95. Figure 4 displays the gain’s comparison of the various converters and proves that the presented converter achieves the highest gain. Table 1 compares the voltage gain, voltage stress, and several other components of the proposed converter with those of existing converters. On comparing with the other converters, it is found that the suggested converter is capable of achieving much higher gain for the same values of duty ratios. The voltage stress on the diodes and switches is comparable to that of the converter in [10] and lower than that of the traditional boost converter. Also, fewer inductors are needed to generate a comparably larger gain. Furthermore, the theoretical efficiencies of the various converters are also compared and listed in Table 1. The efficiency of the developed converter is calculated in Section 7. The advocated converter’s theoretical efficiency is around 96 % and is higher than the converters in [10,11,20].

5. ADRC-Based Control of the Proposed Converter

For practical applications, there is a need for regulated output from the converter. In order to obtain the intended output from the converter, a closed-loop control framework is required. All robustness and stability requirements are met by the active disturbance rejection control approach. The disturbance variable’s estimation and its real-time suppression or rejection form the basis of the ADRC approach [29,30]. The fundamental block diagram of the closed-loop ADRC control structure is shown in Figure 5.
In this figure, y is the obtained output, y ^ is the output estimate, g ^ is the estimate of the disturbance comprising the unmodeled dynamics and external and internal disturbances, and r is the reference. The controller’s gain is denoted by k p . Furthermore, G p ( s ) corresponds to the transfer function of the developed converter, the external disturbance is denoted by δ , and u is the final control signal. The extended state observer (ESO) differentiates the output and the disturbance signal, and estimates them separately. Further, the disturbance is canceled by the selection of a proper controller.
The modeling of the converter’s section B is conducted independently in order to use the control approach on the converter in an appropriate manner. The control signal provided by the controller drives the switch ( T b ). The transfer function of section B of the converter is derived and formulated by Equation (27):
v 0 d = R L L b I L b s + R L d V 0 R L L b C b s 2 + L b s + R L d 2

5.1. Controller Design

Equation (28) represents the conversion of the transfer function of the converter derived from Equation (27) into the time domain:
y ¨ = ( c 1 y ˙ c 0 y + δ ( t ) d 1 u ˙ + Δ d 0 u ) + d 0 u
where d 0 and d 1 are the numerator’s coefficients, indicating the dynamics of the zeroes, and c 0 and c 1 are the denominator’s coefficients in the real transfer function, showing the pole dynamics. The system’s gain is denoted by d 0 , and any inaccuracy in the presumption of d 0 is represented by Δ d 0 . δ ( t ) represents the external disturbances. Equation (28) can be summarized by Equation (29) as follows:
y ¨ = g ( y , y ˙ , δ , u , u ˙ ) + d 0 u
where
g ( · ) = ( c 1 y ˙ c 0 y + δ ( t ) d 1 u ˙ + Δ d 0 u )
Equation (31) represents the bifurcation of the total disturbance g as follows:
g = g 1 + g 2
In Equation (31), the pole dynamics are represented by g 1 = c 0 y c 1 y ˙ , whereas all the disturbances and unmodeled dynamics are represented by g 2 . Once more, g may be expressed as in Equation (32):
g = c 0 y c 1 y ˙ + g 2
The differentiation of g results in Equation (33):
g ˙ = c 0 y ˙ c 1 y ¨ + g ˙ 2
Since y ¨ = g + d 0 u , g ˙ can be given by Equation (34):
g ˙ = c 0 y ˙ c 1 ( g + d 0 u ) + g ˙ 2
Now, assume x 1 = y , x 2 = y ˙ , x 3 = g ( · ) and x ˙ 3 = g ˙ 2 ( · ) = β . Hence, the derivative of g is given by Equation (35) as follows:
g ˙ = c 0 x 2 c 1 x 3 c 1 d 0 u + β
With the aforementioned presumptions, the state-space Equation (36) is constructed as follows:
x ˙ = A H x + B H u + H H β y = C H x
where A H = 0 1 0 0 0 1 0 c 0 c 1 , B H = 0 d 0 c 1 d 0 , C H = 1 0 0 , and H H = 0 0 1 are the state matrices of the proposed high-gain converter.
The observer is intended for the system described above, as seen in Equation (37):
z H ˙ = A H z H + B H u + M H ( y y ^ ) y ^ = C H z
Here, the observer’s state variable is denoted by z H = z 1 z 2 z 3 T , M H = α 1 H α 2 H α 3 H T is the observer’s gain, and ‘T’ stands for the matrix’s transposition.
The third-order observer’s characteristic equation may be constructed with poles assigned to ω o . This would lead to Equation (38) as follows:
s I ( A H M H C H ) = s + ω o 3 = 0
Comparing the terms in Equation (38) results in Equations (39)–(41):
α 1 H = 3 ω o c 1
α 2 H = 3 ω o 2 ( c 0 c 1 α 1 H )
α 3 H = ω o 3 ( c 0 α 1 H + c 1 α 2 H )
A proportional derivative type controller is selected to reject the disturbance term in real time as given by Equation (42) as follows:
u = K p H ( R H z H ) d 0
where R H = r 0 0 T and K p H = k 1 H k 2 H 1 .
The characteristic equation of a controller may be constructed with poles assigned to ω c . This would lead to Equation (43) as follows:
s I ( A H B H K p H ) = s + ω c 3 = 0
The above equation results in k 1 H = ω c 2 and k 2 H = 2 ω c . Equation (44) provides the controller’s transfer function as follows:
G c ( s ) = ω c 2 s + ω c 2

5.2. Frequency Domain Analysis and Parameter Tuning

Stability analysis can be performed for the closed-loop system by using Equations (36), (37), and (42) as given by Equation (45):
x ˙ z ˙ H = A H B ˜ H k p H M H C A M H C B ˜ H k p H x z H + B ˜ H H H B ˜ H 0 r ˜ β
where B ˜ H = B H / d 0 and r ˜ = k p H r . Now, using an equivalence transformation x ˜ z ˜ H T = Q x z H T , where Q = Q 1 , the state estimation Equation (45) is now given by Equation (46):
x ˜ ˙ z ˜ ˙ H = A H B ˜ H k p H B ˜ H k p H 0 A H M H C H x ˜ z H + B ˜ H H H 0 H H r ˜ β
To fulfill the criteria of BIBO stability, the eigen values of Equation (46) must be in the left half plane. Here, the scaled reference r ˜ and β are always bounded and the condition of stability is only dependent on β = g 2 ˙ , which means that g 2 should be differentiable [31].
The selection of tuning parameters is a crucial part of the closed-loop performance of the system. The author of [31,32] gave specific guidelines for the selection of the controller’s and observer’s bandwidths. Based on this, the controller’s and observer’s bandwidths were selected as ω c = 900 rad/s and ω o = 3600 rad/s. Accordingly, the values of the controller’s and observer’s gains were calculated.
The closed-loop system’s stability can be proved by drawing the Bode plot as shown in Figure 6. This figure clearly demonstrates that the closed-loop system is stable with gain and phase margins at 20.1 dB and 71.9 degrees respectively.

6. Simulation and Experimental Results

To analyze the servo and regulatory performances, simulations and experimental verifications are carried out. Additional research is conducted on the regulatory performance in relation to the input voltage and load resistance fluctuations.

6.1. Simulation Results

The simulation was carried out by utilizing the Simscape power system toolkit and the MATLAB/Simulink 2021a platform. Table 2 displays the circuit’s specs.
The discrete mode of operation was used for the control system design. The simulation study is performed under various scenarios consisting of input voltage and load fluctuations.
Figure 7 shows the diagram for the output voltage, input voltage, load current, and duty cycle following a momentary variation in the reference voltage. In this case, the input voltage is set to 5 V and a 100 Ω fixed resistor is used. The variation in reference voltage is performed in various steps as 12 V-15 V-20 V and then back to 20 V-15 V-12 V. The response from Figure 7 shows that the output voltage adjusts to match the reference voltage as it fluctuates due to the adjustment of the duty ratio provided by the controller with a settling time of 0.02 s. The output current also settles to a new value with the settlement of the output voltage. Here, it can be noticed that the output of 20 V is obtained at a duty ratio of 0.4 proving the converter exhibits high gain.
The responses obtained using simulation for varying input are presented in Figure 8. In this case, the reference voltage is set to 20 V and a 100 Ω load resistor is used. Two steps are taken to vary the input voltage. Initially, it is settled at 5 V, then it is changed to 8 V and back to 5 V at certain instants of time as shown in Figure 8. The output response displayed by Figure 8 may be used to assess how the controller can swiftly and effectively regulate the output while suppressing disturbances such as sudden fluctuations in input voltage. ADRC uses the ESO to identify the variations in the states of the converter due to the fluctuations in input voltage. After that, it uses error feedback to dynamically modify the duty cycle in order to keep the output voltage steady. Even when input voltage fluctuates unpredictably, this method guarantees strong, adaptive control.
Furthermore, the load resistance is varied while the setpoint and the input voltages remain fixed at 20 V and 5 V, respectively. A 50 Ω load resistor is utilized initially but, after a short while, it is abruptly changed to 100 Ω and then back to 50 Ω . Figure 9 displays the responses under this load variation. Since the load current is lower, the response of the current is multiplied by 20 and plotted thereafter for improved visibility, which explains the variation in the load. The output voltage settles to the reference voltage right away and has a very small ripple magnitude. The resulting response demonstrates decisively the controlled system’s capacity to reject disturbances under various load conditions. The variables like output voltage and inductor current are continually monitored by the ESO. These parameters are changed by an abrupt change in load, and the ESO records this as a disturbance in its state estimations. After that, the state error feedback produces a duty cycle according to the disturbance estimates and error. Hence, it provides a robustness against the varying loads.

6.2. Hardware Results

The complete experimental setup is depicted in Figure 10. A 200 watt prototype is developed for the proposed circuit. In the experimental setup, MOSFET-IXFH80N65X2 designed by IXYS company from Milpitas, CA, USA and Diode-SL80F040 manufactured by SL Power Electronics, a company based in the Calabasas, CA, USA were used. A gate driver circuit is used to feed the control signal to the MOSFET’s gate terminal.
The gate driver circuit enhances the PWM pulse generated by microcontroller TMS320F 28379D designed by Texas Instruments (TI), a company based in the Dallas, TX, USA is programmed by the MATLAB code composer studio. The gate pulse fed to various MOSFETs is shown in Figure 11. Here, the numbers ‘0’ to ‘4’ beside the pulses represents the switching pulses for the switches T 1 , T 2 , T 3 , T 4 and T b respectively as labelled in the Figure 11. An LV-55P voltage sensor developed and manufactured by LEM (Liaisons Electroniques et Mécaniques), a company based in Pfäffikon, Switzerland is used to sense the output voltage and feed it to the microcontroller that ultimately supplies the controller feedback structure. An APCSMP09 source designed by APC Instruments, a company based in India is used for supplying ±15 V to the sensor. A programmable DC source is used as the input voltage to the circuit. The waveforms are recorded on a multiport DSO with the help of current and voltage probes. To verify the servo performance of the system, the reference is varied similarly to that in the simulation and the response obtained is depicted in Figure 12. From the figure, it is determined that the system has a good reference tracking ability and the experimental and simulation results match satisfactorily.
Disturbance rejection abilities can be inferred from Figure 13 and Figure 14. This shows that the effect of disturbance owing to load and input voltage variations on the output voltage is suppressed immediately by the controller. The load variations are performed by varying the resistance from 100 Ω to 50 Ω to 100 Ω , keeping the reference and input voltages at 20 V and 5 V, respectively. The output voltage remains constant in spite of variations in the load. However, the load affects the load current. Similarly, no effect is seen on the output voltage when the input voltage is varied from 5 V to 8 V to 5 V, keeping the reference at 20 V and load at 100 Ω .

7. Loss Analysis for the Proposed Converter

Using the model that the author developed in [33], the detailed loss calculations are performed by taking into account the losses occurring in the switches (switching ( P s w ) + conduction losses ( P c o n )) and diodes (conduction losses ( P c o n )). These losses are computed for ON-state voltage drops and energy factors with the help of quadratic curves. A curve-fitting tool is used for obtaining these curves with the help of datasheets of the switches and diodes. In this work, the datasheet of MOSFET IXFH80N65X2 is used for the respective calculations. The corresponding Equations (47)–(51) are given as follows:
V D S = 20 × 10 8 I S W 2 + 0.001 I S W + 0.966
V D = 10 × 10 8 I D 2 + 0.0024 I D + 0.779
K S W o n = 80 × 10 8 I S W 2 0.0024 I S W + 4.01
K S W o f f = 30 × 10 8 I S W 2 0.0011 I S W + 3.15
K D i o d e r e v = 70 × 10 8 I D 2 + 0.004 I D + 6.654
Here, V D S and V D are the ON-state voltage drops of the MOSFET and diode, respectively. I S W is the current through the switch and I D is the current through the diode. K S W o n and K S W o f f are the energy factors of the MOSFET in the ON and OFF states, respectively. The OFF-state energy factor for the diode is denoted by K D i o d e o f f . Equations (47)–(51) are used to calculate the losses according to the procedure explained in [33,34,35]. From Equation (52), the efficiency for the developed converter may be obtained as follows:
η S C B C = P o u t S C B C P i n S C B C = P o u t S C B C P o u t S C B C + l o s s e s
where P o u t S C B C and P i n S C B C are the output and input powers of the converter, respectively. The calculated losses and efficiencies are summarized in Table 3. The table summarizes the losses of each switch and diode calculated during four different rated power outputs and the efficiencies are calculated accordingly. From the table, it can be seen that maximum efficiency is obtained at 96.6% when the rated power is 111 watts. The experimental efficiencies are also calculated for the proposed circuit and it is found to be lower than the theoretical efficiency. The full load experimental efficiency for the proposed circuit is calculated to be 94.07%. The efficiency value decreases both above and below the full load.

8. Conclusions

The presented converter makes use of a switched-capacitor network to meet the requirement of a significantly high-voltage gain for renewable energy applications. The switches are operated with two individual duty ratios, providing a very-high-voltage gain. The availability of two duty ratios makes it easier for the user to attain large gains without utilizing a single duty ratio at higher values. The variations in the voltage gain with respect to duty cycles are demonstrated graphically. In the proposed converter, the voltage stress on the switches is lower as compared to those obtained in [22,23]. Both switching and conduction losses are taken into account for calculating the converter’s efficiency. The efficiency of the designed converter for various loads is found to be above 95%. The closed-loop control strategy utilizing the ADRC controller is implemented on the proposed converter by selecting the controller’s and observer’s bandwidths as 900 rad/s and 3600 rad/s, respectively. Both simulation and experimental outcomes validate that the newly developed converter along with the ADRC control attains an elevated voltage gain, effective load regulation, and rapid transient response that make the converter suitable for microgrid applications. Other advanced control techniques such as sliding mode control, adaptive control, model predictive control, etc. may be implemented on the newly constructed converter.

Author Contributions

Conceptualization, P.K. and A.K.S. (Ashutosh Kumar Singh); methodology, P.K.; software, P.K. and A.K.S. (Ashutosh Kumar Singh); validation, P.K. and A.K.S. (Ashutosh Kumar Singh); formal analysis, P.K.; investigation, P.K.; resources, P.K. and A.K.S. (Ashutosh Kumar Singh); data curation, P.K.; writing—original draft preparation, P.K.; writing—review and editing, P.K. and M.A.; visualization, P.K.; supervision, M.A. and R.K.M.; project administration, P.K., A.K.S. (Ashutosh Kumar Singh) and M.A.; funding acquisition, A.K.S. (Akshay Kumar Saha). All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The original contributions presented in the study are included in the article; further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Proposed SC-based DC-DC converter. (a) Complete circuit diagram. (b) Mode 1 operation (time interval (zd)* T s : C 1 , C 2 , C 3 , and L b are being charged). (c) Mode 2 operation (time interval (1 − z)d T s : capacitors are connected in series and L b is charged to higher voltage). (d) Mode 3 operation (time interval (1 − d) T s L b : is discharged and output voltage is boosted).
Figure 1. Proposed SC-based DC-DC converter. (a) Complete circuit diagram. (b) Mode 1 operation (time interval (zd)* T s : C 1 , C 2 , C 3 , and L b are being charged). (c) Mode 2 operation (time interval (1 − z)d T s : capacitors are connected in series and L b is charged to higher voltage). (d) Mode 3 operation (time interval (1 − d) T s L b : is discharged and output voltage is boosted).
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Figure 2. Timing diagram depicting all the modes.
Figure 2. Timing diagram depicting all the modes.
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Figure 3. Plot for voltage gain vs. D 2 with different D 1 .
Figure 3. Plot for voltage gain vs. D 2 with different D 1 .
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Figure 4. Comparison of gain of proposed topology and topologies in [10,11,24].
Figure 4. Comparison of gain of proposed topology and topologies in [10,11,24].
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Figure 5. A closed-loop ADRC control block schematic diagram.
Figure 5. A closed-loop ADRC control block schematic diagram.
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Figure 6. Bode plot of the closed-loop system.
Figure 6. Bode plot of the closed-loop system.
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Figure 7. Output voltage response for varying reference.
Figure 7. Output voltage response for varying reference.
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Figure 8. Response of the output voltage to varying input.
Figure 8. Response of the output voltage to varying input.
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Figure 9. Response of the output voltage to varying load.
Figure 9. Response of the output voltage to varying load.
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Figure 10. Experimental prototype.
Figure 10. Experimental prototype.
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Figure 11. Gate pulses for different switches.
Figure 11. Gate pulses for different switches.
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Figure 12. Responses obtained for variation in reference.
Figure 12. Responses obtained for variation in reference.
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Figure 13. Responses obtained for variation in load.
Figure 13. Responses obtained for variation in load.
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Figure 14. Responses obtained for variation in input.
Figure 14. Responses obtained for variation in input.
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Table 1. Comparison of presented and existing converters.
Table 1. Comparison of presented and existing converters.
Technical InformationProposed ConverterConverter in [24]Converter in [10]Converter in [11]
Voltage
gain
v 0 v i n = 3 2 D 1 1 ( D 1 + D 2 ) v 0 v i n = 3 2 D 1 D 2 1 D 1 D 2 D 3 v 0 v i n = 1 D 1 1 ( D 1 + D 2 ) v 0 v i n = 1 + D 1 D
Quantity of diodes3320
Quantity of switches5533
Quantity of inductors1122
Quantity of capacitors3311
Diode’s
voltage stress
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
Voltage stress
on switches
V T 1 , s = V T 3 , s = v i n
V T 2 , s = V T 4 , s = v i n
V T b , s = v 0
V T 1 , s = V T 3 , s = v i n
V T 2 , s = V T 4 , s = v i n
V T b , s = v 0
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
V D 1 , s = V D 1 , s = v i n
V D b , s = v i n + v 0
Theoretical efficiency96%93.4%92%92.7%
Table 2. Specifications for the developed converter’s circuit.
Table 2. Specifications for the developed converter’s circuit.
ComponentsSpecifications
Switching frequency100 kHz
V i n 5 V
V 0 20 V
L b 130 mH
C b 1000 μ F
C 1 , C 2 100 μ F
R L 100 Ω
Table 3. An evaluation of the proposed converter’s efficiency.
Table 3. An evaluation of the proposed converter’s efficiency.
Diodes
and
Switches
Rated Output Power ( P out )
111 W142.9 W200 W333 W
P sw + P con P sw + P con P sw + P con P sw + P con
T 1 0.1200.1640.2550.524
T 2 0.4740.6711.0092.098
T 3 0.1200.1640.2550.524
T 4 0.4740.6711.0092.098
T b 0.4450.6050.9351.908
d b 0.1790.2420.3690.744
d 1 1.0491.4532.2044.518
d 2 1.0491.4532.2044.518
Total Loss3.9135.4728.24216.93
Efficiency ( η )96.6%96.34%96.04%95.17%
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Kumar, P.; Ajmeri, M.; Singh, A.K.; Mandal, R.K.; Saha, A.K. A Novel High-Gain Multi-Stage Switched-Capacitor-Based DC-DC Boost Converter with Closed-Loop Control. Energies 2024, 17, 5501. https://doi.org/10.3390/en17215501

AMA Style

Kumar P, Ajmeri M, Singh AK, Mandal RK, Saha AK. A Novel High-Gain Multi-Stage Switched-Capacitor-Based DC-DC Boost Converter with Closed-Loop Control. Energies. 2024; 17(21):5501. https://doi.org/10.3390/en17215501

Chicago/Turabian Style

Kumar, Priyanshu, Moina Ajmeri, Ashutosh Kumar Singh, Rajib Kumar Mandal, and Akshay Kumar Saha. 2024. "A Novel High-Gain Multi-Stage Switched-Capacitor-Based DC-DC Boost Converter with Closed-Loop Control" Energies 17, no. 21: 5501. https://doi.org/10.3390/en17215501

APA Style

Kumar, P., Ajmeri, M., Singh, A. K., Mandal, R. K., & Saha, A. K. (2024). A Novel High-Gain Multi-Stage Switched-Capacitor-Based DC-DC Boost Converter with Closed-Loop Control. Energies, 17(21), 5501. https://doi.org/10.3390/en17215501

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