A Hybrid Switched-Inductor/Switched-Capacitor DC-DC Converter with High Voltage Gain Using a Single Switch for Photovoltaic Application

Abstract

This paper introduces a new high-step-up, non-isolated switched-inductor switched-capacitor DC-DC converter. The proposed converter remarkably integrates switched-capacitor and switched-inductor cells, leading to a significant increase in voltage gain. This unique composite structure not only ensures the continuity of input current, but also successfully minimizes the current ripple and voltage stress across the components, thereby optimizing efficiency. The standout feature of this converter is its singular switch controlled by pulse-width modulation (PWM), which simplifies its operation. A rigorous steady-state operation analysis is conducted, providing a comprehensive understanding of the converter’s performance. For validating the theoretical findings, the paper also details a real-world prototype of the converter. Comparative studies conducted with other similar structures substantiate the superiority of the proposed converter.

1. Introduction

Today, high step-up DC-DC converters are used to increase low voltage sources to high output voltage for renewable energy applications. In a grid-connected PV system, the voltage level, which is generated by PV arrays cannot be used to feed the grid-connected side. In fact, low input voltage should be boosted with high voltage gain. Hence, high-step-up DC-DC converters are presented for use as an interface circuit between low-voltage PV arrays and high-voltage grid-connected sides [1,2]. DC-DC boost converters are the best topology in comparison with others for these applications. However, boost converters will be unstable when their duty cycle reaches unity. In other words, the voltage gain of boost converters is limited. Furthermore, using a high duty cycle creates lots of problems, such as low efficiency, high conduction/switching losses, high reverse recovery, and high electromagnetic interference (EMI). Moreover, the selection of high-voltage components, the equivalent series resistance of components, and the stability issue are three main limitations of high voltage gain [3,4]. By adjusting the transformer turn ratio in isolated converters, high voltage gain can be achieved. However, since transformers inherently possess leakage inductance, these topologies can generate high voltage spikes and substantial power losses [5]. Therefore, either a novel snubber is required, or a high voltage may be obtained in non-isolated quadratic gain [6,7]. Due to galvanic isolation, the isolated converters are typically employed in high-power applications or for sensitive loads [8]. To eliminate the leakage inductance, non-isolated DC-DC converters are used in many medium and low-power applications. Moreover, they have a lower size, cost, weight, volume, and higher efficiency in comparison with isolated types. Furthermore, they share common ground for both sides at the input and the output [9]. Non-isolated converters can be categorized as coupled-inductor type and non-coupled-inductor type. In fact, coupled-inductor types are introduced to solve the problems associated with transformers. However, this type needs an accurate calculation to design a coupled magnet [10]. It is obvious that the non-coupled-inductor type has a lower number of magnetic elements and a smaller size compared to the coupled-inductor type. Different methods, such as coupled inductors [11,12], switched inductors and switched capacitors [13,14,15,16,17,18,19], input-parallel-output series connection, stacked converters [20], and cascaded structures [21], can be employed to achieve high voltage gain in non-isolated converters. However, they suffer from low efficiency due to high voltage stress across switches for coupled inductors and switched inductor cells [22], or due to a large number of elements for cascaded structures, stacked converters, and switched-capacitor cells [23]. Integrating some of the different voltage lift methods, such as switched capacitors, switched inductors, coupled inductors, or multiplier cells is an efficient way to reach high gain. High voltage gain with a low duty cycle in switching-mode DC-DC converters is reached by applying multiple capacitors. The operation of the converter shows that the proposed method leads to high efficiency. A boost converter that is utilized as a switched capacitor is proposed in [24]. However, the converter has a low efficiency at constant voltage. Many other topologies have used switched capacitors to increase voltage gain in non-isolated DC-DC converters [25]. On the other hand, many switched-inductor methods use a high number of cells to reach a high voltage gain in their proposed converters [26]. However, most of them have complex structures. Many different topologies for high-step-up non-isolated DC-DC converters with a single switch are presented in the literature [27,28,29,30]. Most of them use one switch and three diodes as the active elements in their structure. The voltage gain of all aforementioned topologies is limited to ten. The proposed converters with a single switch in [3,31] comprise two inductors, four diodes, and capacitors. They suffer from high conduction losses due to the high number of components. A modified switched inductor network is used in [17] to increase the voltage gain. The proposed converter needs extra diodes and inductors, which leads to low efficiency. A cascaded boost converter with a low number of elements is presented in [28,29,32]. In these topologies, high voltage gain is achieved when the duty cycle is 0.8. To reach high-step-up operation in a lower-duty cycle, a network consisting of two capacitors and diodes is applied in [33]. Moreover, a switched-capacitor network is used in [34] to increase the voltage gain further. Additionally, a family of step-up DC-DC converters that use switched-capacitor inductor cells to achieve high voltage gain is presented in [15,35]. Most of them have a high number of components in their structure, which leads to low efficiency.

In this paper, a new high-step-up converter based on switched capacitors and switched inductors is proposed, which has the following characteristics compared to similar structures.

• Only one switch is used in the proposed topology. Therefore, this converter has much less complexity compared to similar structures.
• This converter has only two operation modes. This operation is based on a conventional boost converter. The proposed converter has a linear operation.
• The control of this converter is PWM. Due to the single-switch structure, the design of the feedback circuit and gate driver is much simpler compared to similar structures.
• This converter has a very high reliability factor for use in various applications due to its simple structure and linear operation.
• This converter has a very high voltage gain (G = 23), which is suitable for many industrial applications. This high gain is due to the use of stacked cells of switched inductors in the input section, and switched capacitors in the output section.
• In the input section, the converter consists of two integrated cells of switched inductors, which have the following advantages:

  ❖

  The properties of the basic boost converter are preserved in the operation of the proposed topology.

  ❖

  When the switch is turned on, the energy is stored in the switched inductors. Besides, this energy is transferred to the output when the switch is turned off.

  ❖

  These two cells are merged, and the number of energy storage elements is reduced. This reduces the order of the proposed circuit and improves the stability of the converter.

  ❖

  These cells of the integrated switched inductors have the role of the input filter inductor in the conventional boost converter, which causes the input current to be non-pulsating. As a result, the current stress of the elements is improved.

  ❖

  By dividing the input current in the input inductors (similar to the interleaved structures), the current stress of diodes and the Ohmic losses in the paths are reduced. Therefore, less heat is produced in the converter, and there is no need to use a heat sink for switches and diodes at high powers.

• This converter uses a cell of switched capacitors in the output part of the converter. This cell has the following advantages:

  ❖

  This cell has a capacitive characteristic and creates an inherent voltage isolation between the input and the output. Hence, the converter does not need an isolating transformer.

  ❖

  This cell also has the role of increasing the voltage. It stores energy when the switch is turned on. Then, it transfers the energy to the output when the switch is turned off.

  ❖

  This cell creates two parallel paths for transferring power from input to output, which makes the converter very suitable for high-power applications.

  ❖

  Due to being in series with the output part of the converter, this cell of the switched capacitor reduces the output voltage ripple. However, the output filter of the converter is a first-order filter.

In order to accurately investigate the proposed converter, the remainder of this paper is organized as follows. The proposed topology is presented in Section 2; the principle of operation is explained in detail in Section 3. Design considerations and the related formulas are considered in Section 4. The experimental results and their analysis are provided in Section 5. The conclusion is presented in the Section 6.

2. Circuit Configuration of the Proposed Converter

The proposed converter is shown in Figure 1. As can be seen from this figure, the proposed converter has only one switch. Inductors L₁, L₂, and L₃ are input inductors. Moreover, capacitors C₁ and C₂ are input capacitors in the proposed high-step-up converter. In this circuit, C_O and R_L are the output capacitor and the output resistor, respectively. The complexity of the operation and control of a converter is directly related to the number of switches and diodes. This increment occurs because each switch requires a gate drive signal to control it. As can be seen from the proposed structure, only one switch is used, which makes the converter operation much simpler than similar topologies.

The proposed step-up cell is a combination of a switched inductor and switched capacitor, as shown in Figure 2. To increase the output voltage level, this cell is used twice in the circuit.

The basic structure of the proposed topology is a boost converter. At the output, a switched-capacitor cell is used instead of the output diode to increase the voltage gain. The switched-capacitor cell is depicted in Figure 3.

3. Analysis of Operation Modes

In this section, the performance of the proposed high-step-up converter in different modes is explained. For simplicity of circuit analysis, the following assumptions are considered as follows.

• The output capacitor is large enough that the voltage across it can be considered a constant voltage.
• All circuit elements are considered ideal.
• The converter operation is analyzed in a steady-state condition.

3.1. CCM Operation

The proposed converter has two operating modes. The equivalent circuit for each mode and the theoretical waveforms are shown in Figure 4 and Figure 5, respectively.

Interval 1: (t₀ − t₁) [see Figure 5a]: This mode starts when switch S is turned on at t₀. Before t₀, it is assumed that the voltage across capacitor C₁ is twice the input voltage and V_C2 is equal to the input voltage. As well, voltage capacitors V_C3 = V_C4 are considered equal to half the output voltage. According to (1), the voltage across inductor L₁ is positive during this mode. Therefore, the current passing through the inductor increases linearly.

$$V_{L1}=V_S+V_{C1}+V_{C2}$$

(1)

$$V_{C2}\left(t_0\right)=\frac{1}{2}{V}_{C1}\left(t_0\right)=V_S$$

(2)

So;

$$V_{L1}=4V_S$$

(3)

$$\Delta I_{L1}=\frac{4V_S}{L_1}\left(t_1-t_0\right)=\frac{4D{V}_S}{L_1{f}_s}$$

(4)

During this mode, energy is transferred from the input source and capacitors C₁ and C₂ to inductor L₁. Moreover, the voltage across inductor L₂ can be calculated as follows.

$$V_{L2}=V_S+V_{C2}=2V_S$$

(5)

$$\Delta I_{L2}=\frac{2V_S}{L_2}\left(t_1-t_0\right)=\frac{2D{V}_S}{L_2{f}_s}$$

(6)

Due to the positive voltage across inductor L₂, its current increases linearly. During this mode, energy is transferred from the input source and capacitor C₂ to inductor L₂.

$$V_{L3}=V_S$$

(7)

$$\Delta I_{L3}=\frac{V_S}{L_3}\left(t_1-t_0\right)=\frac{V_{S}D}{L_3{f}_s}$$

(8)

On the other hand, energy is transferred from the input source to inductor L₃, and the current passing through it increases linearly. According to Equations (4), (6), and (8), the following formulas can be obtained:

$$\Delta I_{L1}=2\Delta I_{L2}=4\Delta I_{L3}$$

(9)

$$t_1-t_0=DT$$

(10)

where D is the duty cycle of the switch, and DT is the time duration of turning on. Since diodes D₁ and D₂ have a common cathode, a diode can be turned on with a larger anode voltage. The anode voltage of diode D₁ is equal to V_S, while the anode voltage of diode D₂ is equal to −(V_C1 + V_C2). Consequently, diode D₂ will be reverse-biased. Similarly, the anode voltage of diode D₃ is V_S, while the anode voltage of diode D₄ is −V_C2. As a result, diode D₃ is forward-biased and diode D₄ is reverse-biased. Since the switch is turned on, the voltage across diode D₅ can be computed as follows.

$$V_{D5}=V_O-V_{C4}=\frac{V_O}{2}$$

(11)

Hence, the diode is reverse-biased. Similarly,

$$V_{D7}=V_O-V_{C3}=\frac{V_O}{2}$$

(12)

Additionally, diode D₇ is also reverse-biased. During this mode, diode D₆ is forward-biased, and capacitors C₃ and C₄ are being charged by output capacitor C_O. On the other hand, the output capacitor also supplies the load. When the sum of the currents flowing through inductors L₁, L₂, and L₃ is equal to the maximum input current I_in(max), the switch is turned off. As a result, mode one ends. The maximum input current in the proposed converter is obtained according to the nominal power. Assuming that the efficiency is 100%, the following equations are calculated:

$$V_{O(\max )}\times I_O=V_{in}\times I_{in(\max )}\Rightarrow I_{in(\max )}=\frac{V_{O(\max )}\times I_O}{V_{in}}$$

(13)

$$V_{C3}+V_{C4}=V_O$$

(14)

As C₃ = C₄, their voltage is half the output voltage.

Interval 2: (t₁ − t₂) [see Figure 5b]: This mode starts when the switch is turned off at t₁. Hence, diodes D₁ and D₃ are reversed-biased, while diodes D₂ and D₄ are forward-biased. As a result, the required path to transfer the energy stored in inductors L₁, L₂, and L₃ to capacitors C₁, C₂, and the output is provided by diodes D₂, D₄, D₅, and D₇. When diodes D₅ and D₇ are switched on, the energy stored in capacitors C₃ and C₄ is transferred to the load, while diode D₆ is reverse-biased.

$$V_{L1}=V_S+V_{C1}+V_{C2}+V_{C4}-V_O=4V_S-\frac{V_O}{2}$$

(15)

Due to the negative voltage across inductor L₁, its current decreases linearly:

$$\Delta I_{L1}=\left(4V_S-\frac{V_O}{2}\right)\times \frac{\left(t_2-t_1\right)}{L_1}=\left(4V_S-\frac{V_O}{2}\right)\frac{\left(1-D\right)}{L_1{f}_s}$$

(16)

According to the volt-second balance for inductor L₁, the following equation is obtained:

$$4V_{S}DT=\left(\frac{V_O}{2}-4V_S\right)\left(1-D\right)T$$

(17)

When diode D₂ is switched on, the following equations are computed:

$$V_{L2}=-V_{C1}=-2V_S$$

(18)

$$\Delta I_{L2}=\frac{-2V_S\left(1-D\right)}{L_{2}f}$$

(19)

Moreover, when diode D₄ is switched on, the following formulas are calculated:

$$V_{L3}=-V_{C2}=-V_S$$

(20)

$$\Delta I_{L3}=\frac{-V_S\left(1-D\right)}{L_3{f}_s}$$

(21)

During this mode, capacitors C₃ and C₄ are connected in parallel:

$$V_{C3}=V_{C4}$$

(22)

3.1.1. Ideal Voltage Gain

The volt-second balance equation for inductor L₃ is calculated as follows.

$${\displaystyle {\int }_0^{DT}{V}_L}dt+{\displaystyle {\int }_{DT}^T{V}_L}dt=0$$

(23)

$$V_{S}DT=V_{C2}(1-D)T$$

(24)

By solving Equation (24) for V_C2, the following equation may be obtained:

$$V_{C2}=\frac{V_{S}D}{1-D}$$

(25)

As the voltage difference between capacitors C₁ and C₂ is equal to the input voltage, the following equation is obtained for V_C1:

$$V_{C1}=\frac{V_S}{1-D}$$

(26)

The volt-second balance equation for inductor L₁ is computed as follows:

$$(V_S+V_{C1}+V_{C2})DT=-(V_S+V_{C1}+V_{C2}-\frac{V_O}{2})(1-D)T$$

(27)

By substituting Equations (25) and (26) with (27), the voltage gain of the proposed converter is calculated as follows:

$$\frac{V_O}{V_S}=\frac{4}{{(1-D)}^2}$$

(28)

3.1.2. Non-Ideal Voltage Gain

In a DC-DC converter, the voltage drop across each of the elements is compared with the output voltage. The inductor winding usually has higher power losses in comparison with other elements. When the converter operates in CCM, the values of filter inductors are higher than DCM condition. Hence, the power losses of inductors are very important in the CCM condition, and losses of other components are usually neglected. The voltage gain of the proposed converter is calculated by considering the losses of inductors L₁, L₂, and L₃ as follows.

$$\eta =\frac{P_O}{P_O+P_{Loss}}$$

(29)

$$P_{Loss}=R_1{I}_{L1}^2+R_2{I}_{L2}^2+R_3{I}_{L3}^2$$

(30)

In the above equations, η is the efficiency, and R₁, R₂, and R₃ are the resistance of inductors L₁, L₂, and L₃, respectively.

$$\eta =\frac{1}{1+\frac{R_1}{R_O}{\left(\frac{I_{L1}}{I_O}\right)}^2+\frac{R_2}{R_O}{\left(\frac{I_{L2}}{I_O}\right)}^2+\frac{R_3}{R_O}{\left(\frac{I_{L3}}{I_O}\right)}^2}$$

(31)

$$\eta =\frac{V_O{I}_O}{V_S{I}_S}\Rightarrow \frac{V_O}{V_S}=\eta \frac{I_S}{I_O}$$

(32)

I_L1, I_L2, and I_L3 are the average values of inductor currents, and they are approximately equal to I_S/5, I_S/2, and 4I_S/3, correspondingly.

$$R_1=1.86R_2=4.33R_3$$

(33)

$$\eta =\frac{1}{1+\frac{R_1}{R_O}{\left(\frac{I_S}{I_O}\right)}^2\left(0.3\right)}$$

(34)

$$\frac{I_S}{I_O}=\frac{4}{\eta {\left(1-D\right)}^2}$$

(35)

$$k=\frac{0.3R_1}{R_O}$$

(36)

$$\eta =\frac{1}{1+k\frac{16}{{\eta }^2{\left(1-D\right)}^4}}$$

(37)

$${\eta }^2{\left(1-D\right)}^4-\eta {\left(1-D\right)}^4+16k=0$$

(38)

$$\eta =\frac{1}{2}+\frac{\sqrt{{\left(1-D\right)}^4-64k}}{2{\left(1-D\right)}^2}$$

(39)

$$\frac{V_O}{V_S}=\frac{2{\left(1-D\right)}^2+2\sqrt{{\left(1-D\right)}^4-64k}}{{\left(1-D\right)}^4}$$

(40)

3.2. DCM Operation

Interval 1 (t₀ − t₁) [see Figure 5a]: In this mode, switch S is on, and inductors L₁, L₂, and L₃ store the energy. This mode is similar to the first mode in the CCM condition. As a result, all equations and expiations are the same as before.

Interval 2 (t₁ − t₂) [see Figure 5b]: This mode starts when switch S is turned off at t₁. Consequently, the energy stored in the inductors is transferred to the output and capacitors C₁ and C₂. In addition, the energy stored in switched capacitors C₃ and C₄ is also transferred to the output. This mode continues until all switched capacitors are fully discharged. Hence, the current passes through the inductors is zero at t₂.

$$V_{L1}=4V_S-\frac{V_O}{2}=L_1\frac{-I_{in}}{D_{x}T}\Rightarrow D_{x}T=L_1\frac{I_{in}}{\frac{V_O}{2}-4V_S}$$

(41)

where D_xT is the duration of this mode.

$$D_{x}T=t_2-t_1$$

(42)

Interval 3 (t₂ − t₃) [see Figure 5c]: This mode starts when I_L1 reaches zero. Since the inductance of L₁ is higher than L₂ and L₃, the current that passes through inductor L₁ is equal to I_in. As a result, when I_L1 = 0, I_L2 and I_L3 also reach zero. In this mode, all the diodes and switch S are off, and the output capacitor supplies the load. To guarantee the accurate operation of the proposed converter in DCM, the duration of mode 3 is called dead time, and it is considered 20% of the period.

$$t_d=t_3-t_2=0.2T$$

(43)

$$D+D_x=0.8T$$

(44)

By applying the volt-second balance principle to inductor L₃, we can obtain the following:

$$V_{S}DT=V_{C2}{D}_{x}T\Rightarrow V_{C2}=\frac{D}{D_x}{V}_S$$

(45)

$$V_{C1}-V_{C2}=V_S\Rightarrow V_{C1}=\frac{D+D_x}{D_x}{V}_S=\frac{0.8}{D_x}{V}_S$$

(46)

By applying the volt-second balance principle to inductor L₁, we obtain

$$\left(V_S+V_{C1}+V_{C2}\right)DT=-\left(V_S+V_{C1}+V_{C2}-\frac{V_O}{2}\right)D_{x}T$$

(47)

$$\frac{V_O}{2}{D}_x^2-D_x{V}_S\left(1.6+D\right)-V_S\left(D^2+0.8D\right)=0$$

(48)

$$D_x=\frac{V_S\left(1.6+D\right)+\sqrt{V_S^2{\left(1.6+D\right)}^2+2V_O{V}_S\left(D^2+0.8D\right)}}{V_O}$$

(49)

By dividing the numerator and denominator of the above equation by V_S, we obtain

$$D_x=\frac{\left(1.6+D\right)+\sqrt{{\left(1.6+D\right)}^2+2G_{DCM}\left(D^2+0.8D\right)}}{G_{DCM}}$$

(50)

Using (41), the following equations can be obtained:

$$D_x=L_1\frac{I_{in}f}{\frac{V_O}{2}-4V_S}$$

(51)

$$I_{in}=\frac{P_O}{V_S}=\frac{V_O^2}{R_O{V}_S}$$

(52)

$$D_x=\frac{L_{1}f}{R_O}\left(\frac{V_O^2}{\left(\frac{V_O}{2}-4V_S\right)V_S}\right)$$

(53)

$${\tau }_{L1}=\frac{L_{1}f}{R_O}$$

(54)

$$D_x=\frac{2{\tau }_{L1}{G}_{DCM}^2}{G_{DCM}-8}$$

(55)

Using (50) and (55), we may obtain

$$\begin{array}{l}2{\tau }_{L1}^2{G}_{DCM}^5-2{\tau }_{L1}\left(1.6+D\right)G_{DCM}^3+\left(-D^2+\left(16\tau -0.8\right)D+25.6\tau \right)G_{DCM}^2\\ +16\left(D^2+0.8D\right)G_{DCM}-64\left(D^2+0.8D\right)=0\end{array}$$

(56)

In solving the recent equation, the voltage gain in DCM is obtained approximately, as follows:

$$G_{DCM}=2+\sqrt{3+\frac{5D^2}{2{\tau }_{L1}}}$$

(57)

In the BCM condition, the inductor current is at the border between DCM and CCM. During BCM operation, the voltage gain in the DCM and CCM conditions is equal. By equalizing (57) and (28), the inductor current constant can be calculated:

$$\frac{4}{{\left(1-D\right)}^2}=2+\sqrt{3+\frac{5D^2}{2{\tau }_{L1}}}$$

(58)

$${\tau }_{BCM,L1}={\tau }_{BL}=\frac{D^2{\left(1-D\right)}^4}{6.4\left(1-{\left(1-D\right)}^2\right)}$$

(59)

Figure 6 shows the inductor current (τ_BL) constant versus the duty cycle (D).

4. Design Considerations and Components’ Selection

The design considerations needed to obtain the values for different components in the proposed converter are presented in this section.

The useful equations and guidelines will be explained in detail; the component values are shown in

Table 1. Component values.

Parameter	Value
Input voltage	12 V
Output voltage	260 V
Switching frequency	100 kHz
Output power	110 W
Capacitors C1, C2, C3, C4	10 µF
Output capacitor CO	20 µF
Inductor L1	650 µH
Inductor L2	350 µH
Inductor L3	150 µH

.

4.1. The Design of Inductors L₁, L₂ and L₃

Equations (60)–(62) express the inductance of L₁, L₂, and L₃, respectively. In (60), ∆I_L1 expresses the peak-to-peak changes in inductor current I_L1. Furthermore, f_S shows the switching frequency of the circuit in these equations. It should be mentioned that inductance values of L₁, L₂, and L₃ are obtained when the switch is turned on:

$$L_1\ge \frac{2D{V}_S}{\Delta I_{L1}\times f_s(1-D)}$$

(60)

In (61), ∆I_L2 expresses the peak-to-peak changes of inductor current I_L2:

$$L_2\ge \frac{D{V}_S}{\Delta I_{L2}\times f_s(1-D)}$$

(61)

In (62), ∆I_L3 expresses the peak-to-peak changes of inductor current I_L3:

$$L_3\ge \frac{D{V}_S}{\Delta I_{L3}\times f_s}$$

(62)

Depending on the converter operation in CCM, the number of inductor current changes should be designed so that the converter always operates in CCM, and does not enter DCM. For this purpose, the number of current changes through input inductors L₁, L₂, and L₃ is equal to 20%, 10%, and 5% of the nominal average current that flows through them, respectively.

4.2. The Design of Capacitors C₁, C₂, C₃, C₄ and the Output Capacitor C_O

According to the converter operation, the capacitances of C₁ and C₂ are equal. Their values are obtained from Equation (63) when the switch is turned off.

$$C_1=C_2\ge \frac{V_O(1-D)}{\Delta V_{C1}\times f_s\times R}$$

(63)

It should be noted that the voltage variations (ΔV_C1 and ΔV_C2) are considered 5% of the nominal average voltage across each capacitor. Furthermore, the capacitances of C₃ and C₄ are equal. According to the output cell, their values are calculated from Equation (64) when the switch is turned on. Besides, ∆V is the voltage change across the capacitors in the following equations:

$$C_3=C_4\ge \frac{P_O\times D}{\Delta V_{C3}\times f_s\times V_O}$$

(64)

Similar to the calculation of capacitors C₁ and C₂, the number of voltage changes (ΔV_C3 and ΔV_C4) is considered 5% of the nominal average voltage across each capacitor. The capacitance of output capacitor C_O is computed as follows.

$$C_o\ge \frac{V_O\times D}{\Delta V_O\times f_s\times R}$$

(65)

4.3. The Current and Voltage Stresses of Switch S

To select the appropriate switches and diodes in the proposed converter, the output power is first considered the main factor in selecting the type of active components. Then, the voltage and current stresses are calculated, and the appropriate diodes and switches are selected. According to the operation modes, the voltage and current stresses of the switch are obtained as follows.

$$V_{SW}=\frac{V_O}{2}$$

(66)

$$I_{SW}=\frac{P_O}{V_S}-I_O(\max )$$

(67)

4.4. The Current and Voltage Stresses of Diodes D₁, D₂, D₃, D₄, D₅, D₆, and D₇

The voltage and current stresses of diode D₁ are calculated as follows:

$$V_{D1}=\frac{V_O}{2}-4V_S$$

(68)

$$I_{D1}=\frac{P_O}{V_S}-(I_{L1}-\frac{\Delta I_{L1}}{2})$$

(69)

The voltage and current stresses of diode D₂ are considered as follows:

$$V_{D2}=4V_S$$

(70)

$$I_{D2}=\frac{P_O}{V_S}-(I_{L2}-\frac{\Delta I_{L2}}{2})$$

(71)

The voltage and current stresses of diode D₃ are measured as follows:

$$V_{D3}=\frac{V_O}{2}+2V_S$$

(72)

$$I_{D3}=\frac{P_O}{V_S}-(I_{L1}-\frac{\Delta I_{L1}}{2})-(I_{L2}-\frac{\Delta I_{L2}}{2})$$

(73)

The voltage and current stresses of diode D₄ are computed as follows:

$$V_{D4}=2V_S$$

(74)

$$I_{D4}=I_{L3}+\frac{\Delta I_{L3}}{2}-I_O$$

(75)

The voltage and current stresses of diode D₅ are calculated as follows:

$$V_{D5}=\frac{V_O}{2}$$

(76)

$$I_{D5}=\frac{I_O}{2}$$

(77)

The voltage and current stresses of diode D₆ are designed as follows:

$$V_{D6}=\frac{V_O}{2}$$

(78)

$$I_{D6}=I_O$$

(79)

The voltage and current stresses of diode D₇ are obtained as follows:

$$V_{D7}=\frac{V_O}{2}$$

(80)

$$I_{D7}=\frac{I_O}{2}$$

(81)

5. Control of the Converter

The experimental control circuit includes four parts, as shown in Figure 7. An output sampler circuit and feedback isolator create the first part, made up of an optocoupler and TL431. A PID compensator and an error amplifier make up the second part. A PWM controller (SG3527 IC) is used for the switch in the third part. To adjust the produced signal in the prior stage, a pulse delay circuit is used in the fourth part. A control circuit is used to stabilize the output voltage when the load changes. This phenomenon is shown in Figure 8.

6. Experimental Results

A 110 W prototype of the proposed switched-inductor switched-capacitor DC-DC converter with a single switch was implemented. The switching frequency was 100 kHz and the voltage gain was 21.6. These value were obtained without using any transformer in the proposed converter. Based on the current and voltage stresses mentioned in the former section, IRFP260 was selected for the switch. Furthermore, STPS16150CT was selected for all diodes in the converter. The voltage and current waveforms for the switch are shown in Figure 9. The voltage and current waveforms of diodes D₁, D₂, D₃, D₄, D₅, D₆, and D₇ are illustrated in Figure 10, Figure 11, Figure 12, Figure 13, Figure 14 and Figure 15, respectively. Furthermore, inductor currents I_L1, I_L2, and I_L3 are presented in Figure 16, Figure 17 and Figure 18, correspondingly. Moreover, input and output voltages are shown in Figure 19.

According to Figure 9, switch S is turned on at t₀, and the sum of I_L1, I_L2, I_L3, and I_D6 flow through it. Since diodes D5 and D7 are forward-biased when the switch is off, the inductor currents do not create voltage spikes across the switch.

Based on the converter operation and Figure 10, diode D₁ is switched on when the switch conducts, and it tolerates the sum of I_L2 and I_L3. Diode D₁ is switched off when the switch is turned off. In this condition, the power transfers from the input source and inductor L₁ through diode D₂.

According to the operation modes, the performance of the even-numbered diodes is opposite to that of the odd-numbered diodes. Based on Figure 11, diode D₂ is switched on when the switch is turned off and the input current flows through it. When the switch is on, diode D₂ is reverse-biased, and the path is created by diode D₁ for transferring the energy to inductor L₁.

The operation of diode D₃ is similar to diode D₁. When the switch is turned on, I_L3 flows through the diode.

The operation of diode D₄ is similar to diode D₂. When the switch is turned off, I_L3 flows through the diode.

Diodes D₅ and D₇ have similar performance. Since they are located on two parallel and symmetric paths, D₅ and D₇ have similar current and voltage stresses. These diodes create the path to transfer the power from all the energy storage elements and the input source to the load.

The operation of diode D₆ is opposite to the operation of diodes D₅ and D₇, and creates the path to charge the switched capacitors C₃ and C₄.

The current ripples of inductors L₁, L₂, and L₃ are calculated and analyzed in theoretical waveforms (Figure 4a). As shown in Figure 16, Figure 17 and Figure 18, the current ripple of inductor L₁ is higher than the current ripple of inductors L₂ and L₃.

7. Performance Comparison

A comparison between the proposed converter and different topologies in terms of voltage gain, switching frequency, and number of components is presented in

Table 2. Comparison between the proposed converter and similar structures.

Ref.	Voltage Gain	Normalized Voltage Stress		Efficiency	Rated Power	Switching Frequency	No. of Components
		Switch	Diode				S	D	L	C
[3]	(3D + 1)/(1 − D)	1/(1 − D)	2/(1 − D)	94.45%	200 W	50 kHz	2	2	3	3
[13]	2(1 − D)/(1 − 3D)	2D/(1 − 3D)	2D/(1 − 3D)	91%	90 W	30 kHz	2	7	2	3
[14]	(5D + 1)/(1 − D)	(G + 1)/4	(G − 1)/8	91.5%	200 W	100 kHz	2	9	4	3
[15]	4/(1 − D)	G/2	G/2	90.73%	100 W	200 kHz	2	6	1	5
[16]	(1 + D)/(1 − D)	G	G	-	50 W	40 kHz	1	4	2	1
[17]	(3D + 1)/(1 − D)	(G + 1)/2	G + 1	94.5%	200 W	50 kHz	2	7	4	1
[18]	(2 − D)/(1 − D)2	1/(1 − D)2	D/(1 − D)2	88%	500 W	50 kHz	1	4	2	3
[19]	(3D + 1)/(1 − D)	G/(3 + D)	2G/(3 + D)	94.3%	200 W	50 kHz	2	3	2	3
Proposed	4/(1 − D)2	G/2	(G/2) + 2	95.4%	110 W	100 kHz	1	7	3	5

. Moreover, the power losses of the proposed converter are presented in

Table 3. Power losses in the proposed converter.

Type of Loss	Formula	Proposed Converter (W)
Switching loss in the main switch (S)	$$\begin{gathered} \left(\frac{1}{2}.\left(V_{in}+V_{C1}\right).I_O.\left(t_{on}+t_{off}\right)+\left(V_{in} \\ +V_{C1}\right).\left(I_O+I_{rr}\right).t_{rr}\right).F_{SW} \end{gathered}$$	0.37
Parasitic capacitance loss in the main switch (S)	$\frac{1}{2}.C_{out}.{\left(V_{in}+V_{C1}\right)}^2.F_{SW}$	0.047
Conduction loss in the main switch (S)	$R_{ds}.F_{SW}.{{\displaystyle \int }}_0^T{I}_S^2 dt$	0.63
Conduction loss in the input cells diodes (D1, D2, D3, and D4)	$I_{ave}.V_F$	0.68
Conduction loss in the output cell diodes (D5, D6, and D7)	$I_{ave}.V_F$	0.64
Loss of inductors	$P_{Loss}=P_{Core}+P_{Copper}$ $P_{Core}=K_1.F_{SW}.B^y.V_e$ $P_{Copper}=P_{dcr}+P_{acr}=$ $(I_{rms1}^2\times DCR)+\left(I_{rms2}^2\times ACR\right)$	2.55
Loss of capacitors	$P_d=ESR\times I_{ave}^2$	0.58
Total losses	-	5.5 W

. The comparison shows the advantages of the converter. A comparison of the voltage gain per duty cycle of the proposed converter with other high-step-up converters is represented in Figure 20.

It is obvious that the total switch count (TSC) is an important factor in designing a converter. In fact, a lower TSC leads to a simpler control circuit. Figure 21 supports that the proposed converter achieves a high voltage gain with a lower TSC. The efficiency curve of the proposed converter under different load conditions is shown in Figure 22. It is clear that the total efficiency of the converter at nominal power is 95.4%. Finally, the power loss distribution at 110 W for the proposed converters is shown in Figure 23.

8. Conclusions

This paper successfully introduces and details a novel high-step-up, non-isolated switched-inductor switched-capacitor DC-DC converter, demonstrating its superior performance in achieving high voltage gain. The simplicity of its design, characterized by a single-switch structure and PWM control, is a game-changer in the realm of DC-DC converters. The proposed converter outperforms other similar structures with respect to several critical factors, including the number of active and passive elements, voltage gain, and switching frequency. As evidenced by the constructed prototype, the converter operates with an input voltage of 12 V, and delivers an output voltage of 260 V, with a switching frequency of 100 kHz and a nominal power of 110 W. Remarkably, this high voltage gain (21.6) is accomplished without the use of any transformer or coupled inductors, setting this non-isolated converter apart from its peers. The findings of this study confidently affirm the proposed converter’s potential for significant applications in the field of renewable energy systems.