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Article

Model Control and Digital Implementation of the Three Phase Interleaved Parallel Bidirectional Buck–Boost Converter for New Energy Electric Vehicles

1
Department of Electrical and Electronic Engineering, Universiti Putra Malaysia, Serdang 43400, Malaysia
2
Advanced Lightning, Power and Energy Research Centre (ALPER), Universiti Putra Malaysia, Serdang 43400, Malaysia
3
Infineon Technologies China Co., Ltd., Xi’an 710077, China
4
School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, China
5
School of Control Science and Engineering, Shandong University, Jinan 250061, China
*
Author to whom correspondence should be addressed.
Energies 2022, 15(19), 7178; https://doi.org/10.3390/en15197178
Submission received: 18 August 2022 / Revised: 25 September 2022 / Accepted: 26 September 2022 / Published: 29 September 2022
(This article belongs to the Special Issue Modeling and Optimization Control of Power Battery)

Abstract

:
In recent years, the imminent environmental problems and increasing attention to the global energy crisis have prompted the need for new opportunities and technologies to meet higher demands for clean and sustainable energy systems. As a result, new energy electric vehicles have been developed to replace fossil fuel cars. Therefore, this paper presents a three-phase interleaved parallel bidirectional buck–boost converter, which is the core factor of electrical energy flow regulation and management between the battery pack and motor drive inverter within the high voltage direct current bus and converts the voltage from two directions. Corresponding circuit topology, mathematical model, and control strategy are analyzed in three operation states: charge buck, discharge boost, and electric energy interaction modes. The digital implementation with double closed loop, power feedforward compensation, and bidirectional switching logic are realized by XDPTM Digital Power Controllers XDPP1100-Q040 of Infineon Technologies AG. Finally, the experimental results of the proposed converter clearly show that it achieves the objectives, namely, the feasibility and practicality of the system.

1. Introduction

As we all know, in today’s world, under the double challenges of global fossil energy depletion and environmental pollution, the most promising access for eliminating these shortcomings is to replace fossil fuel cars with new energy electric vehicles (NEEVs). There are many incentives to support the use of NEEVs because the technology is environmentally friendly and has zero emissions compared to internal combustion engine technology [1,2,3,4]. For decades, consumers, manufacturers, and inventors have been thinking about the idea of electrification of transportation, which requires the development of NEEVs, a promising way to green the transportation system and reduce the problems of climate change [5,6,7,8].
Generally, in [9,10,11], the NEEVs can be divided into the following types according to the power source: battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), photovoltaic electric vehicles (PEVs), fuel cell electric vehicles (FCEVs) and plug-in hybrid electric vehicles (PHEVs).
When the NEEVs are running normally, the bidirectional DC/DC (Bi-DC/DC) converter plays an important role as the core factor of electrical energy flow regulation and management between the battery pack and motor drive inverter within the high voltage direct current bus, and transform voltage from two conversion directions, so that the motor drive system is always working in the optimal rate zone [12,13]. In the process of starting or accelerating, the electrical energy flows forward to ensure the motor inverter drive performance; during braking or decelerating, the electrical energy flows back to effectively recover the excess electrical energy. The performance of the Bi-DC/DC converter determines the power output and cruising range of the NEEVs, which directly has a deep impact on the performance, quality, and user experience [14,15,16].
The NEEVs adopt a Bi-DC/DC converter, which can reduce the power battery pack voltage level, improve the safety of the whole EVs, and cut costs of the battery management system (BMS); the voltage decoupling of the battery pack can input and output the most suitable and stable electrical energy according to the drive motor operating conditions, which is conducive to decrease the volume and weight of the drive motor; in addition, when the drive motor fails, the Bi-DC/DC converter can also effectively block high voltage that may be generated from the direct current bus at the end of three-phase inverter bridge, so as not to be directly introduced into the battery pack to cause potential risks, thereby improving the safety and reliability of the system.
Among the traditional Bi-DC/DC converter, the bidirectional buck–boost (bi-buck–boost) converter is the most widely used in NEEVs. To solve the problems, several new circuit topologies and control strategies have been introduced to improve the performance of the buck–boost converters for NEEVs, some excellent research papers on this topic have been conducted as shown in [17,18,19,20,21,22,23]. In [17], the working of buck–boost converter as a power factor correction controller applicable for battery charging in electric vehicles application, also satisfies the harmonic compliance of source current in accordance with the IEEE519 recommendations. A charger of a three-port structure [18] is realized with level-3 charging capability using a current source converter frontend together with an input filter, a polarity inversion module, and a differentially connected dual inverter drive. Additionally, due to the limited range of a single charge, the charging NEEVS is one major barrier. Thus, this paper [19] analyzed a dual input buck–boost converter (DIBBC) and proposed charging of battery pack by solar PV and DynamicWPT. In [20], a bidirectional multi-level diode-clamped buck–boost converter is proposed, and GaN HEMT switching devices are used to deal with both concerns about low efficiency and power density in the NEEVs application. A series of integrated equalizers based on joint buck–boost and switched-capacitor converters are proposed in [21] for balancing the voltages of series-connected battery packs. All these equalizers realize the any-cells-to-any-cells (AC2AC) equalization mode without increasing the count of MOSFETs and drivers. The work [22] explores the use of dual-carrier switching modulation schemes for the bidirectional buck–boost converters. The buck–boost scheme is utilized as the power converter topology to interface a storage system to a DC-link in electrical vehicles (EVs) and hybrid electric vehicles (HEVs). This paper [23] proposes an input-parallel output-series (IPOS) connected bidirectional buck–boost converter is introduced that can dynamically vary the DC-link voltage of an electric vehicle power train.
From the above literature review, it can be found that the interleaved parallel multiphase identical circuits technology is widely used in low voltage and high current with large power supply occasions, which has more significant advantages than single-phase circuit [24,25]:
  • Each phase circuit only shares part of the power capacity, reducing the voltage and current stress of electronic switch devices.
  • Improve reliability, even if there are problems in one phase circuit, other phase circuits can still work normally.
  • High-efficiency range of the circuit can be widened by switching phase mode under different power levels.
  • Interleaved parallel technology can improve the equivalent switching frequency of the whole system, depress current ripple, and help to reduce the volume and weight of the filter.
In large power applications of the NEEVs, the requirements for power switching devices, rectifier diodes, filter capacitors, energy storage inductors, and other parts (active and passive) are becoming much higher than before, which leads to difficulties in circuit design. Therefore, in order to effectively increase power and reduce voltage and current stress of electronic components, improve the inherent high ripple rate disadvantage of the traditional bi-buck–boost converter, a three-phase interleaved parallel bidirectional buck–boost (TPIPBi-Buck–Boost) converter is analyzed, and designed in this paper, study circuit topology and control strategy, which has very important theoretical research value and broad practical application prospects. In recent years, it is also the hot spot of the energy management system in NEEVs.
The rest of this paper is structured into six sections, Section 2 describes circuit topology, operation states, and equivalent circuit expressions of the TPIPBi-Buck–Boost converter are derived. Thereafter in Section 3, the mathematical model based on AC small signal is obtained. In Section 4, the digital implementation is used by XDPTM Digital Power Controllers XDPP1100-Q040 of Infineon Technologies AG. subsequently, the experimental results are demonstrated in Section 5. Finally, brief conclusions, contributions, and potential applications are summarized accordingly in Section 6.

2. Principal Configuration and Operation State in TPIPBi-Buck–Boost Converter

As shown in Figure 1, the TPIPBi-buck–boost converter, which integrates three same topological structures, V B o o s t is the high-voltage side of the direct current bus, V B u c k is the low-voltage side of the power battery pack, Q 1 to Q 6 are the SiC MOSFETs while D o 1 to D o 6 and C o s s 1 to C o s s 6 are their parasitic anti-parallel diodes and block capacitors, L 1 to L 3 is the energy storage inductors, R 1 to R 2 and C 1 to C 2 are the load resistors and filter capacitors of input and output, respectively. Q 1 , Q 2 , Q 3 , Q 4 , Q 5 , and Q 6 are connected in series on three-phase inverter bridge, the upper and lower power switches adopt pulse width modulation (PWM) phase shift interleaved complementary control method, and the phase angle of the drive signal differs by 2π/3 = 120° in turn (regardless of dead time).
Based on the above analysis, the TPIPBi-Buck–Boost converter has three operating modes:
  • Charge buck mode, the battery pack stores the feedback electric energy from the motor drive inverter in the direct current bus through the boost–buck converter.
  • Discharge boost mode, the battery pack release the inner electric energy for direct current bus through the buck–boost converter to maintain voltage stability.
  • Electric energy interaction mode, when the EVs run normally, transmit and exchange bidirectional electric energy in real time between the power battery pack and direct current bus, so that the buck and boost mode can always switch quickly to prevent overcharge or over-discharge of the battery pack.
In order to clarify the operation modes of the TPIPBi-Buck–Boost converter, the battery pack is equivalent to the direct current power supply, and its internal resistance and voltage equalization between single modules are ignored. Some assumptions are summarized as follows:
  • The electrical components and parameters of each phase circuit are the same, and the circulating current loss is not considered.
  • The switch drive signal of each phase shift circuit is strictly conducted, and the phase-to-phase current is equal without offset.
  • The converter is in a stable state, and the inductance works in continuous conduction mode (CCM), regardless of non-ideal saturation conditions.

2.1. Charge Buck Mode of TPIPBi-Buck–Boost Converter

The switching cycle of the TPIPBi-Buck–Boost converter in charge buck mode can be dived into eight stages, corresponding to the eight equivalent circuits shown in Figure 2. The operation stages are described as follows:
Stage 1 (Figure 2a): Q 1 , Q 3 , and Q 5 are turned off, at the same time, D o 2 , D o 4 , and D o 6 conduct naturally, while high voltage side V B o o s t stores L 1 , L 2 and L 3 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 2 (Figure 2b): Q 1 turn on, Q 3 and Q 5 are turned off, at the same time, D o 4 and D o 6 conduct naturally, D o 2 is off, while high voltage side V B o o s t stores L 1 together with L 2 and L 3 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B o o s t V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 3 (Figure 2c): Q 3 turn on, Q 1 and Q 5 are turned off, at the same time, D o 2 and D o 6 conduct naturally, D o 4 is off, while high voltage side V B o o s t stores L 2 together with L 1 and L 3 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B o o s t V B u c k L 3 d i L 3 d t = V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 4 (Figure 2d): Q 5 turn on, Q 1 and Q 3 are turned off, at the same time, D o 2 and D o 4 conduct naturally, D o 6 is off, while high voltage side V B o o s t stores L 3 together with L 1 and L 2 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B o o s t V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 5 (Figure 2e): Q 1 and Q 3 turn on, Q 5 is turned off, at the same time, D o 6 conducts naturally, D o 2 and D o 4 are off, while high voltage side V B o o s t stores L 1 and L 2 together with L 3 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B o o s t V B u c k L 2 d i L 2 d t = V B o o s t V B u c k L 3 d i L 3 d t = V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 6 (Figure 2f): Q 1 and Q 5 turn on, Q 3 is turned off, at the same time, D o 4 conducts naturally, D o 2 and D o 6 are off, while high voltage side V B o o s t stores L 1 and L 3 together with L 2 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B o o s t V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B o o s t V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 7 (Figure 2g): Q 3 and Q 5 turn on, Q 1 is turned off, at the same time, D o 2 conducts naturally, D o 4 and D o 6 are off, while high voltage side V B o o s t stores L 2 and L 3 together with L 1 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B o o s t V B u c k L 3 d i L 3 d t = V B o o s t V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
Stage 8 (Figure 2h): Q 1 , Q 3 and Q 5 turn on, at the same time, D o 2 , D o 4 and D o 6 are off, while high voltage side V B o o s t stores L 1 , L 2 and L 3 are transmitting electrical energy to the low voltage side V B u c k . The voltage drops of the L 1 to L 3 and current of the C 2 are given as follows:
L 1 d i L 1 d t = V B o o s t V B u c k L 2 d i L 2 d t = V B o o s t V B u c k L 3 d i L 3 d t = V B o o s t V B u c k C 2 d V B u c k d t = i L 1 + i L 2 + i L 3 V B u c k R 2
The key waveforms of the charge buck mode of TPIPBi-Buck–Boost converter are shown in Figure 3. In each switching cycle, Table 1 depicts that they can be divided into three cases:

2.2. Discharge Boost Mode of TPIPBi-Buck–Boost Converter

The switching cycle in discharge boost mode of the TPIPBi-Buck–Boost converter can be divided into eight stages in a similar way, corresponding to the eight equivalent circuits shown in Figure 4. The operation stages are also described as follows:
Stage 1 (Figure 4a): Q 2 , Q 4 and Q 6 are turned off, at the same time, D o 1 , D o 3 and D o 5 conduct naturally, while low voltage side V B u c k stores L 1 , L 2 and L 3 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k V B o o s t L 2 d i L 2 d t = V B u c k V B o o s t L 3 d i L 3 d t = V B u c k V B o o s t C 1 d V B o o s t d t = i L 1 + i L 2 + i L 3 V B o o s t R 1
Stage 2 (Figure 4b): Q 2 turn on, Q 4 and Q 6 are turned off, at the same time, D o 3 and D o 5 conduct naturally, D o 1 is off, while low voltage side V B u c k stores L 1 together with L 2 and L 3 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k V B o o s t L 3 d i L 3 d t = V B u c k V B o o s t C 1 d V B o o s t d t = i L 2 + i L 3 V B o o s t R 1
Stage 3 (Figure 4c): Q 4 turn on, Q 2 and Q 6 are turned off, at the same time, D o 1 and D o 5 conduct naturally, D o 3 is off, while low voltage side V B u c k stores L 2 together with L 1 and L 3 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k V B o o s t L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k V B o o s t C 1 d V B o o s t d t = i L 1 + i L 3 V B o o s t R 1
Stage 4 (Figure 4d): Q 6 turn on, Q 2 and Q 4 are turned off, at the same time, D o 1 and D o 3 conduct naturally, D o 5 is off, while low voltage side V B u c k stores L 3 together with L 1 and L 2 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k V B o o s t L 2 d i L 2 d t = V B u c k V B o o s t L 3 d i L 3 d t = V B u c k C 1 d V B o o s t d t = i L 1 + i L 2 V B o o s t R 2
Stage 5 (Figure 4e): Q 2 and Q 4 turn on, Q 6 is turned off, at the same time, D o 5 conducts naturally, D o 1 and D o 3 are off, while low voltage side V B u c k stores L 1 and L 2 together with L 3 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k V B o o s t C 1 d V B o o s t d t = i L 3 V B o o s t R 1
Stage 6 (Figure 4f): Q 2 and Q 6 turn on, Q 4 is turned off, at the same time, D o 3 conducts naturally, D o 1 and D o 5 are off, while low voltage side V B u c k stores L 1 and L 3 together with L 2 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k V B o o s t L 3 d i L 3 d t = V B u c k C 1 d V B o o s t d t = i L 2 V B o o s t R 1
Stage 7 (Figure 4g): Q 4 and Q 6 turn on, Q 2 is turned off, at the same time, D o 1 conducts naturally, D o 3 and D o 5 are off, while low voltage side V B u c k stores L 2 and L 3 together with L 1 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k V B o o s t L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k C 1 d V B o o s t d t = i L 1 V B o o s t R 1
Stage 8 (Figure 4h): Q 2 , Q 4 and Q 6 turn on, at the same time, D o 1 , D o 3 and D o 5 are off, while low voltage side V B u c k stores L 1 , L 2 and L 3 are transmitting electrical energy to the high voltage side V B o o s t . The voltage drops of the L 1 to L 3 and current of the C 1 are given as follows:
L 1 d i L 1 d t = V B u c k L 2 d i L 2 d t = V B u c k L 3 d i L 3 d t = V B u c k C 1 d V B o o s t d t = V B o o s t R 1
The key waveforms of the charge buck mode of TPIPBi-Buck–Boost converter are shown in Figure 5. In each switching cycle, Table 2 depicts that they can be divided into three cases:

2.3. Electrical Energy Interaction Mode

The previous theoretical analysis proves that the TPIPBi-Buck–Boost converter not only achieves charge buck and discharge boost mode, but also has the ability of real-time bidirectional electrical energy exchange when the entire system is working properly.
As shown in Figure 6, in the electrical energy interaction mode, when the EVs run normally, the battery pack and direct current bus transmit real-time bidirectional electrical energy exchange, so that the TPIPBi-Buck–Boost converter can switch between charge buck mode and discharge boost mode quickly, smoothly and flexibly, to prevent overcharge or overdischarge of the battery pack. In addition, this electrical energy interaction mode is not fundamentally different from the working conditions of Buck and Boost conversion of normal circuits. The drive angle of the power switches Q 1 to Q 6 are phase-shifted by 120° and independent of each other, which avoids the discontinuous current conduction of the energy storage inductors L 1 to L 3 when the light load, poor current stability, and large instantaneous inrush current when the modes are switching. In this mode, regardless of whether charge buck mode and discharge boost mode is implemented, the duty cycle of Q 1 , Q 2 , Q 3 , or Q 4 , Q 5 , Q 6 are correspondingly close to 0. Both the low voltage side V B u c k and high voltage side V B o o s t of the TPIPBi-Buck–Boost converter is kept constant and energy exchange is realized, to hold the voltage stability of the battery pack and the direct current bus in all circumstances.

3. Mathematical Model of TPIPBi-Buck–Boost Converter

The TPIPBi-Buck–Boost converter is a nonlinear, strongly coupled multivariable system, and it is necessary to solve mathematical equations to obtain the relationship among variables in the circuits [26,27].
Section 3 puts forward the AC small signal equivalent circuit model based on the non-ideal electronic components and supplies by using the basic modeling method for the proposed TPIPBi-Buck–Boost converter in Section 2. The transfer functions of voltage and current double closed control loop in charge buck and discharge boost mode are viewed, which lay the foundations for the digital control strategy in Section 4. In a modeled and analyzed process, the TPIPBi-Buck–Boost converter in CCM is to reduce the voltage and current ripple because of increasing the power.

3.1. Charge Buck Mode Based on AC Small Signal Analysis

In the charge buck mode of the TPIPBi-Buck–Boost converter, Q 1 , Q 3 and Q 5 turn on, the voltage drops of the L 1 to L 3 are given as follows:
v L 1 t = L 1 d i L 1 t d t = v B o o s t t v B u c k t v L 2 t = L 2 d i L 2 t d t = v B o o s t t v B u c k t v L 3 t = L 3 d i L 2 t d t = v B o o s t t v B u c k t
Q 1 , Q 3 and Q 5 are turned off, the voltage drops of the L 1 to L 3 are given as follows:
v L 1 t = L 2 d i L 2 d t = v B u c k t v L 2 t = L 2 d i L 2 d t = v B u c k t v L 1 t = L 2 d i L 2 d t = v B u c k t
In order to eliminate the influence of switching ripple, when the TPIPBi-Buck–Boost converter needs to satisfy the small ripple assumption f t f s and the low frequency assumption f g f s (turnover frequency f t , switching frequency f s , and AC small signal frequency f g ), the input voltage v B o o s t t and the output voltage v B u c k t are continuous and change little in one switching cycle T s , so they can be approximately equivalent to the average value, namely:
v B o o s t t v B o o s t t T s v B u c k t v B u c k t T s
According to Equations (17) and (18), the average voltages of the L 1 to L 3 in T s are, respectively:
v L 1 t T s = 1 T s 0 d 1 T s v L 1 t d t + d 1 T s T s v L 1 t d t = d 1 v B o o s t t T s v B u c k t T s v L 2 t T s = 1 T s 0 d 3 T s v L 2 t d t + d 3 T s T s v L 2 t d t = d 3 v B o o s t t T s v B u c k t T s v L 3 t T s = 1 T s 0 d 5 T s v L 3 t d t + d 5 T s T s v L 3 t d t = d 5 v B o o s t t T s v B u c k t T s
Averaging characteristic of the energy storage inductors L 1 to L 3 :
v L 1 t T s = L 1 d i L 1 t T s d t v L 2 t T s = L 2 d i L 2 t T s d t v L 3 t T s = L 3 d i L 3 t T s d t
Substituting (21) into (20) yields:
L 1 d i L 1 t T s d t = d 1 v B o o s t t T s v B u c k t T s L 2 d i L 1 t T s d t = d 3 v B o o s t t T s v B u c k t T s L 3 d i L 1 t T s d t = d 5 v B o o s t t T s v B u c k t T s
where d i = 1 d i i = 1 , 3 , 5 , according to Kirchhoff’s Law, the average current of the capacitor C 2 in T s is:
i C 2 t T s = C 2 d v B o o s t t T s d t = d 1 i L 1 t T s + d 3 i L 2 t T s + d 5 i L 3 t T s v B u c k t T s R 2
So far, the relationship between the voltage and current of the TPIPBi- Buck–Boost converter in charge buck mode has been established, but Equations (22) and (23) are a set of nonlinear equations, and each variable contains direct current and low frequency small signal components. An approximate analytical method can be used to solve the nonlinear equations, that is, to find the static operating point and perform linearization processing to separate the direct current component and the AC small signal component. In order to ensure that the linearization of the TPIPBi-Buck–Boost converter at the static operating point does not cause large errors, the small signal assumption must be satisfied:
x ^ t X t x t x t T s
where x ^ t is the AC component magnitude of each variable, X is the corresponding direct current component. For the average x t T s of x t in T s , it can be decomposed into the sum of the direct current component X and the AC small signal component x ^ t , that is
x t T s = X + x ^ t
Thus, the assumption is
v B u c k t T s = V B u c k + v ^ B u c k t v B o o s t t T s = V B o o s t + v ^ B o o s t t i L 1 t T s = I L 3 + i ^ L 1 t i L 2 t T s = I L 3 + i ^ L 2 t i L 3 t T s = I L 3 + i ^ L 3 t
Substituting (26) into (22) yields:
L 1 d I L 1 + i ^ L 1 t d t = D 1 + d ^ 1 t V B o o s t + v ^ B o o s t t V B u c k v ^ B u c k t L 2 d I L 2 + i ^ L 2 t d t = D 3 + d ^ 3 t V B o o s t + v ^ B o o s t t V B u c k v ^ B u c k t L 3 d I L 3 + i ^ L 3 t d t = D 5 + d ^ 5 t V B o o s t + v ^ B o o s t t V B u c k v ^ B u c k t
Finishing Equation (27), and can be obtained by ignoring the second order minute term:
L 1 d i ^ L 1 t d t = D 1 v ^ B o o s t t + V B o o s t d ^ 1 t v ^ B u c k t L 2 d i ^ L 2 t d t = D 3 v ^ B o o s t t + V B o o s t d ^ 3 t v ^ B u c k t L 3 d i ^ L 3 t d t = D 5 v ^ B o o s t t + V B o o s t d ^ 5 t v ^ B u c k t
Similarly, substituting (26) into (23) yields:
C 2 d V B u c k t d t = d 1 i ^ L 1 t I L 1 d ^ 1 t + d 3 i ^ L 2 t I L 2 d ^ 3 t + d 5 i ^ L 3 t I L 3 d ^ 5 t v ^ B o o s t t R 1
According to Equations (28) and (29), the AC small signal equivalent circuit model of the TPIPBi-Buck–Boost Converter in charge buck mode can be established, as illustrated in Figure 7.
If the TPIPBi-Buck–Boost converter is in ideal conditions, the three-phase circuit parameters are completely consistent:
L 1 = L 2 = L 3 = L I L 1 = I L 1 = I L 1 = I L d 1 = d 2 = d 3 = d
The frequency domain equation after Laplace transform of Equations (28) and (29) is:
L s i ^ L s = D v ^ B o o s t s + V B o o s t d ^ s v ^ B u c k s C s v ^ B u c k s = 3 i ^ L s v ^ B u c k s R 2
To calculate the AC small signal equivalent circuit model of the TPIPBi-Buck–Boost converter in charge buck mode, to control the low voltage side V B u c k , make v ^ B o o s t s = 0 , and substitute into Equation (31), and the controlled G i d s of the current inner loop can be obtained through a series of simplified calculations, that is, the transfer function from d s to i L s is
G i d s = i ^ L s d ^ s v ^ B o o s t s = 0 = V B o o s t C 2 s + V B o o s t R 2 L C 2 s 2 + L s R 2 + 3
The transfer function from d s to V B o o s t s is
V ^ B u c k s d ^ s v ^ B o o s t s = 0 = 3 V B o o s t L C s 2 + L s R 2 + 3
The voltage loop controlled G v i s , that is, the transfer function from i L s to V B o o s t s is
G v i s = v ^ B u c k s i ^ L s v ^ B o o s t s = 0 = v ^ B u c k s d ^ s v ^ B o o s t s = 0 d ^ s i ^ L s v ^ B o o s t s = 0 = 3 C 2 s + 1 R 2

3.2. Discharge Boost Mode Based on AC Small Signal Analysis

From the modeling of charge buck mode in the previous section, it can be seen that there is a dual relationship between charge buck mode and discharge boost mode of TPIPBi-Buck–Boost Converter. Similarly, in discharge boost mode, Q 2 , Q 4 and Q 5 turn on, the voltage drops of the L 1 to L 3 are given as follows:
v L 1 t = L 1 d i L 1 d t = v B u c k t v L 2 t = L 2 d i L 2 d t = v B u c k t v L 3 t = L 3 d i L 3 d t = v B u c k t
Q 2 , Q 4 and Q 6 are turned off, the voltage drops of the L 1 to L 3 are given as follows:
v L 1 t = L 1 d i L 2 d t = v B u c k t v B o o s t t v L 2 t = L 2 d i L 2 d t = v B u c k t v B o o s t t v L 3 t = L 3 d i L 2 d t = v B u c k t v B o o s t t
According to Equations (35) and (36), the average voltages of the L 1 to L 3 in T s are, respectively:
v L 1 t T s = 1 T s 0 d 2 T s v L 1 t d t + d 2 T s T s v L 1 t d t = v B u c k t T s 1 d 2 v B o o s t t T s v L 2 t T s = 1 T s 0 d 4 T s v L 2 t d t + d 4 T s T s v L 2 t d t = v B u c k t T s 1 d 4 v B o o s t t T s v L 3 t T s = 1 T s 0 d 6 T s v L 3 t d t + d 6 T s T s v L 3 t d t = v B u c k t T s 1 d 6 v B o o s t t T s
After averaging the inductance characteristic:
v L 1 t T s = L 1 d i L 1 t T s d t v L 2 t T s = L 2 d i L 2 t T s d t v L 3 t T s = L 3 d i L 3 t T s d t
Substituting (38) into (37) yields:
L 1 d i L 1 t T s d t = v B o o s t t T s d 2 v B u c k t T s L 1 d i L 2 t T s d t = v B o o s t t T s d 4 v B u c k t T s L 1 d i L 3 t T s d t = v B o o s t t T s d 6 v B u c k t T s
where d i = 1 d i i = 2 ,   4 ,   6 , according to Kirchhoff’s Law, the average current of the capacitor C 1 in T s is:
i C 1 t T s = C 1 d v B o o s t t T s d t = d 2 i L 1 t T s + d 4 i L 2 t T s + d 6 i L 3 t T s v B o o s t t T s R 1
Substituting (26) into (39) yields:
L 1 d I L 1 + i ^ L 1 t d t = V B u c k + v ^ B u c k t d 2 d ^ 2 t V B o o s t + v ^ B o o s t t L 2 d I L 2 + i ^ L 2 t d t = V B u c k + v ^ B u c k t d 4 d ^ 4 t V B o o s t + v ^ B o o s t t L 3 d I L 3 + i ^ L 3 t d t = V B u c k + v ^ B u c k t d 6 d ^ 6 t V B o o s t + v ^ B o o s t t
Finishing Equation (41), and can be obtained by ignoring the second order minute term:
L 1 d i ^ L 1 t d t = v ^ B u c k t + d 2 v ^ B o o s t t + V B o o s t d ^ 2 t L 2 d i ^ L 2 t d t = v ^ B u c k t + d 4 v ^ B o o s t t + V B o o s t d ^ 4 t L 3 d i ^ L 3 t d t = v ^ B u c k t + d 6 v ^ B o o s t t + V B o o s t d ^ 6 t
Similarly, substitute (26) into (40) yields:
C 2 d v B o o s t t d t = d 2 i ^ L 1 t I L 1 d ^ 2 t + d 4 i ^ L 2 t I L 2 d ^ 4 t + d 6 i ^ L 3 t I L 3 d ^ 6 t v ^ B o o s t t R 1
According to Equations (42) and (43), the AC small signal equivalent circuit model of the TPIPBi-Buck–Boost Converter in discharge boost mode can be established, as illustrated in the Figure 8.
If the TPIPBi-Buck–Boost converter is in ideal conditions, the three-phase circuit parameters are completely consistent:
L 1 = L 2 = L 3 = L I L 1 = I L 1 = I L 1 = I L d 2 = d 4 = d 6 = d
The frequency domain equation after Laplace transform of Equations (42) and (43) are:
L s i ^ L s = v ^ B u c k s D v ^ B o o s t s V B o o s t d ^ s C s v ^ B o o s t s = 3 D i ^ L s 3 I L d ^ s v ^ B o o s t s R 1
To calculate the AC small signal equivalent circuit model of the TPIPBi-Buck–Boost converter in discharge buck mode, to control the high voltage side V B o o s t make v ^ B u c k s = 0 , and substitute into Equations (45), and the controlled G i d s of the current inner loop can be obtained through a series of simplified calculations, that is, the transfer function from d s to i L s is
G i d s = i ^ L s d ^ s v ^ B u c k = 0 = V B o o s t C 1 s + 2 V B o o s t R 1 L C 1 s 2 + L s R 1 + 3 D 2
The transfer function from V B o o s t s to d s is
v ^ B o o s t s d ^ s v ^ B u c k = 0 = 3 D L s R D L C 1 s 2 + L s R 1 + 3 D 2
The voltage loop controlled G v i s , that is, the transfer function from i L s to V B o o s t s is
G v i s = v ^ B o o s t s i ^ L s v ^ B u c k = 0 = v ^ B o o s t s d ^ s v ^ B u c k = 0 d ^ s i ^ L s v ^ B u c k = 0 = 3 D 2 R 1 L s C 1 R 1 D s + 2 D

4. Digital Implementation for TPIPBi-Buck–Boost Converter with Infineon

The analysis and design of the control method determine the performance of the TPIPBi-Buck–Boost converter, which is the focus and difficulty of the whole system. In order to improve the stability and dynamic response of the new energy electric vehicles (NEEVs), Section 4 will combine the open loop derivation results based on the AC small signal model in Section 3, and purposefully carry out the optimal design of the double closed-loop control system with XDPTM Digital Power Controllers by Infineon Technologies AG, which also provides an important theoretical basis for the concrete realization methods of hardware and software [28,29,30].

4.1. Analysis and Design of Double Closed-Loop Control System

According to the actual application requirements, in the process of frequent starting, acceleration, deceleration, and braking of the drive motor, the voltage, and current of the direct current bus are constantly changing in a wide range. For the TPIPBi-Buck–Boost converter with different power flow directions, the transfer functions are also very different, and stable and accurate control is relatively difficult.
In view of the specific requirements of the above problems, a double closed-loop control strategy is considered in Figure 9, in which the voltage loop is used as the outer loop and the current loop as the inner loop, which not only enhances the system stability, but also improves the dynamic response. Analyzing the TPIPBi-Buck–Boost converter circuit topology, low voltage side V B u c k and high voltage side V B o o s t , a novel control strategy is adopted to place the controlled voltage and current at different sides, it not only achieves that the direct current bus voltage is controlled in the forward direction, and the reverse charging current of the battery pack is well controlled.
In the digital signal control system, the direct bus voltage and the energy storage inductor current are simultaneously sampled in one sampling period, converted into digital signals by A/D, digitally filtered, and subtracted from the corresponding offset to obtain the digital signal. The high side voltage terminal command is given by the Infineon XDPP1100-Q040, and compared with the voltage sampling value to obtain the voltage error signal, the output value obtains the current given signal through the PID regulator, and the current given signal is compared with the current sampling value to obtain the current error signal, the output value of the PWM register is output through the PID regulator, so as to achieve the purpose of controlling the high side voltage output and low side current.
Where G u s is the voltage loop correction network transfer function, G i s is the current loop correction network transfer function, e τ s is the delay caused by digital sampling, calculation and update of the duty cycle, G i d s is the transfer function of duty cycle d ^ to the inductive current, G v d s is the transfer function of duty cycle d ^ to the input and output voltage, H u s is the transfer function for voltage sampling.

4.2. Current Inner Loop Compensation Controller

In Figure 10, the current inner loop is designed with a PI controller. Since the delay segment does not change the system gain, only changes the phase, and is not considered, for the time being, the open loop transfer function of the current inner loop can be expressed as
G i o s = V ^ B u c k s d 2 s K i p s + K i i s V B o o s t C 2 s + V B o o s t R 2 L C 2 s 2 + L s R 2 + 3
The closed-loop transfer function of the current inner loop:
G i s = K K i p s + K i i V B o o s t C 2 s + V B o o s t R 2 K 1 s 3 + K 2 s 2 + K 3 s 1 + K 4 s 0
where K = V ^ B u c k d 2 , K 1 = C 2 L d 2 , K 2 = L R 2 d 2 + K i p C 2 , K 3 = K i i C 2 + 2 K i p R 2 + 1 , K 3 = 2 K i p R 2 .
From the analysis of Equation (50), it can be known that K 1 is much smaller than the other coefficients and the s 3 is negligible:
K i p s + K i i V B o o s t C 2 s + V B o o s t R 2 = K 1 s 3 + K 2 s 2 + K 3 s 1 + K 4 s 0
Therefore, G i o p e n _ l o o p s K in Equation (50), the current inner loop is equivalent to a proportional segment, which further verifies the correctness of the previous Bode diagram analysis conclusion. In the system, the delay segment can be equivalent to a first-order inertial segment, and the influence of the pole can be offset by the PI parameter of the current inner loop.

4.3. Voltage Outer Loop Compensation Controller

For the TPIPBi-Buck–Boost converter with insufficient phase and amplitude margins in open loop state, and the right half plane zero-point problem, it needs to be corrected accordingly. The double pole and double zero compensation network are usually selected to achieve closed-loop control to meet the stability requirements.
In digital power supply, PID correction is usually chosen, which is essentially an active lag-ahead correction whose transfer function can be expressed as:
G p i d s = K p 1 + 1 τ i + τ i 1 + τ d N s = K 1 K 2 s 2 + K 3 s 1 + s 0 s K 4 s + 1
where K 1 = K p τ i , K 2 = τ i τ d 1 + 1 N , K 3 = τ i + τ d N , K 4 = τ d N , τ i and τ d are, respectively, integral and differential time constants, N 10 .
In the Figure 11, G i s is a closed-loop transfer function of the current inner loop, and G i s can be equivalent to a proportional segment, which makes it relatively convenient to design the voltage outer loop compensator.

4.4. Power Feedforward Compensation Controller

Under the complex conditions of the NEEVs, if the power demand and load current of the drive motor suddenly drop, causing the system to provide more electrical energy than needed, and the filter capacitor on the direct current bus voltage side is charged to absorb excess energy. The direct current bus voltage fluctuates during the frequent charging and discharging process. In general, increasing the filter capacitor capacity, but enlarges the volume and cost of the system virtually. Aiming at the problem of insufficient voltage fluctuation and dynamic response under transient response, a power feedforward control strategy is adopted in this paper to predict the power demand trend through the electromagnetic torque of the drive motor, and eliminate voltage fluctuation, which is easy to be realized in digital control systems.
By adding an input voltage compensation segment to the system, the transient response speed caused can be increased by the input disturbance. The control block diagram is shown in Figure 12.
P e = 2 π γ T e n 60
P e is the electromagnetic power of the permanent magnet synchronous motor, γ , T e , n are, respectively, power factor, electromagnetic torque, and speed.
The electromagnetic power P e of the drive motor can be calculated by using Equation (53). When the operating condition of NEEVs, Infineon XDPP1100-Q040 issues a torque instruction through the CAN bus and subtract with the P e . The result is divided from the bus voltage instruction, and the current instruction value i 2 is obtained. The output i 1 of the voltage compensation controller is added as the given instruction of the current inner loop. It allows the system to adjust the output electrical energy depending on the instruction value given by the electromagnetic power even if the voltage is still constant. Thus, the purpose of eliminating direct current bus voltage fluctuation caused by electrical energy change is achieved.
For the compensation of input voltage disturbance u i , it should satisfy:
G v u s = K u G u s G i s G v d s
Derived from Equations (4)–(6), when K u = G v u s G u s G i s G v d s , thus, u ^ o s u ^ i s = 0 , theoretically, the disturbance of the output voltage is completely unaffected by the input voltage disturbance u i .

4.5. Bidirectional Switching Logic Controller

When the TPIPBi-Buck–Boost converter is in discharge boost mode, the direct current bus voltage V b u s is collected to form the voltage outer loop, and after comparing with V b u s _ r e f , i L _ b o o s t _ r e f of the current inner loop is generated through the voltage outer loop compensator, comparing with i L _ b o o s t , and the final duty cycle d b u c k b o o s t is produced by the current inner loop compensator. In the charge buck mode, the battery pack voltage V b a t t e r y is collected to form the voltage outer loop, and after comparing with V b a t t e r y _ r e f , i L _ b u c k _ r e f of the current inner loop is generated through the voltage outer loop compensator, comparing with i L _ b u c k , and the final duty cycle d b o o s t b u c k is produced by the current inner loop compensator. The driving signal is output through the Infineon Technologies AG Digital Power Controllers XDPP1100-Q040 to change the operating state. To reduce voltage and current surges, the TPIPBi-Buck–Boost converter works by soft start in electric energy interaction mode (seen in Figure 13).

5. Experimental Results

To further verify the proposed circuit topologies and control strategy given in the previous sections, a prototype of TPIPBi-Buck–Boost converter was built and tested in Infineon laboratory. Figure 14, Figure 15 and Figure 16 show the experimental waveforms, and then Infineon Technologies AG Digital Power Controllers XDPP1100-Q040 support full digital implementation. The TPIPBi-Buck–Boost converter has several operating modes and stages, charge buck mode, discharge boost mode, and electric energy interaction mode. The input voltage was supplied from the battery pack, and the converter output was accessed by the DC electronic load. In addition, for the sake of simplicity, only some typical experimental results are selected.
Figure 14a shows the start-up transients, it can be seen that the system has extremely high stability, fast dynamic response, and almost no overshoot of the output voltage. Figure 14b presents the experiment waveforms of Q 2 drive pulse signal ( 2 : V GS 2 ), voltage across ( 1 : V DS 2 ) in discharge boost mode, and Q 3 drive pulse signal ( 4 : V GS 3 ), voltage across ( 3 : V DS 3 ) in charge buck mode. There are no significant voltage spikes on the power switches Q 2 and Q 3 , which signify the ZVS turn on completely before the drain to source voltage decreases above zero and turn off at an exceptionally low current. Therefore, the high frequency switching losses become negligible. All thanks to the Infineon’s CoolSiCTM MOSFETs and EiceDRIVERTM Gate Driver ICs are built on a state-of-the-art trench semiconductor process optimized to allow for both the lowest losses in the application and the highest reliability in operation: part count reduction, improved efficiency, space, and weight savings [31,32,33].
Figure 15 gives the dynamic test results, in the proposed converter, due to the double closed-loop control system, voltage outer loop and current inner loop compensation controller can keep the output voltage and current stable, so as to achieve the power balance of the system.
To verify the correctness of the power feedforward compensation controller, now through the load characteristic change experiment, increase and decrease the input voltage, respectively, and observe the change in the output voltage and the response speed. Figure 16 show the V OUT , I OUT response of start-up and close-down, and the output voltage fluctuates within a small range. After a short period of adjustment, the output voltage remains unchanged and reaches a stable state again, which almost becomes a step response, which further proves the feasibility of the control system.
In the full load range, Figure 17 presents the output periodic and random deviation (PARD) ripple is within 20 mV, it helps meet the EMC requirements of NEEVS.
The efficiency curve of the system with different current levels is shown in Figure 18. The experimental result is obtained from Power Analyzer YOKOGAWA WT1800. The overall efficiency of the converter is ideal, and peak efficiency can reach nearly 98%.

6. Conclusions

In recent years, the consumption of conventional energy sources has increased dramatically. Due to rising fuel costs and environmental concerns, governments around the world have formulated a series of policies such as strategic planning, technology research and market supervision to promote process of low carbon automobiles, and support the development of the NEEVs industry, the time for the final withdrawal of petrol-powered vehicles from the market is approaching. The NEEVs have important economic and social value in alleviating the energy crisis, save energy, reduce emissions, and promote the development and upgrade of the clean energy industry.
In this paper, the TPIPBi-Buck–Boost converter is proposed and analyzed for new energy electric vehicles applications, which is the core factor of electrical energy flow regulation and management between the battery pack and motor drive inverter within the high voltage direct current bus and convert the voltage from two directions. In the process of starting or accelerating, the electrical energy flows forward to ensure the motor inverter drive performance; during braking or decelerating, the electrical energy flows in reverse to effectively recover the excess electrical energy. The voltage decoupling of battery pack can input and output the most suitable and stable electrical energy according to the drive motor operating conditions. In addition, when the drive motor fails, the TPIPBi-Buck–Boost converter can also effectively block high voltage that may be generated from direct current bus at the end of three phase inverter bridge, so as not to be directly introduced into the battery pack to cause potential risks, thereby improving the safety and reliability of the NEEVs.
The principal configuration and operating states of the converter are determined, and the characteristic waveforms are shown in charge buck, discharge boost, and electric energy interaction modes. The mathematical model based on AC small signal is presented and provides theoretical fundaments of the digital implementation in double closed-loop control system, current inner loop compensation controller, voltage outer loop compensation controller, power feedforward compensation controller and power feedforward compensation controller. The XDPTM Digital Power Controllers XDPP1100-Q040 of Infineon Technologies AG is a highly integrated and fully programmable controller offering optimized solutions, which features optimized power processing blocks and pre-programmed peripherals to enhance the performance of the converter, reduce external components and minimize firmware development effort. The performance of the converter in steady-state and during mode transition is verified by a hardware prototype in laboratory. Therefore, it is foreseeable that this paper could assist with the energy storage management applications of NEEVs.

Author Contributions

Conceptualization, C.Z. and B.X.; methodology, C.Z.; software, C.Z.; validation, B.X.; formal analysis, C.Z.; investigation, B.X.; resources, J.J.; data curation, C.Z.; writing—original draft preparation, C.Z.; writing—review and editing, C.Z.; visualization, C.Z.; supervision, J.J., M.A.M.R. and N.A.; project administration, Q.Z.; funding acquisition, C.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Infineon Technologies AG, Neubiberg 85579, Germany. Project was also supported by National Natural Science Foundation of China (62203271).

Data Availability Statement

The data presented in this paper are available on request from the corresponding author.

Acknowledgments

The authors are grateful to the reviewers for their constructive comments, which have led to meaningful improvements in the paper.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Proposed TPIPBi-Buck–Boost converter.
Figure 1. Proposed TPIPBi-Buck–Boost converter.
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Figure 2. Equivalent circuits in charge buck mode: (a) stage 1; (b) stage 2; (c) stage 3; (d) stage 4; (e) stage 5; (f) stage 6; (g) stage 7; (h) stage 8.
Figure 2. Equivalent circuits in charge buck mode: (a) stage 1; (b) stage 2; (c) stage 3; (d) stage 4; (e) stage 5; (f) stage 6; (g) stage 7; (h) stage 8.
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Figure 3. Key waveforms the proposed converter: (a) 0 < d ≤ 1/3; (b) 1/3 < d ≤ 2/3; (c) 2/3 < d < 1.
Figure 3. Key waveforms the proposed converter: (a) 0 < d ≤ 1/3; (b) 1/3 < d ≤ 2/3; (c) 2/3 < d < 1.
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Figure 4. Equivalent circuits in discharge boost mode: (a) stage 1; (b) stage 2; (c) stage 3; (d) stage 4; (e) stage 5; (f) stage 6; (g) stage 7; (h) stage 8.
Figure 4. Equivalent circuits in discharge boost mode: (a) stage 1; (b) stage 2; (c) stage 3; (d) stage 4; (e) stage 5; (f) stage 6; (g) stage 7; (h) stage 8.
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Figure 5. Key waveforms the proposed converter: (a) 0 < d ≤ 1/3; (b) 1/3 < d ≤ 2/3; (c) 2/3 < d < 1.
Figure 5. Key waveforms the proposed converter: (a) 0 < d ≤ 1/3; (b) 1/3 < d ≤ 2/3; (c) 2/3 < d < 1.
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Figure 6. Equivalent circuits in electrical energy interaction mode.
Figure 6. Equivalent circuits in electrical energy interaction mode.
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Figure 7. Charge buck mode based on AC small signal analysis.
Figure 7. Charge buck mode based on AC small signal analysis.
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Figure 8. Discharge boost mode based on AC small signal analysis.
Figure 8. Discharge boost mode based on AC small signal analysis.
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Figure 9. Block diagram of double closed-loop control system.
Figure 9. Block diagram of double closed-loop control system.
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Figure 10. Block diagram of current inner loop compensation controller.
Figure 10. Block diagram of current inner loop compensation controller.
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Figure 11. Block diagram of Voltage Outer Loop Compensation Controller.
Figure 11. Block diagram of Voltage Outer Loop Compensation Controller.
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Figure 12. Block diagram of power feedforward compensation controller.
Figure 12. Block diagram of power feedforward compensation controller.
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Figure 13. Block diagram of bidirectional switching logic controller with Infineon.
Figure 13. Block diagram of bidirectional switching logic controller with Infineon.
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Figure 14. (a) Start-up transients; (b) 1 : V DS 2 , 2 : V GS 2 in discharge boost mode, and 3 : V DS 3 , 4 : V GS 3 in charge buck mode.
Figure 14. (a) Start-up transients; (b) 1 : V DS 2 , 2 : V GS 2 in discharge boost mode, and 3 : V DS 3 , 4 : V GS 3 in charge buck mode.
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Figure 15. V OUT , I OUT in double closed-loop control system.
Figure 15. V OUT , I OUT in double closed-loop control system.
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Figure 16. V OUT , I OUT response of start-up and close-down in power feedforward compensation controller.
Figure 16. V OUT , I OUT response of start-up and close-down in power feedforward compensation controller.
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Figure 17. Steady-state experimental waveforms of voltage ripples in different output power.
Figure 17. Steady-state experimental waveforms of voltage ripples in different output power.
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Figure 18. Efficiency curve of prototype.
Figure 18. Efficiency curve of prototype.
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Table 1. Define stages of charge buck mode under duty ratio.
Table 1. Define stages of charge buck mode under duty ratio.
Duty RatioCharge Buck Mode
0 < d ≤ 1/3stages 1, 2, 3, 4
1/3 < d ≤ 2/3stages 2, 3, 4, 5, 6, 7
2/3 < d < 1stages 5, 6, 7, 8
Table 2. Define stages of discharge boost mode under duty ratio.
Table 2. Define stages of discharge boost mode under duty ratio.
Duty RatioDischarge Boost Mode
0 < d ≤ 1/3stages 1, 2, 3, 4
1/3 < d ≤ 2/3stages 2, 3, 4, 5, 6, 7
2/3 < d < 1stages 5, 6, 7, 8
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MDPI and ACS Style

Zhang, C.; Xu, B.; Jasni, J.; Radzi, M.A.M.; Azis, N.; Zhang, Q. Model Control and Digital Implementation of the Three Phase Interleaved Parallel Bidirectional Buck–Boost Converter for New Energy Electric Vehicles. Energies 2022, 15, 7178. https://doi.org/10.3390/en15197178

AMA Style

Zhang C, Xu B, Jasni J, Radzi MAM, Azis N, Zhang Q. Model Control and Digital Implementation of the Three Phase Interleaved Parallel Bidirectional Buck–Boost Converter for New Energy Electric Vehicles. Energies. 2022; 15(19):7178. https://doi.org/10.3390/en15197178

Chicago/Turabian Style

Zhang, Chi, Binyue Xu, Jasronita Jasni, Mohd Amran Mohd Radzi, Norhafiz Azis, and Qi Zhang. 2022. "Model Control and Digital Implementation of the Three Phase Interleaved Parallel Bidirectional Buck–Boost Converter for New Energy Electric Vehicles" Energies 15, no. 19: 7178. https://doi.org/10.3390/en15197178

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