Next Article in Journal
Cybersecurity in Smart Grids
Previous Article in Journal
The Environmental Effects of Urbanization, Education, and Green Innovation in the Union for Mediterranean Countries: Evidence from Quantile Regression Model
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Review

Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update

by
Vincenzo d’Alessandro
1,*,
Antonio Pio Catalano
1,
Ciro Scognamillo
1,
Markus Müller
2,
Michael Schröter
2,
Peter J. Zampardi
3 and
Lorenzo Codecasa
4
1
Department of Electrical Engineering and Information Technology, University Federico II, 80125 Naples, Italy
2
Chair for Electron Devices and Integrated Circuits, Technical University Dresden, 01069 Dresden, Germany
3
Qorvo, Inc., Newbury Park, CA 91320, USA
4
Department of Electronics, Information, and Bioengineering, Politecnico di Milano, 20133 Milan, Italy
*
Author to whom correspondence should be addressed.
Energies 2022, 15(15), 5457; https://doi.org/10.3390/en15155457
Submission received: 14 June 2022 / Revised: 7 July 2022 / Accepted: 25 July 2022 / Published: 28 July 2022
(This article belongs to the Section F: Electrical Engineering)

Abstract

:
This paper presents a comprehensive overview of nonlinear thermal effects in bipolar transistors under static conditions. The influence of these effects on the thermal resistance is theoretically explained and analytically modeled using the single-semiconductor assumption. A detailed review of experimental techniques to extract the thermal resistance as a function of backside temperature and/or dissipated power from DC measurements is provided; advantages, underlying approximations, and limitations of all methods are clarified, and guidelines for their correct application are given. Accurate FEM thermal simulations of an InGaP/GaAs and a Si/SiGe HBT are performed to verify the accuracy of the single-semiconductor theory. The thermal resistance formulations employed in the most popular compact bipolar transistor models for circuit simulators are investigated, and it is found that they do not properly describe nonlinear thermal effects. Alternative implementations of the more accurate single-semiconductor theory are then proposed for the future versions of the compact models.

1. Introduction

Electrothermal (ET) effects are an important issue in modern high-frequency bipolar transistors in any technology, as they adversely impact the device behavior in multiple ways, namely, distortion in the I–V curves, which shifts the DC bias and shrinks the safe operating area [1,2,3,4], degradation of the low-frequency behavior [5], and even irreversible failure, likely to occur in multifinger devices due to thermally-induced current hogging [6,7].
Gallium arsenide (GaAs)-based heterojunction bipolar transistors (HBTs) like InGaP/GaAs and AlGaAs/GaAs, commonly considered the dominant technology for handset power amplifier design, are also plagued by strong ET effects due to the high operating power densities and high thermal resistances, the latter induced by (i) the low thermal conductivity of the GaAs substrate (one third of that of silicon), (ii) the lateral heat confinement due to mesa isolation, and (iii) the choice of interlevel dielectric films [4,6,8], ref. [9] and references therein, [10].
In silicon/silicon-germanium (Si/SiGe) HBTs for mm-wave and near-THz applications (wireless and optical communication, medical equipment, and automotive radars), ET effects are aggravated by the technology strategies employed to boost the frequency performance, i.e., (i) adoption of shallow and deep trenches filled with oxide or polysilicon coated with oxide, which suffer from low thermal conductivity and hamper the lateral propagation of the heat emerging from the power dissipation region; horizontal scaling (ii) of the emitter, which drives higher current (and power) density, and (iii) of the spacing between the intrinsic transistor and the surrounding trenches, which further inhibits the lateral heat flow. All these factors concur to increase the thermal resistances of single-finger transistors, which have been pushed into the thousands of K/W and beyond [11,12,13,14,15,16,17].
As the static thermal behavior of any device is well represented by its thermal resistance, accurately extracting this parameter from easy-to-perform measurements and describing it with simple formulations for compact transistor models is of utmost importance for many applications, e.g., simulation of the impact of ET effects on circuit performance, determination of optimum values of ballast resistors, and reliability estimations.
Unfortunately, the extraction and modeling tasks are complicated by the nonlinear nature of the heat conduction problem arising from the reduction of thermal conductivity of materials with increasing temperature (nonlinear thermal effects), which make the thermal resistance a monotonically growing function of the backside temperature and dissipated power. Effort has been dedicated to partially/fully account for such effects (i) in techniques for the experimental extraction of the thermal resistance, and (ii) in thermal resistance formulations conceived for compact transistor models. However, detailed discussions on advantages and limitations of the extraction techniques, as well as on the accuracy of the formulations, are still missing in literature.
This paper is intended to offer an extensive and critical overview of nonlinear thermal effects in modern high-frequency bipolar transistors from a multi-fold point of view. In Section 2, the separate impact on the thermal resistance of the backside temperature and dissipated power is theoretically explained and analytically described by resorting to the simple assumption of a single-semiconductor device. In Section 3, a detailed review of the available experimental techniques to extract the thermal resistance as a function of backside temperature and/or dissipated power is offered. In particular, the analysis focuses on indirect methods based on straightforward and cheap measurements of voltages/currents under DC conditions. The techniques are presented in a tutorial style with a unified nomenclature; advantages, limitations, and approximations are clarified, and simple guidelines for their correct application are provided. In Section 4, 3-D nonlinear thermal simulations of an InGaP/GaAs and a Si/SiGe HBT, chosen as case studies, are performed to obtain a reliable dependence of the thermal resistance as a function of backside temperature and dissipated power for both technologies. The resulting RTH data are used to verify the accuracy of the single-semiconductor theory. In Section 5, the thermal resistance formulations embedded in compact transistor models available in circuit simulators are examined. It is observed that nonlinear thermal effects are either not considered or improperly accounted for, which affects the ET simulation results for medium/high temperatures. To tackle this issue, more accurate, yet numerically efficient and stable (not prone to convergence problems) implementations of the single-semiconductor theory are proposed for the future releases of compact transistor models. Conclusions are finally given in Section 6.

2. Thermal Resistance Dependence on Nonlinear Thermal Effects

The static thermal behavior of an electron device is effectively described by the self-heating thermal resistance RTH [K/W], which represents an indicator of the inability of the component to remove heat from the power dissipation region (heat source). By specifically referring to a bipolar transistor, RTH is defined as
R T H = T j T B P D = Δ T j P D
where Tj is the temperature averaged over the base-emitter junction [K] (also called junction temperature), TB is the backside (or baseplate, or ambient) temperature [K] that can be assigned through a thermochuck/heater, and PD [W] is the dissipated power, given by
P D = I B V B E + I C V C E = I E V B E + I C V C B
In (2), all terms have their customary meaning, namely, IB, IC, IE are the base, collector, and emitter currents, respectively, while VBE, VCE, VCB are the externally applied base-emitter, collector-emitter, and collector-base voltages, respectively. The thermal resistance is also referred to as (i) junction temperature rise above TB normalized to PD or (ii) static thermal response to power dissipation.
RTH depends on (i) device and heat source geometry, (ii) thermal conductivities of the materials crossed by the heat emerging from the source, and (iii) boundary conditions. A transistor with a horizontally- and/or vertically-scaled heat source suffers from a higher RTH (e.g., [13,18,19]), as for the same PD the dissipated power density is higher, and therefore Tj is higher. In a similar fashion, the adoption of materials with low thermal conductivities hinders the heat flow, thus leading to an increase in RTH.
Additionally, it must be considered that the thermal conductivities k [W/µmK] of semiconductors and metals in a transistor decrease with temperature, thereby lowering the heat transfer efficiency. The thermally induced k degradation introduces a nonlinearity in the heat conduction equation, and the resulting effects are referred to as nonlinear thermal effects. It is well known that in a practically relevant temperature range the k of many semiconductors of interest reduces with a power law
k ( T ) = k ( T 0 ) ( T T 0 ) α
where the reference temperature T0 is equal to 300 K and α > 0, while for the metals the decrease is well described by the following linear model:
k ( T ) = k ( T 0 ) β ( T T 0 )
where β > 0. Commonly accepted values for k(T0), α, β corresponding to the most relevant semiconductors and metals are reported in Table 1.
The device temperature increases—and the thermal conductivities decrease—for two distinct physical mechanisms: (i) the raise in backside temperature TB (nonlinear thermal effect due to the backside temperature) and (ii) the increase in dissipated power PD (nonlinear self-heating effect). Consequently, RTH is a monotonically growing function of both TB and PD and should be more properly formulated as RTH(TB,PD), which inherently accounts for nonlinear thermal effects. This means that the observed dependence on TB and PD does not come from the explicit presence of these quantities on the RHS of (1), which is the basic definition of thermal resistance, but implicitly comes from the k reduction with increasing temperature [28].
Hereafter, RTH00 will conventionally denote the thermal resistance of the bipolar transistor at TB = T0 and very low PD (ideally for PD → 0 W, i.e., in the absence of the nonlinear self-heating effect), that is,
R T H 00 = R T H ( T B = T 0 , P D 0 )
In simple terms, RTH00 represents the thermal resistance of the transistor if the thermal conductivities of all materials are equal to their k(T0) value.
The following analysis is aimed at providing an illustrative overview of the RTH dependence on TB and PD. Let us consider an ideal device homogeneously composed of a specific semiconductor, the thermal conductivity of which obeys (3) (single-semiconductor assumption), and let us first assume that the backside temperature TB is equal to T0. The typical approach used to include the impact of the nonlinear self-heating effect on the junction temperature Tj (and on RTH) is the Kirchhoff transformation [39,40,41]. Let us define Tj00 as the junction temperature given by
T j 00 = T 0 + R T H 00 P D
where PD is assumed to be very low. In this case, the temperature Tj0P (>Tj00) accounting for the nonlinear effect due to PD can be calculated as [24,27,42,43,44]
T j 0 P = T 0 [ 1 ( α 1 ) T j 00 T 0 T 0 ] 1 α 1 = T 0 [ 1 ( α 1 ) R T H 00 P D T 0 ] 1 α 1
It must be remarked that (7) also holds in the more general case of a multilayered structure where the thermal conductivities k(T0) of the layers are different but share the same power dependence on temperature (3), that is, the same value for the power factor α [26]. The thermal resistance is obtained as
R T H 0 P = R T H ( T B = T 0 , P D ) = T j 0 P T 0 P D = T 0 P D { [ 1 ( α 1 ) R T H 00 P D T 0 ] 1 α 1 1 }
and is obviously higher than the TB = T0 zero-power thermal resistance RTH00.
Now let us consider an arbitrary backside temperature TBT0. The RTH increase due to nonlinear thermal effects concurrently induced by TB and PD can be described as follows. Since for this ideal single-semiconductor device the thermal resistance is inversely proportional to the thermal conductivity [13,17,18,19,28,29,39,45,46], then the RTH growth only due to TB > T0 (for PD → 0 W, i.e., without the nonlinear self-heating effect) can be described by the power law [17,28,29,45]
R T H B 0 = R T H ( T B , P D 0 ) = R T H 00 ( T B T 0 ) α
It is noteworthy that also for real devices RTHB0 is higher than RTH00 since, as mentioned before, the thermal conductivities of semiconductors and metals at TB are lower than the reference values at T0. Let us designate as TjB0 the junction temperature given by
T j B 0 = T B + R T H B 0 P D
for very low PD. The Kirchhoff transformation can again be used to account for the nonlinear self-heating effect [17,28,29,43,45]
T j = T B [ 1 ( α 1 ) T j B 0 T B T B ] 1 α 1 = T B [ 1 ( α 1 ) R T H B 0 P D T B ] 1 α 1
and the thermal resistance can be calculated as
R T H ( T B , P D ) = T j T B P D = T B P D { [ 1 ( α 1 ) R T H B 0 P D T B ] 1 α 1 1 }
which can also be written as
R T H ( T B , P D ) = T B P D { [ 1 ( α 1 ) R T H 00 P D T B ( T 0 T B ) α ] 1 α 1 1 }
where use has been made of (9).
As an illustrative example, we evaluated the RTH behavior as a function of TB and PD with (13) assuming that the device is homogeneously composed of GaAs (α = 1.25), and that its TB = T0 zero-power thermal resistance RTH00 is equal to 1000 K/W. Figure 1 shows RTH(TB,PD) vs. PD and vs. Tj at different TB values. It is important to note that, by keeping Tj constant while increasing TB (which can be obtained by reducing PD), RTH increases. This contrasts with the common—and wrong—belief that RTH only depends on Tj, and can be easily explained by considering that, for higher TB values, all materials encountered by the heat flowing through the device will suffer from a higher temperature (falling in the range TB to Tj), and thus from a lower thermal conductivity. Hence, accounting for nonlinear thermal effects with an RTH that only depends on Tj in a compact bipolar transistor model is an unfortunate choice, as the underlying physics of the problem is incorrectly represented.
Starting from the single-semiconductor theory, Walkey et al. [28], and subsequently Huszka et al. [17], resort to mathematical approximations to get an RTH(TB,PD) formulation simpler than (13). First, the power law (3) is linearized as
k ( T B ) k ( T 0 ) 1 + α T 0 ( T B T 0 )
whence the zero-power thermal resistance at TB can be expressed as
R T H B 0 R T H 00 [ 1 + α T 0 ( T B T 0 ) ] = R T H 00 [ 1 + ζ B ( T B T 0 ) ]
which shows a linear increase of RTHB0 with TB, also assumed in [47]. The RTH(TB,PD) formulation given by (12), which also includes the nonlinear self-heating effect, is then expanded in a Taylor series that retains only the first two terms, thus leading to
R T H ( T B , P D ) R T H B 0 ( 1 + α R T H B 0 2 T B P D ) = R T H B 0 [ 1 + ζ P ( T B ) P D ]
By substituting (15) into (16),
R T H ( T B , P D ) = R T H 00 [ 1 + ζ B ( T B T 0 ) ] [ 1 + ζ P ( T B ) P D ]
where the α-sensitive parameters ζB and ζP(TB) account for the separate dependence on TB and PD, respectively. A linear dependence of RTH0P on PD was also proposed in [2,48].
Walkey et al. also suggest a fast procedure to determine ζB and ζP(TB) from a few experimentally extracted RTH values. In particular, ζB can be evaluated from the zero-power thermal resistances RTH00 and RTHB10 = RTH(TB1,PD → 0) as
ζ B = 1 T B 1 T 0 ( R T H B 10 R T H 00 1 )
while ζP(TB) can be calculated for each TB from two thermal resistances RTH(TB,PD1) and RTH(TB,PD2) as
ζ P ( T B ) = R T H ( T B , P D 2 ) R T H ( T B , P D 1 ) 1 P D 2 R T H ( T B , P D 2 ) R T H ( T B , P D 1 ) P D 1

3. Review of Experimental RTH Extraction Techniques Accounting for Nonlinear Thermal Effects

The literature is populated by many techniques for extracting the thermal resistance of bipolar transistors from simple DC measurements (a complete review being given in [49]), which can be subdivided into (i) approaches using the relation between an easily-measurable electrical parameter (like VBE) and Tj as a thermometer, and (ii) approaches that do not use the thermometer (e.g., those based on intersection points). This section aims to provide a systematic and comprehensive overview of the methods explicitly accounting for the influence of nonlinear thermal effects, namely, those determining the RTH dependence on TB (for TBT0) and/or PD, or on Tj. The techniques are explained in detail in chronological order using a unified nomenclature; advantages/drawbacks are clarified for each of them, and guidelines for their correct use are provided.

3.1. Bovolon et al.

The technique proposed by Bovolon et al. [50] is “differential” and can be considered as an extension of the approach published by Dawson et al. [51].
Let us focus on the “internal” (junction) base-emitter voltage VBEj, given by
V B E j = V B E R B I B R E I E = V B E R B β F I C R E I E V B E ( R B β F + R E ) I C = V B E R E B I C
where RB and RE are the parasitic base and emitter series resistances, respectively, and βF is the common-emitter current gain. From simple theoretical considerations, it can be demonstrated that in the absence of Early, high-injection (Kirk), and avalanche effects, under forward mode VBEj decreases almost linearly with the junction temperature Tj at a given ICIE [13]
V B E j ( T j ) = V B E j ( T 0 ) ϕ ( T j T 0 )
By making use of (20), in the assumption of a temperature-insensitive REB, (21) becomes
V B E ( T j ) = R E B I C + V B E j ( T 0 ) ϕ ( T j T 0 ) = V B E ( T 0 ) ϕ ( T j T 0 )
which states that the linear behavior also holds for the externally applied VBE. From (22), it is clear that the linear behavior also takes place locally, i.e., around a certain junction temperature Tj*:
V B E ( T j ) = V B E ( T j * ) ϕ ( T j T j * )
Exploiting the definition of thermal resistance (1), (23) turns into
V B E ( T B , P D ) = V B E ( T j * ) ϕ [ T B + R T H ( T B , P D ) P D T j * ]
If (24) is applied to another backside temperature TB + ΔTB at the same dissipated power PD,
V B E ( T B + Δ T B , P D ) = V B E ( T j * ) ϕ [ T B + Δ T B + R T H ( T B + Δ T B , P D ) P D T j * ]
By subtracting (25) from (24),
V B E ( T B , P D ) V B E ( T B + Δ T B , P D ) = ϕ Δ T B + ϕ [ R T H ( T B + Δ T B , P D ) R T H ( T B , P D ) ] P D
If ΔTB is chosen sufficiently low, (26) reduces to
V B E ( T B , P D ) V B E ( T B + Δ T B , P D ) ϕ Δ T B
from which coefficient ϕ describing the temperature dependence of VBE (the thermometer) can be determined as
ϕ = V B E ( T B , P D ) V B E ( T B + Δ T B , P D ) Δ T B
Subsequently, by applying (24) to another dissipated power PD + ΔPD at the same backside temperature TB,
V B E ( T B , P D + Δ P D ) = V B E ( T j * ) ϕ [ T B + R T H ( T B , P D + Δ P D ) ( P D + Δ P D ) T j * ]
By subtracting (29) from (24),
V B E ( T B , P D ) V B E ( T B , P D + Δ P D ) = ϕ [ R T H ( T B , P D + Δ P D ) ( P D + Δ P D ) R T H ( T B , P D ) P D ]
If ΔPD is chosen sufficiently small, (30) reduces to
V B E ( T B , P D ) V B E ( T B , P D + Δ P D ) ϕ R T H ( T B , P D ) Δ P D
and finally, combining (31) and (28),
R T H ( T B , P D ) = V B E ( T B , P D ) V B E ( T B , P D + Δ P D ) ϕ Δ P D = V B E ( T B , P D ) V B E ( T B , P D + Δ P D ) Δ P D V B E ( T B , P D ) V B E ( T B + Δ T B , P D ) Δ T B
By repeating the extraction for different values of backside temperature TB and dissipated power PD, RTH can be determined as a function of TB and PD without imposing analytical assumptions on both dependences.
For each (TB,PD) couple, the approach requires the measurement of two IB-constant ICVCE characteristics and of the corresponding VBEVCE curves at TB and TB + ΔTB. On the first ICVCE characteristic, two points with close dissipated powers PD and PD + ΔPD are selected, and the related VBE(TB,PD), VBE(TB,PD + ΔPD) values are used for the calculation of the numerator of (32). Then, the point with dissipated power PD has to be identified on the second characteristic, and the associated VBE(TB + ΔTB,PD) allows the calculation of the denominator of (32); if this point has not been exactly measured, an interpolation between the adjacent points is required.
The technique must be cautiously applied for multiple reasons: (i) ΔTB should be chosen sufficiently small to ensure (27); (ii) ΔPD should be chosen sufficiently low to lead to (31); (iii) moreover, the collector currents corresponding to PD and PD + ΔPD should be quite similar, as coefficient ϕ is dependent on IC [1,3,6,8,11,13,52,53]; (iv) finally, it must be remarked that both the ϕ (28) and RTH (32) calculations are determined by a difference between VBE values measured in two points only, which can in principle jeopardize the accuracy of the results. Due to all the above aspects, the practical application of the technique can be judged as nontrivial.

3.2. Yeats

The technique conceived by Yeats [45] can also be reviewed as an improved version of that presented by Dawson et al. [51]. First, some VBEVCE (VCE being given by the sum of the forced VCB and the measured VBE) characteristics are measured at a given IE and various backside temperatures TB. Through a quadratic polynomial, the VBE values corresponding to VCE = 0 V (PD = 0 W and thus Tj = TB) are extrapolated, so that the VBETj thermometer is defined at the assigned IE and then inverted (turned into TjVBE) and described by means of a quadratic polynomial with IE-dependent coefficients. Hence, any VBE is associated to the corresponding Tj value, and the experimental IE-constant TjPD curves at various TB are straightforwardly determined. Consequently, the experimental RTH(TB,PD) against PD is known for each TB from (1) without imposing assumptions on these dependences. This technique is often applied to GaAs-based HBTs, especially for Tj estimates used in reliability.
Yeats proposes to adopt the single-semiconductor theory shown in Section 2 to analytically describe the measured RTH(TB,PD) data; hence, he uses (13), where (9) models the influence of TB, and the Kirchhoff transformation is adopted to include the sensitivity to PD. An optimization routine (referred to as “brute-force 2-D search”) is exploited, which allows achieving RTH00 and α that favor the best aggregate match between all the experimental RTH data and (13). Here Yeats remarks that, as the correlated parameters RTH00 and α are simultaneously optimized, RTH00 might differ from the extracted TB = T0 zero-power thermal resistance, although the calibrated (RTH00,α) couple well describes the measured data; conveniently, the numerical analysis reported in Section 4 shows that the optimized RTH00 is very close to the simulated value over wide TB and PD ranges, regardless of the HBT technology.
Although the technique seems to be simple and effective, there are two questionable aspects to point out: the first is the extrapolation procedure needed to calibrate the VBETj thermometer, the accuracy of which should be further investigated, and the second is the direct use of the thermometer to find the Tj, and thus the RTH(TB,PD), associated to a specific VBE, which makes the RTH results too sensitive to the precision of the VBE measurements (other thermometer-based techniques do not directly use the thermometer to evaluate RTH, but, like Bovolon et al. [50], exploit another step requiring the “differential” calculation ΔVBEPD or even the derivative dVBE/dPD; this alleviates the impact of inaccuracies on the VBE measurements).

3.3. Marsh

In contrast to [45,50], which require a calibrated thermometer, the technique conceived by Marsh [47] belongs to a category of indirect approaches (the word “direct” in the title could mislead) based on intersections between curves, and allows a relatively simple extraction of RTHB0 as a function of TB. Marsh proposes to measure three ICVCE characteristics by forcing the same IB at three backside temperatures TB1 < TB2 < TB3. In HBTs, a negative-differential-resistance (NDR) region arises (IC reduces with VCE) under forward mode due to the negative temperature coefficient (NTC) of the current gain βF, in turn induced by the wider bandgap of the emitter compared to that of the base. In the NDR, three points can be identified, which correspond to the same IC, but are associated to different VCE (VCE1 > VCE2 > VCE3), and thus different dissipated powers PD (PD1 > PD2 > PD3). As IC and IB are the same at these points, βF is the same, and, since βF only depends on Tj, Tj is also the same. Consequently, using (1), the following equations hold in the points:
T j = T B 1 + R T H ( T B 1 , P D 1 ) P D 1 T j = T B 2 + R T H ( T B 2 , P D 2 ) P D 2 T j = T B 3 + R T H ( T B 3 , P D 3 ) P D 3
Marsh assumes that RTH is a linearly increasing function of TB, while neglecting its PD dependence, that is,
R T H ( T B , P D ) R T H B 0 = A M a r s h + B M a r s h T B
By substituting (34) into (33), a three-equation system with three unknowns (AMarsh, BMarsh, Tj) is obtained
T j = T B 1 + ( A M a r s h + B M a r s h T B 1 ) P D 1 T j = T B 2 + ( A M a r s h + B M a r s h T B 2 ) P D 2 T j = T B 3 + ( A M a r s h + B M a r s h T B 3 ) P D 3
from which it is possible to determine the junction temperature Tj at the selected points, as well as RTH as a function of TB as given by (34). Such a linear relation can also be written as
R T H B 0 = A M a r s h + B M a r s h T 0 + B M a r s h ( T B T 0 ) = R T H 00 + B M a r s h ( T B T 0 )
It is worth noting that in principle this technique can also be applied to Si bipolar junction transistors (BJTs), which show a positive-differential-resistance (PDR) behavior in the IB-constant ICVCE curves due to the positive temperature coefficient (PTC) of βF, in turn induced by the narrower bandgap of the highly-doped emitter compared to that of the base; however, in this case the RTH extraction would be affected by the Early effect, which is not accounted for in the approach and can be misinterpreted as an additional self-heating.
From the numerical investigation reported in Section 4, it will be found that the RTHB0 vs. TB behavior is almost linear in the TB span 300 to 450 K. However, attention must be paid during the practical application of this technique, as PD1, PD2, PD3 must be chosen sufficiently low to prevent a significant nonlinear self-heating effect.

3.4. Paasschens et al.

Paasschens and his co-authors [29] invoke the single-semiconductor theory shown in Section 2, and, like [17,28,45], consider (9) for the dependence of the zero-power thermal resistance RTHB0 on TB, and the Kirchhoff-based (13) for the complete RTH(TB,PD) formulation. The authors only perform low-power measurements of RTHB0 at various TB values with the technique proposed in [54], which can be categorized as a “differential” approach not based on a thermometer. Once the thermal resistance RTH00 is extracted, parameter α is optimized by comparison between (9) and experimental data, and then also used in (13). In other words, Paasschens et al. do not measure the impact of the nonlinear self-heating effect on RTH, which is instead done in [45,50].
The technique presented in [54] can be summarized as follows. The transistor is in a common-emitter configuration with the backside at temperature TB, and the forced VBE and VCE are chosen to keep PD low.
Let us derive the RTH expression used in the procedure. The collector current IC is a function of the independent variables VBE, VCE, Tj, that is,
I C = I C ( V B E , V C E , T j )
If VBE is kept constant, the variation of IC due to small variations of VCE and Tj (the latter dictated by variations of VCE or TB) is given by
d I C = I C V C E d V C E + I C T j d T j
which, neglecting the Early effect, reduces to
d I C I C T j d T j
If dTj is due to dTB, (39) becomes
d I C | V C E I C T j d T j | V C E
while, if it is due to dVCE,
d I C | T B I C T j d T j | T B
The variation of the junction temperature due to a small variation of TB is
d T j | V C E = d T B + R T H B 0 V C E d I C | V C E = d T B + R T H B 0 V C E I C T j d T j | V C E
where use has been made of (40). From (42), it is obtained that
d T j | V C E = d T B 1 R T H B 0 V C E I C T j
The variation of the junction temperature due to a small variation of VCE is (dTB = 0 K)
d T j | T B = R T H B 0 ( I C d V C E + d I C | T B V C E ) = R T H B 0 ( I C d V C E + I C T j d T j | T B V C E )
by exploiting (41). From (44),
d T j | T B = R T H B 0 I C d V C E 1 R T H B 0 V C E I C T j
The base current IB is a function of the independent variables VBE, Tj, that is,
I B = I B ( V B E , T j )
By considering that VBE is constant,
d I B = I B T j d T j
If dTj is obtained through a variation dTB, (47) becomes
d I B | V C E = I B T j d T j | V C E
while, if it is induced by dVCE,
d I B | T B = I B T j d T j | T B
Dividing (48) by (49) and making use of (43) and (45)
d I B | V C E d I B | T B = d T j | V C E d T j | T B = d T B R T H B 0 I C d V C E
from which
R T H B 0 = 1 I C d I B d V C E | T B d I B d T B | V C E = 1 I C I B ( V B E , V C E + d V C E , T B ) I B ( V B E , V C E , T B ) d V C E I B ( V B E , V C E , T B + d T B ) I B ( V B E , V C E , T B ) d T B
The technique can be easily extended to account for the Early effect, here omitted only to simplify the derivation; it suffices to multiply the denominator by 1 + VCE/VAF, VAF being the forward Early voltage.
The terms on the RHS can be obtained by measuring three IBVBE characteristics at (VCE,TB), (VCE + dVCE,TB), and (VCE,TB + dTB), and choosing a VBE value that, concurrently with VCE, ensures a low PD but an appreciable self-heating. By repeating the process at various TB, the experimental behavior of RTHB0 vs. TB is obtained; by comparing it with (9), if RTH00 has been measured, α is calibrated and then also used in (13).

3.5. Menozzi et al.

The technique developed by Menozzi et al. [48] allows the experimental extraction of RTH as a function of TB and PD based on a couple of assumptions. The method requires the common-emitter measurements of various (seven can be enough [48]) ICVCE characteristics at an assigned base current IB for various TB values, the lowest of which is referred to as TB0. Let us denote as VCE0 the lowest VCE applied under forward mode for all curves and as IC00 the collector current at VCE0 and TB = TB0. Lastly, let us call PD0(TB) the dissipated powers corresponding to the VCE0 values for all characteristics. The first assumption of the method is that, for any assigned TB, RTH(TB,PD) is a linearly increasing function of PD, that is,
R T H ( T B , P D ) = R T H ( T B , P D 0 ( T B ) ) + A M e n o z z i ( T B ) ( P D P D 0 ( T B ) )
where the (positive) slope AMenozzi is a function of the applied TB. The second assumption is that the collector current IC linearly decreases with Tj (no matter how Tj is increased) for an assigned IB, which is only true for HBTs due to the NTC of βF. This can be expressed as
I C ( T j ) = I C 00 [ 1 κ ( T j T j 00 M e n o z z i ) ]
Tj00Menozzi being the junction temperature corresponding to VCE0 and TB0, i.e.,
T j 00 M e n o z z i = T B 0 + R T H ( T B 0 , P D 00 ) P D 00 T B 0 + R T H ( T B 0 , P D 00 ) V C E 0 I C 00
where PD0(TB0) has been denoted as PD00. Let us subtract (54) from (1)
T j T j 00 M e n o z z i = T B T B 0 + R T H ( T B , P D ) P D R T H ( T B 0 , P D 00 ) P D 00 = = T B T B 0 + [ R T H ( T B , P D 0 ( T B ) ) + A M e n o z z i ( T B ) ( P D P D 0 ( T B ) ) ] P D R T H ( T B 0 , P D 00 ) P D 00
where use has been made of (52). By substituting the RHS of (55) into (53),
I C ( T j ) = a 2 ( T B ) P D 2 + a 1 ( T B ) P D + a 0 ( T B )
with
a 0 ( T B ) = I C 00 { 1 κ [ T B T B 0 R T H ( T B 0 , P D 00 ) P D 00 ] } = = κ I C 00 T B + I C 00 + κ I C 00 T B 0 + κ I C 00 R T H ( T B 0 , P D 00 ) P D 00 = = B M e n o z z i T B + C M e n o z z i
a 1 ( T B ) = κ I C 00 [ R T H ( T B , P D 0 ( T B ) ) A M e n o z z i ( T B ) P D 0 ( T B ) ]
a 2 ( T B ) = κ I C 00 A M e n o z z i ( T B )
Hence, IC(Tj) is expressed as a function of TB and PD in any point of the measured curves.
As a next step, the ICPD curves associated to the ICVCE ones are determined by a simple elaboration of the data. Then, the values of coefficients a0, a1, a2 favoring the best agreement between the experimental ICPD curves and (56) can be found for each TB with a 2nd-order polynomial fit, and the three a0TB, a1TB, a2TB characteristics are available. By comparing the a0TB curve and (57), BMenozzi and CMenozzi can be calibrated. Hence, κ is evaluated as
κ = B M e n o z z i I C 00
and the thermal resistance RTH(TB0,PD00) as
R T H ( T B 0 , P D 00 ) = C M e n o z z i I C 00 κ T B 0 1 κ P D 00
From (59), AMenozzi(TB) is obtained for each TB as
A M e n o z z i ( T B ) = a 2 ( T B ) κ I C 00
Consequently, from (58), RTH(TB,PD0(TB)) can be determined as
R T H ( T B , P D 0 ( T B ) ) = A M e n o z z i ( T B ) P D 0 ( T B ) a 1 ( T B ) κ I C 00
Once AMenozzi(TB) and RTH(TB,PD0(TB)) are known, the linear RTH vs. PD increase for each TB as given by (52) is achieved.
Although this technique is suited for HBTs, it can in principle also be applied to Si BJTs by assuming a linear increase of IC with Tj in (53). However, in the presence of significant Early effect, which is not accounted for, the extracted thermal resistance will be overestimated.

3.6. Berkner and Balanethiram et al.

The technique of Berkner [55], subsequently also presented by Balanethiram et al. [15], belongs to the category of approaches based on intersection(s) between curves and does not rely on a thermometer. Under forward active mode, at VBE not too high to avoid Kirk and resistive effects, if the Early effect is negligible and VCE (VCB) is sufficiently low to avoid avalanche, the collector current is given by
I C ( V B E , T j ) = I S ( T j ) exp ( V B E V T )
The technique requires the measurement of two VCE-constant ICVBE characteristics, the first obtained by assigning (VCE1,TB1), and the second fixing (VCE2,TB2), where VCE1 < VCE2 and TB1 > TB2. For low VBE values (low self-heating), the junction temperature Tj1 along the (VCE1,TB1) curve will be higher than Tj2 associated to the (VCE2,TB2) counterpart, as TB1 > TB2 dominates with respect to PD1 < PD2, that is, invoking (1),
T j 1 > T j 2 T B 1 + R T H ( T B 1 , P D 1 ) P D 1 > T B 2 + R T H ( T B 2 , P D 2 ) P D 2
On the other hand, by increasing VBE, PD2 grows faster than PD1, thus leading to
T j 1 < T j 2 T B 1 + R T H ( T B 1 , P D 1 ) P D 1 < T B 2 + R T H ( T B 2 , P D 2 ) P D 2
As a result, there will be a value of VBE where Tj1 = Tj2, that is,
T B 1 + R T H ( T B 1 , P D 1 ) P D 1 = T B 2 + R T H ( T B 2 , P D 2 ) P D 2
This VBE value can be easily identified as the one at which the two characteristics intersect, as in the assumption of validity of (64), Tj1 = Tj2 also implies IC1 = IC2 and therefore VBE1 = VBE2. Here Berkner and Balanethiram et al. assume that RTH(TB1,PD1) = RTH(TB2,PD2) = RTH, and evaluate RTH from (67) as
R T H = T B 1 T B 2 P D 2 P D 1
and the corresponding Tj = Tj1 = Tj2 from either the LHS or RHS of (67). By repeating the procedure for different (VCE,TB) couples, they determine the RTH vs. Tj behavior.
Although this technique is quite easy to apply, it is affected by some drawbacks. First, the authors seem to claim that RTH is only dependent on Tj; however, the theory presented in Section 2 (Figure 1b) clearly demonstrates that RTH is not univocally determined by Tj, but separately depends on TB and PD. For this reason, we think that the equality RTH(TB1,PD1) = RTH(TB2,PD2) and the extracted RTHTj behavior are questionable. In addition, the intersection point must be taken where the Kirk effect does not play a role to prevent IC from being VCB dependent. Lastly, the method cannot be applied to Si BJTs, where the collector current would depend on VCE also due to the Early effect.

3.7. Huszka et al.

Huszka and his co-workers [17] present an improved variant of the technique from Berkner [55] to account for the separate dependence of RTH on TB and PD. They recast (67) as
T B 1 T B 2 P D 2 P D 1 = R T H ( T B 2 , P D 2 ) P D 2 P D 2 P D 1 R T H ( T B 1 , P D 1 ) P D 1 P D 2 P D 1
where the LHS is the original Berkner’s thermal resistance given by (68). Then they propose to use (13) or the linearized (17) for RTH(TB1,PD1) and RTH(TB2,PD2), so that (69) becomes an equation with two unknowns, i.e., RTH00 and α. The authors find many intersection points by varying VCE and TB; by using (69) for each point, an equation system with unknowns RTH00 and α is obtained. Subsequently, α (given as an input) is varied in a reasonably wide range, and parameter RTH00 is optimized for each α (“single-variable optimization”); the (input) α and the calibrated RTH00 ensuring the minimum sum of the squared differences between LHS and RHS of all the system are finally selected.
Differently from [45,50], and similar to [29,47,48], here the analytical RTH dependences on TB and PD are imposed by the technique. Conveniently, in Section 4 a numerical analysis will allow demonstrating that (13) or (17) with calibrated parameters favor a good agreement with realistic RTH(TB,PD) data, regardless of the technology.
The need to find many intersection points between ICVBE characteristics at different VCE and TB values in a well-defined range (see Section 3.6) seems to be a shortcoming of this approach.
Lastly, it is important to remark that also other techniques, not specifically conceived to extract the influence of nonlinear thermal effects on RTH, can in principle be exploited to determine the RTHB0 vs. TB behavior at low PD. An example is given by the thermometer-based method proposed by d’Alessandro et al. [13] and its enriched variant accounting for the Early effect [14,56], which are slightly less straightforward, yet more robust, than “differential” methods or approaches based on the direct adoption of the VBETj thermometer to determine Tj from the measured VBE. The technique is articulated as follows: (1) the slope ϕ(IE) of the VBE–TB curve is extracted at various IE sufficiently small to avoid self-heating (so that TjTB); (2) an analytical model for the ϕ dependence on IE (valid also for IE values entailing self-heating) is determined and verified; (3) RTH is calculated from ϕ(IE) and the slope of an IE-constant VBEVCB characteristic (or equivalently from the slope of the corresponding VBEPD curve) at dissipated power sufficiently high to favor self-heating, but low enough to avoid the nonlinear self-heating effect. Step (3) can be then repeated at various backside temperatures TB. Unfortunately, it is not possible to evaluate the influence of the nonlinear self-heating effect on RTH, as PD is varied in an assigned range during a single extraction.
The main features of the presented techniques are summarized in Table 2.

4. Numerical Simulation

In this Section, we resort to extremely detailed COMSOL [57] 3-D static finite-element method (FEM) thermal simulations of an InGaP/GaAs NPN HBT and a Si/SiGe NPN HBT chosen as well-representative case studies. For both devices, the thermal resistances RTH were evaluated over reasonably wide ranges of TB and PD by activating the temperature dependence of the thermal conductivities. This simulation study is intended to emulate the results of experimental extraction techniques like [45,50], which do not impose any analytical dependence of RTH on TB or PD. The data were used to test the accuracy of the single-semiconductor formulations introduced earlier to describe RTH(TB,PD).

4.1. Devices under Test

The InGaP/GaAs NPN HBT is a mesa-isolated device manufactured by Qorvo, the key features of which are reported in Table 3. The transistor cell consists of four emitter fingers, each with 2 × 20.5 µm2 area (the total emitter area then amounts to 164 µm2). The GaAs substrate is 620-µm thick and equipped with 65 × 65 µm2 pads in a ground-signal-ground configuration for bare-die experimental characterization through RF probes. Further technological details are provided in [10].
The Si/SiGe NPN HBT was fabricated by Infineon Technologies AG in the framework of the European project DOTFIVE. The device, whose figures of merit are listed in Table 4, has only one base and one collector contact (BEC configuration), and belongs to the latest project technology stage, also denoted as set #3 in [13,14]. The drawn emitter area is equal to 0.2 × 2.8 µm2, and the substrate is 185-µm thick.
The 3-D geometries and the meshes of the devices under test in the COMSOL environment are displayed in Figure 2 and Figure 3. The unique accuracy in emulating the real structure of the transistors was obtained by virtue of an in-house routine relying on the MATLAB-COMSOL Livelink [9]. In both technologies, the heat source was considered to geometrically coincide with the base-collector space-charge region. An isothermal boundary condition at temperature TB was applied to the substrate backside, while the lateral sides and the top surface were assumed adiabatic. The mesh of the InGaP/GaAs HBT presents 2.8 × 106 tetrahedra and 3.6 × 106 degrees of freedom, while that of the Si/SiGe HBT involves 1.7 × 106 tetrahedra and 3.9 × 106 degrees of freedom. The thermal conductivities of the ternary alloys InxGa1−xP and InxGa1−xAs (for the emitter of the InGaP/GaAs HBT), as well as of the binary alloy Si1−xGex (for the base of the Si/SiGe HBT), x being the mole fraction of In (in the GaP or GaAs lattice) and Ge (in the Si lattice), were calculated using formulas available in [22]. For the Si/SiGe HBT, two additional conductivity degradation effects were included, namely, one dictated by the high phonon-impurity scattering in the highly doped regions, and another induced by the phonon scattering with lateral boundaries in narrow layers, like emitter tungsten contact, Si emitter, SiGe base, and Si volume embraced by the shallow trench [14]. The CPU time required for each nonlinear static simulation was about 5–10 min using a PC equipped with an AMD Ryzen 5 3600 and 16 GB of RAM.

4.2. Results

By making use of the aforementioned simulation strategy, the TB = T0 zero-power thermal resistances RTH00 were found to be 457.6 K/W for the InGaP/GaAs HBT, and 6829 K/W for the Si/SiGe HBT, values very close to the experimental counterparts determined with the methods in [51] for the InGaP/GaAs HBT and [13,14] for the Si/SiGe HBT.
The simulated RTH vs. PD curves for various TB values are shown in Figure 4.
A first investigation was aimed at testing the accuracy of the RTHB0 vs. TB formulations, namely, the power (9) and linear (15) laws with parameters α and ζB optimized by means of a simple code performing a least squares fitting. Figure 5 shows the results. For the InGaP/GaAs HBT, (9) with α = 0.99 and (15) with ζB = 3.3 × 10−3 K−1 almost provide the same accuracy, while for the Si/SiGe HBT, (9) with α = 1.2924 is slightly better than (15) with ζB = 4.53 × 10−3 K−1.
Unfortunately, we found that the α value calibrated at zero power cannot be used to accurately account for the nonlinear self-heating effect through (13), as proposed in [29]. Figure 4 witnesses that α = 0.99 leads to an overestimation of RTH at medium/high dissipated power for the InGaP/GaAs HBT, while α = 1.2924 gives rise to an underestimation for the Si/SiGe HBT.
Then we tested the modeling approach suggested by Yeats [45] that requires a “brute-force 2-D search” of the RTH00 and α values ensuring the best agreement between all COMSOL RTH data and (13). In this case, RTH00 is not the COMSOL (or equivalently the experimental) TB = T0 zero-power thermal resistance, but becomes a parameter to calibrate. For the InGaP/GaAs HBT, the optimization led to RTH00 = 459.4 K/W (with a 0.39% discrepancy with respect to the COMSOL value) and α = 0.951, while for the Si/SiGe HBT, RTH00 = 6855.8 K/W (0.39%) and α = 1.333. Figure 6 shows that the resulting agreement between the COMSOL thermal resistances and (13) is very good for both technologies. This is an important result, as it demonstrates that the RTH dependence on TB and PD of a real bipolar transistor, independently of the technology, can be accurately described with the simple single-semiconductor theory by calibrating two parameters only, namely, RTH00 and α; in addition, RTH00 does not lose its physical meaning since the optimized value is very close to the reference (COMSOL) one.
We also examined the accuracy of the linearized formulation (16). Adopting (16) with (9) for RTHB0 and the RTH00 and α values calibrated with the “brute-force 2-D search” leads to a perceptible underestimation of COMSOL data at medium/high PD (not shown in the figures). Instead, (16) reaches a level of accuracy comparable with (13) only using (9) for RTHB0 with the COMSOL (or equivalently the experimental) RTH00 and α calibrated on low-power data, and optimizing coefficient ζP (which can be used as a model parameter in compact transistor models) at each TB. In our analysis, we did not calibrate α in (9) on low-power data, as the RTHB0 values corresponding to each TB were all available from COMSOL simulations. It was found that the optimized ζP slightly decreases for the InGaP/GaAs HBT (from 0.8 W−1 at TB = T0 = 300 K to 0.733 W−1 at TB = 450 K) and marginally increases for the Si/SiGe HBT (from 20.09 W−1 to 23.16 W−1). The resulting RTH vs. PD curves are also shown in Figure 6.

5. RTH Formulations Available in Compact Transistor Models and Update

In compact models of bipolar transistors accounting for self-heating, namely, VBIC [58], Mextram 504 [59], Agilent HBT (AHBT) [60], and HICUM [61,62], all available in Keysight ADS [63], the power-temperature feedback is implemented through an equivalent thermal network, i.e., an electrical circuit where currents, voltages, resistances, and capacitances represent dissipated powers, temperatures, thermal resistances, and thermal capacitances, respectively. More specifically, in VBIC, Mextram 504, and HICUM, the default network is the one depicted in Figure 7a, while in AHBT it is the one shown in Figure 7b. Conveniently, all these models are equipped with an externally accessible thermal node that allows the implementation of a thermal network in any form.

5.1. VBIC

In VBIC, RTH is assumed to be a constant parameter, that is, nonlinear thermal effects are not captured. This is problematic when simulating ET effects at medium/high junction temperatures.

5.2. Mextram 504

Mextram 504 implements the impact of backside (or ambient) temperature on RTH according to
R T H = R T H ( 273.15 + T E M P 273.15 + T R E F ) A T H
where TREF (default: 25 °C) is the reference temperature at which parameters are extracted, TEMP (default: 25 °C) is the ambient temperature defined at the device instance, RTH (default: 300 K/W) and ATH (default: 0, although a list of suitable values for the most important materials is provided in [59]) are model parameters. Unfortunately, although the Mextram 504 team was well aware of the influence of the nonlinear self-heating effect on RTH [29], this is not taken into account in the present release, as also correctly stated in [17]. Such a choice was probably made to ensure unconditional simulation stability at the price of a reduced accuracy at high PD. By using the nomenclature introduced in Section 2, and considering that 273.15 + TREFT0, 273.15 + TEMP = TB, and that RTH and ATH coincide with RTH00 and α, (9) is obtained.

5.3. AgilentHBT (AHBT)

AgilentHBT (AHBT) implements the following RTH model (Figure 7b):
R T H = R T H 1 + R T H 2 = R T H 1 ( 273.15 + T d e v 273.15 + T n o m ) X T H 1 + R T H 2 ( 273.15 + T d e v 273.15 + T n o m ) X T H 2
where Tnom (default: 25 °C) is the nominal temperature at which parameters are extracted, RTH1 (default: 1000 K/W), XTH1 (default: 0), RTH2 (default: 0 K/W), XTH2 (default: 0) are model parameters, and Tdev [°C] is the device temperature, given by
T d e v = T e m p + d e l t a T
In (72), Temp (default: 25 °C) is the ambient temperature defined at the device instance, and deltaTTj in Figure 7b) is dynamically calculated as
d e l t a T = ( R T H 1 + R T H 2 ) P D = R T H P D
Let us now use the nomenclature introduced in Section 2. By considering that 273.15 + TnomT0, 273.15 + Temp = TB, and Tdev = Tj, (71) can be rewritten as
R T H = R T H 1 ( T B + Δ T j T 0 ) X T H 1 + R T H 2 ( T B + Δ T j T 0 ) X T H 2
which by default reduces to the two-parameter formulation
R T H = R T H 1 ( T B + Δ T j T 0 ) X T H 1

5.4. HiCUM

In the 2.4 release of HICUM/L2, the thermal resistance is evaluated as [17,62]
R T H = r t h [ 1 + a l r t h ( T e m p + Δ T j T n o m ) ] ( 273.15 + T e m p + Δ T j 273.15 + T n o m ) z e t a r t h
where Tnom (default: 27 °C) is the reference temperature at which parameters are determined, Temp (default: 27 °C) is the ambient temperature defined at the device instance, rth (default: 0 K/W), alrth (default: 0 K−1), zetarth (default: 0) are model parameters, and ΔTj is dynamically computed as
Δ T j = R T H P D
Let us now adopt the nomenclature reported in Section 2. By considering that 273.15 + Tnom = T0 and 273.15 + Temp = TB, (76) can be rewritten as
R T H = r t h [ 1 + a l r t h ( T B + Δ T j T 0 ) ] ( T B + Δ T j T 0 ) z e t a r t h

5.5. Proposed RTH Modeling Approaches

Starting from the findings achieved in Section 4, we propose to resort to (13) with optimized RTH00 and α in compact bipolar transistor models. However, implementing RTH as a nonlinear TB- and PD-dependent resistor according to (13) would lead to a markedly unphysical behavior under dynamic conditions, where RTH will be directly affected by (even fast) PD variations in time.
A first solution (denoted as #1) involves the use of (i) a constant resistor RTHB0 in the single-pole network depicted in Figure 7a, the value of which can be preliminarily calculated with (9), or (ii) a nonlinear resistor RTHB0 given by (9), and a behavioral block (e.g., a nonlinear voltage-controlled voltage source) converting RTHB0PD into ΔTj, with Tj given by (11). Besides T0, two model parameters are needed: RTHB0 and α in case (i), and RTH00 and α in case (ii). This approach was successfully used on simple SPICE-compatible InGaP/GaAs and Si/SiGe HBT models in [10] and [64], respectively.
A second solution (referred to as #2) is obtained by replacing PD with ΔTj in (12) using (1), which leads to
1 = T B Δ T j { [ 1 ( α 1 ) R T H B 0 R T H ( T B , P D ) Δ T j T B ] 1 α 1 1 }
whence
R T H ( T B , Δ T j ) = R T H B 0 α 1 1 ( T B + Δ T j T B ) ( α 1 ) Δ T j T B
Then, in the network of Figure 7a, RTH must be implemented with a nonlinear resistor given by (80), where RTHB0 is again either considered a model parameter to be calculated in the pre-processing stage at the assigned TB with (9), or computed in the compact model through (9). Option #2 reduces the number of nodes in the compact model compared with #1.
A third solution (designated as #3) is to exploit a nonlinear current source controlled by ΔTj to force through the thermal resistance branch a power given by [29]
P D = Δ T j R T H ( T B , Δ T j ) = T B R T H B 0 1 ( T B + Δ T j T B ) ( α 1 ) α 1
which can be easily obtained from (80). For RTHB0, the considerations expressed before still hold.
Solutions #1, #2, #3 provide the same ΔTj under static conditions. Conversely, approach #1 behaves differently from #2, #3 under dynamic conditions: by considering the network in Figure 7a and assuming the same thermal capacitance CTH, #1 leads to a time constant shorter than that of #2 and #3, i.e., it gives rise to a faster response to a power step. Unfortunately, all approaches are expected to be inaccurate in describing the dynamic thermal behavior, mainly due to the simplicity of the single-pole model. A thermal network correctly accounting for nonlinear dynamic thermal effects has been presented in [65]; however, it is far more complex than the single-pole network used by default in VBIC, AHBT, HICUM and can only be derived from a detailed 3-D thermal model of the device under test.
A simplified, yet slightly less accurate, option (called #4) uses the linearized dependence on PD given by (16). Here, again PD must be substituted with ΔTj, which leads to the following RTH formulation:
R T H ( T B , Δ T j ) = R T H B 0 2 ( 1 + 1 + 2 α T B Δ T j )
or equivalently
R T H ( T B , Δ T j ) = R T H B 0 2 ( 1 + 1 + 4 ζ P ( T B ) R T H B 0 Δ T j )
in turn representing the linearized version of (80). In this case, RTH in the thermal network of Figure 7a must be implemented as a nonlinear resistor given by (82). Owing to the findings obtained before, using (82) with RTH00 and α optimized through the “brute-force 2-D search” underestimates RTH at medium/high ΔTj; a fairly good level of accuracy can instead be achieved by using (83) with ζP as a model parameter optimized at each TB, or equivalently (82) with α optimized at each TB.
It is worth noting that, apart from T0, all the above solutions make use of two parameters only, namely, RTHB0 and α, if RTHB0 is calculated in the preprocessing stage, or RTH00 and α, if RTHB0 is expressed with (9) in the compact model. In the latter case, the computational burden can be alleviated by exploiting the linearized (15), which does not significantly reduce the accuracy.
Unfortunately, the RTH formulations (75) and (78) employed in AHBT and HICUM, respectively, do not allow obtaining a favorable match with the accurate single-semiconductor theory. By setting RTH1 in (75) and RTH in (78) equal to the RTH00 value simulated by COMSOL, the RTH vs. ΔTj behavior determined by (75) and (78) strongly disagree with that corresponding to (80), independently of the choice of parameters XTH1 in (75) or alrth and zetarth in (78). In conclusion, the available thermal networks embedded in compact transistor models either do not consider or improperly account for nonlinear thermal effects. Hence, one of the implementations of the single-semiconductor theory (#1 to #4) should be suggested for their future releases.
Lastly, it is important to remark that all the results obtained with the simulation and modeling analyses performed in Section 4 and Section 5 can be safely extended down to TB = 250 K since the adopted laws for the thermal conductivities of all materials are still approximately valid in the range 250 to 300 K.

6. Conclusions

This paper is intended to offer a comprehensive overview of nonlinear thermal effects in bipolar transistors from a manifold perspective. In particular, the work includes: (i) a theoretical discussion on the underlying physics and an analytical model for the influence of such effects on the thermal resistance, rigorously valid only for an ideal, very simple device homogeneously composed of one semiconductor (single-semiconductor assumption); (ii) a critical review of the available experimental techniques to identify the impact of nonlinear effects on the thermal resistance; (iii) a detailed 3-D numerical simulation campaign of state-of-the-art HBTs in InGaP/GaAs and Si/SiGe technologies, the results of which are exploited to verify the accuracy of the single-semiconductor theory; (iv) a description of the thermal resistance formulations embedded in the most relevant compact bipolar transistor models; (v) some proposals for the implementation of the single-semiconductor expressions in future releases of the compact models.
The main results can be summarized as follows.
  • The theoretical analysis has allowed emphasizing a sometimes-overlooked aspect, i.e., that the thermal resistance suffers from two distinct nonlinear thermal effects associated with the backside temperature and dissipated power, and cannot be considered solely a function of the junction temperature.
  • Only the techniques conceived by Bovolon et al. and Yeats allow the extraction of thermal resistance as a function of the backside temperature and dissipated power without imposing any analytical formulation for these dependences. However, the technique of Bovolon et al. is “differential” and thus prone to errors if not cautiously applied, while that of Yeats is based on a delicate and questionable thermometer calibration procedure.
  • The detailed 3-D simulation campaign, performed to obtain realistic thermal resistance data as a function of backside temperature and dissipated power, has allowed demonstrating that the nonlinear thermal effects in a real transistor can be accurately described with the single-semiconductor approach if a proper parameter optimization is carried out.
  • Conversely, the thermal resistance formulations used in the latest releases of compact bipolar transistor models for circuit simulators either do not include nonlinear thermal effects or improperly account for them. Some proposals for improving the implementation of such effects have been made, all inspired by the theory of the single-semiconductor device.

Author Contributions

Methodology, V.d.; software, V.d., A.P.C., C.S. and L.C.; investigation, V.d., M.M., M.S. and P.J.Z.; writing—original draft preparation, V.d.; writing—review and editing, V.d.; supervision, V.d., A.P.C., C.S., M.M., M.S. and P.J.Z. All authors have read and agreed to the published version of the manuscript.

Funding

Markus Müller and Michael Schröter acknowledge partial financial support from the German National Science Foundation (Deutsche Forschungsgemeinschaft), DFG project SCHR695/21. The funding for the Ph.D. activity of Ciro Scognamillo was generously donated by the Rinaldi family in the memory of Niccolò Rinaldi, a bright Professor and Researcher of University of Naples Federico II, who prematurely passed away in 2018.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Acknowledgments

The authors wish to thank Klaus Aufinger for providing the technology/geometry details of the Si/SiGe HBT analyzed in the paper.

Conflicts of Interest

The authors declare no conflict of interest.

Nomenclature

βFcommon-emitter forward current gain
BVCBOopen-emitter breakdown voltage [V]
BVCEOopen-base breakdown voltage [V]
Tj = TjTBjunction temperature rise over backside temperature [K]
fMAXmaximum oscillation frequency [Hz]
fTunity-gain cut-off frequency (or transition frequency) [Hz]
IBbase current [A]
ICcollector current [A]
IEemitter current [A]
kthermal conductivity [W/µmK]
PDdissipated power [W]
RBparasitic base series resistance [Ω]
REparasitic emitter series resistance [Ω]
RTH or RTH(TB,PD)self-heating thermal resistance [K/W]
RTH00 = RTH(TB = T0,PD→0 W)self-heating thermal resistance at TB = T0 and a very low PD (ideally for PD→0 W)
RTH0P = RTH(TB = T0,PD)self-heating thermal resistance at TB = T0 and an arbitrary PD
RTHB0 = RTH(TB,PD→0 W)self-heating thermal resistance at a generic TB and a very low PD (ideally for PD→0 W)
TBbackside (or baseplate, or ambient) temperature [K]
Tjaverage temperature of the base-emitter junction (junction temperature) at arbitrary TB and PD [K]
Tj00junction temperature at TB = T0 and a very low PD [K]
Tj0Pjunction temperature at TB = T0 and an arbitrary PD [K]
TjB0junction temperature at an arbitrary TB and a very low PD [K]
T0 = 300 Kreference temperature [K]
VAFforward Early voltage [V]
VBEexternally applied base-emitter voltage [V]
VBEj = VBERB·IBRE·IEinternal (or junction) base-emitter voltage [V]
VCBexternally applied collector-base voltage [V]
VCEexternally applied collector-emitter voltage [V]

Abbreviations

AlGaAsternary alloy formed by introducing a given mole fraction of aluminum (Al) in the place of Ga in the GaAs lattice
BJTbipolar junction transistor
Cucopper
ETelectrothermal
FEMfinite-element method
GaAsgallium arsenide
GaNgallium nitride
HBTheterojunction bipolar transistor
InGaAsternary alloy created by introducing an assigned mole fraction of indium (In) in the place of Ga in the GaAs lattice
InGaPternary alloy formed by replacing a given mole fraction of Ga with indium (In) in the GaP lattice
InPindium phosphide
NDRnegative differential resistance
NTCnegative temperature coefficient
PDRpositive differential resistance
PTCpositive temperature coefficient
Sisilicon
SiCsilicon carbide, with 4H-SiC and 6H-SiC polytypes
SiGesilicon-germanium: binary alloy formed by substituting an assigned mole fraction of Si with germanium (Ge) in the Si lattice

References

  1. Nenadović, N.; d’Alessandro, V.; Nanver, L.K.; Tamigi, F.; Rinaldi, N.; Slotboom, J.W. A back-wafer contacted silicon-on-glass integrated bipolar process–Part II: A novel analysis of thermal breakdown. IEEE Trans. Electron Devices 2004, 51, 51–62. [Google Scholar] [CrossRef]
  2. Rinaldi, N.; d’Alessandro, V. Theory of electrothermal behavior of bipolar transistors: Part I–Single-finger devices. IEEE Trans. Electron Devices 2005, 52, 2009–2021. [Google Scholar] [CrossRef]
  3. La Spina, L.; d’Alessandro, V.; Russo, S.; Rinaldi, N.; Nanver, L.K. Influence of concurrent electrothermal and avalanche effects on the safe operating area of multifinger bipolar transistors. IEEE Trans. Electron Devices 2009, 56, 483–491. [Google Scholar] [CrossRef]
  4. Lee, C.-P.; Tao, N.G.M.; Lin, B.J.-F. Studies of safe operating area of InGaP/GaAs heterojunction bipolar transistors. IEEE Trans. Electron Devices 2014, 61, 943–949. [Google Scholar] [CrossRef]
  5. Russo, S.; La Spina, L.; d’Alessandro, V.; Rinaldi, N.; Nanver, L.K. Influence of layout design and on-wafer heatspreaders on the thermal behavior of fully-isolated bipolar transistors: Part II—Dynamic analysis. Solid-State Electron. 2010, 54, 754–762. [Google Scholar] [CrossRef]
  6. Liu, W.; Khatibzadeh, A. The collapse of current gain in multi-finger heterojunction bipolar transistors: Its substrate temperature dependence, instability criteria, and modeling. IEEE Trans. Electron Devices 1994, 41, 1698–1707. [Google Scholar] [CrossRef]
  7. La Spina, L.; d’Alessandro, V.; Russo, S.; Nanver, L.K. Thermal design of multifinger bipolar transistors. IEEE Trans. Electron Devices 2010, 57, 1789–1800. [Google Scholar] [CrossRef]
  8. Sevimli, O.; Parker, A.E.; Fattorini, A.P.; Mahon, S.J. Measurement and modeling of thermal behavior in InGaP/GaAs HBTs. IEEE Trans. Electron Devices 2013, 60, 1632–1639. [Google Scholar] [CrossRef]
  9. d’Alessandro, V.; Catalano, A.P.; Codecasa, L.; Zampardi, P.J.; Moser, B. Accurate and efficient analysis of the upward heat flow in InGaP/GaAs HBTs through an automated FEM-based tool and Design of Experiments. Int. J. Numer. Model.-Electron. Netw. Devices Fields 2019, 32, e2530. [Google Scholar] [CrossRef]
  10. d’Alessandro, V.; Catalano, A.P.; Scognamillo, C.; Codecasa, L.; Zampardi, P.J. Analysis of electrothermal effects in devices and arrays in InGaP/GaAs HBT technology. Electronics 2021, 10, 757. [Google Scholar] [CrossRef]
  11. d’Alessandro, V.; Marano, I.; Russo, S.; Céli, D.; Chantre, A.; Chevalier, P.; Pourchon, F.; Rinaldi, N. Impact of layout and technology parameters on the thermal resistance of SiGe:C HBTs. In Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Austin, TX, USA, 4–6 October 2010; pp. 137–140. [Google Scholar]
  12. Sahoo, A.K.; Frégonèse, S.; Weiß, M.; Malbert, N.; Zimmer, T. A scalable electrothermal model for transient self-heating effects in trench-isolated SiGe HBTs. IEEE Trans. Electron Devices 2012, 59, 2619–2625. [Google Scholar] [CrossRef] [Green Version]
  13. d’Alessandro, V.; Sasso, G.; Rinaldi, N.; Aufinger, K. Influence of scaling and emitter layout on the thermal behavior of toward-THz SiGe:C HBTs. IEEE Trans. Electron Devices 2014, 61, 3386–3394. [Google Scholar] [CrossRef]
  14. d’Alessandro, V.; Magnani, A.; Codecasa, L.; Rinaldi, N.; Aufinger, K. Advanced thermal simulation of SiGe:C HBTs including back-end-of-line. Microelectron. Reliab. 2016, 67, 38–45. [Google Scholar] [CrossRef]
  15. Balanethiram, S.; Berkner, J.; D’Esposito, R.; Frégonèse, S.; Céli, D.; Zimmer, T. Extracting the temperature dependence of thermal resistance from temperature-controlled DC measurements of SiGe HBTs. In Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Miami, FL, USA, 19–21 October 2017; pp. 94–97. [Google Scholar]
  16. Balanethiram, S.; D’Esposito, R.; Frégonèse, S.; Chakravorty, A.; Zimmer, T. Validation of thermal resistance extracted from measurements on stripe geometry SiGe HBTs. IEEE Trans. Electron Devices 2019, 66, 4151–4155. [Google Scholar] [CrossRef] [Green Version]
  17. Huszka, Z.; Nidhin, K.; Céli, D.; Chakravorty, A. Extraction of compact static thermal model parameters for SiGe HBTs. IEEE Trans. Electron Devices 2021, 68, 491–496. [Google Scholar] [CrossRef]
  18. Rinaldi, N. Thermal analysis of solid-state devices and circuits: An analytical approach. Solid-State Electron. 2000, 44, 1789–1798. [Google Scholar] [CrossRef]
  19. Pacelli, A.; Palestri, P.; Mastrapasqua, M. Compact modeling of thermal resistance in bipolar transistors on bulk and SOI substrates. IEEE Trans. Electron Devices 2002, 49, 1027–1033. [Google Scholar] [CrossRef]
  20. Shanks, H.R.; Maycock, P.D.; Sidles, P.H.; Danielson, G.C. Thermal conductivity of silicon from 300 to 1400°K. Phys. Rev. 1963, 130, 1743–1748. [Google Scholar] [CrossRef]
  21. Maycock, P.D. Thermal conductivity of silicon, germanium, III-V compounds and III-V alloys. Solid-State Electron. 1967, 10, 161–168. [Google Scholar] [CrossRef]
  22. Palankovski, V.; Quay, R. Analysis and Simulation of Heterostructure Devices; Springer: New York, NY, USA, 2004. [Google Scholar]
  23. Glassbrenner, C.J.; Slack, G.A. Thermal conductivity of silicon and germanium from 3°K to the melting point. Phys. Rev. 1964, 134, A1058–A1069. [Google Scholar] [CrossRef]
  24. Lee, S.-S.; Allstot, D.J. Electrothermal simulation of integrated circuits. IEEE J. Solid-State Circuits 1993, 28, 1283–1293. [Google Scholar]
  25. Wybourne, M.N. Thermal conductivity of Si. In Properties of Silicon; Emis Data Review Series; INSPEC: London, UK, 1988. [Google Scholar]
  26. Bonani, F.; Ghione, G. On the application of the Kirchhoff transformation to the steady-state thermal analysis of semiconductor devices with temperature-dependent and piecewise inhomogeneous thermal conductivity. Solid-State Electron. 1995, 38, 1409–1412. [Google Scholar] [CrossRef]
  27. Negus, K.J.; Franklin, R.W.; Yovanovich, M.M. Thermal modeling and experimental techniques for microwave bipolar devices. IEEE Trans. Compon. Hybrids Manuf. Technol. 1989, 12, 680–689. [Google Scholar] [CrossRef]
  28. Walkey, D.J.; Smy, T.J.; Macelwee, T.; Maliepaard, M. Compact representation of temperature and power dependence of thermal resistance in Si, InP and GaAs substrate devices using linear models. Solid-State Electron. 2002, 46, 819–826. [Google Scholar] [CrossRef]
  29. Paasschens, J.C.J.; Harmsma, S.; van der Toorn, R. Dependence of thermal resistance on ambient and actual temperature. In Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Montreal, QC, Canada, 12–14 September 2004; pp. 96–99. [Google Scholar]
  30. Blakemore, J.S. Semiconducting and other major properties of gallium arsenide. J. Appl. Phys. 1982, 53, R123–R181. [Google Scholar] [CrossRef]
  31. Aliev, S.A.; Nashelskii, A.Y.; Shalyt, S.S. Thermal conductivity and thermoelectric power of N-type indium phosphide at low temperatures. Sov. Phys. Solid State 1965, 7, 1287. [Google Scholar]
  32. Jaramillo-Fernandez, J.; Chavez-Angel, E.; Sanatinia, R.; Kataria, H.; Anand, S.; Lourdudoss, S.; Sotomayor-Torres, C.M. Thermal conductivity of epitaxially grown InP: Experiment and simulation. CrystEngComm 2017, 19, 1879–1887. [Google Scholar] [CrossRef] [Green Version]
  33. Harris, G.L. Properties of Silicon Carbide; INSPEC: London, UK, 1995. [Google Scholar]
  34. Goldberg, Y.; Levinshtein, M.R.; Rumyantsev, S.L. Silicon Carbide. In Properties of Advanced Semiconductor Materials: GaN, AlN, InN, BN, SiC, SiGe; Levinshtein, M.E., Rumyantsev, S.L., Shur, M.S., Eds.; John Wiley & Sons, Inc.: New York, NY, USA, 2001; Volume 5, pp. 93–148. [Google Scholar]
  35. Joshi, R.P.; Neudeck, P.G.; Fazi, C. Analysis of the temperature dependent thermal conductivity of silicon carbide for high temperature applications. J. Appl. Phys. 2000, 88, 265–269. [Google Scholar] [CrossRef]
  36. Burgemeister, E.A.; von Muench, W.; Pettenpaul, E. Thermal conductivity and electrical properties of 6H silicon carbide. J. Appl. Phys. 1979, 50, 5790–5794. [Google Scholar] [CrossRef]
  37. Slack, G.A. Thermal conductivity of pure and impure silicon, silicon carbide, and diamond. J. Appl. Phys. 1964, 35, 3460–3466. [Google Scholar] [CrossRef]
  38. Lienhard, J.H., IV; Lienhard, J.H., V. A Heat Transfer Textbook; Phlogiston Press: Cambridge, MA, USA, 2008. [Google Scholar]
  39. Carlslaw, H.S.; Jaeger, J.C. Conduction of Heat in Solids, 2nd ed.; Oxford University Press: New York, NY, USA, 1959. [Google Scholar]
  40. Joyce, W.B. Thermal resistance of heat sinks with temperature-dependent conductivity. Solid-State Electron. 1975, 18, 321–322. [Google Scholar] [CrossRef]
  41. Necati Özişik, M. Boundary Value Problems of Heat Conduction; Dover Publications: New York, NY, USA, 1989. [Google Scholar]
  42. Poulton, K.; Knudsen, K.L.; Corcoran, J.J.; Want, K.-C.; Pierson, R.L.; Nubling, R.B.; Chang, M.-C.F. Thermal design and simulation of bipolar integrated circuits. IEEE J. Solid-State Circuits 1992, 27, 1379–1387. [Google Scholar] [CrossRef]
  43. Rinaldi, N. Small-signal operation of semiconductor devices including self-heating, with application to thermal characterization and instability analysis. IEEE Trans. Electron Devices 2001, 48, 323–331. [Google Scholar] [CrossRef]
  44. Codecasa, L.; d’Alessandro, V.; Magnani, A.; Rinaldi, N. Compact dynamic modeling for fast simulation of nonlinear heat conduction in Ultra-Thin Chip Stacking technology. IEEE Trans. Components, Packag. Manuf. Technol. 2014, 4, 1785–1795. [Google Scholar] [CrossRef] [Green Version]
  45. Yeats, B. Inclusion of topside metal heat spreading in the determination of HBT temperatures by electrical and geometrical methods. In Proceedings of the Technical Digest of the IEEE GaAs Integrated Circuits (GaAs IC) Symposium, Monterey, CA, USA, 17–20 October 1999; pp. 59–62. [Google Scholar]
  46. d’Alessandro, V.; Rinaldi, N. A critical review of thermal models for electro-thermal simulation. Solid-State Electron. 2002, 46, 487–496. [Google Scholar] [CrossRef]
  47. Marsh, S.P. Direct extraction technique to derive the junction temperature of HBT’s under high self-heating bias conditions. IEEE Trans. Electron Devices 2000, 47, 288–291. [Google Scholar] [CrossRef]
  48. Menozzi, R.; Barrett, J.; Ersland, P. A new method to extract HBT thermal resistance and its temperature and power dependence. IEEE Trans. Device Materials Reliab. 2005, 5, 595–601. [Google Scholar] [CrossRef]
  49. Müller, M.; d’Alessandro, V.; Falk, S.; Weimer, C.; Jin, X.; Krattenmacher, M.; Kuthe, P.; Claus, M.; Schröter, M. Methods for extracting the temperature and power dependent thermal resistance for SiGe and III-V HBTs from DC measurements: A review and comparison across technologies. IEEE Trans. Electron Devices 2022, 69, 4064–4074. [Google Scholar] [CrossRef]
  50. Bovolon, N.; Baureis, P.; Müller, J.-E.; Zwicknagl, P.; Schultheis, R.; Zanoni, E. A simple method for the thermal resistance measurement of AlGaAs/GaAs heterojunction bipolar transistors. IEEE Trans. Electron Devices 1998, 45, 1846–1848. [Google Scholar] [CrossRef]
  51. Dawson, D.E.; Gupta, A.K.; Salib, M.L. CW measurements of HBT thermal resistance. IEEE Trans. Electron Devices 1992, 39, 2235–2239. [Google Scholar] [CrossRef]
  52. Pfost, M.; Kubrak, V.; Brenner, P. A practical method to extract the thermal resistance for heterojunction bipolar transistors. In Proceedings of the IEEE conference on European Solid-State Device Research (ESSDERC), Estoril, Portugal, 16–18 September 2003; pp. 335–338. [Google Scholar]
  53. Nenadović, N.; d’Alessandro, V.; La Spina, L.; Rinaldi, N.; Nanver, L.K. Restabilizing mechanisms after the onset of thermal instability in bipolar transistors. IEEE Trans. Electron Devices 2006, 53, 643–653. [Google Scholar] [CrossRef]
  54. Zweidinger, D.T.; Fox, R.M.; Brodsky, J.S.; Jung, T.; Lee, S.-G. Thermal impedance extraction for bipolar transistors. IEEE Trans. Electron Devices 1996, 43, 342–346. [Google Scholar] [CrossRef]
  55. Berkner, J. Extraction of Thermal Resistance and Its Temperature Dependence Using DC Methods. Presentation Held at HICUM Workshop, Dresden, Germany, 18–19 June 2007. Available online: https://www.iee.et.tu-dresden.de/iee/eb/forsch/Models/workshop0607/contr/Berkner_Infineon_HICUM_WS_2007_Dresden_070621s.pdf (accessed on 15 April 2022).
  56. d’Alessandro, V. Experimental DC extraction of the thermal resistance of bipolar transistors taking into account the Early effect. Solid-State Electron. 2017, 127, 5–12. [Google Scholar] [CrossRef]
  57. COMSOL Multiphysics User’s Guide, Release 5.2A, 2016. Available online: https://www.comsol.it/ (accessed on 1 October 2020).
  58. VBIC–Vertical Bipolar Intercompany Model, Release 1.2.1. Available online: https://designers-guide.org/vbic/ (accessed on 15 April 2022).
  59. van der Toorn, R.; Paasschens, J.C.J.; Kloosterman, W.J. The Mextram Bipolar Transistor Model—Level 504.7, Mextram Definition Document, March 2008. Available online: https://www.nxp.com/wcm_documents/models/bipolar-models/mextram/mextramdefinition_504.7.pdf (accessed on 15 April 2022).
  60. AgilentHBT Model (Agilent Heterojunction Bipolar Transistor Model). Available online: https://edadocs.software.keysight.com/pages/viewpage.action?pageId=6262855 (accessed on 15 April 2022).
  61. Schröter, M.; Chakravorty, A. Compact Hierarchical Bipolar Transistor Modeling with HICUM; World Scientific Publishing: Singapore, 2010. [Google Scholar]
  62. Schröter, M.; Pawlak, A. HICUM/L2–A Geometry Scalable Physics-Based Compact Bipolar Transistor Model, Documentation of Model Version 2.4.0, March 2017. Available online: https://www.iee.et.tu-dresden.de/iee/eb/forsch/Hicum_PD/Hicum23/hicum_L2V2p4p0_manual.pdf (accessed on 15 April 2022).
  63. PathWave Advanced Design System (ADS) 2022. Available online: https://www.keysight.com/zz/en/lib/resources/software-releases/pathwave-advanced-design-system-ads-2022.html (accessed on 15 April 2022).
  64. d’Alessandro, V.; D’Esposito, R.; Metzger, A.G.; Kwok, K.H.; Aufinger, K.; Zimmer, T.; Rinaldi, N. Analysis of electrothermal impact-ionization effects in bipolar cascode amplifiers. IEEE Trans. Electron Devices 2018, 65, 431–439. [Google Scholar] [CrossRef]
  65. Codecasa, L.; d’Alessandro, V.; Magnani, A.; Irace, A. Circuit-based electrothermal simulation of power devices by an ultrafast nonlinear MOR approach. IEEE Trans. Power Electron. 2016, 31, 5906–5916. [Google Scholar] [CrossRef]
Figure 1. Thermal resistance RTH as a function of (a) dissipated power PD and (b) junction temperature Tj at TB = 300, 320, 340, 360, 380, 400 K.
Figure 1. Thermal resistance RTH as a function of (a) dissipated power PD and (b) junction temperature Tj at TB = 300, 320, 340, 360, 380, 400 K.
Energies 15 05457 g001
Figure 2. COMSOL environment: (a) geometry of the InGaP/GaAs HBT under test and (b) corresponding mesh.
Figure 2. COMSOL environment: (a) geometry of the InGaP/GaAs HBT under test and (b) corresponding mesh.
Energies 15 05457 g002
Figure 3. COMSOL environment: (a) geometry of the Si/SiGe HBT under test and (b) related mesh.
Figure 3. COMSOL environment: (a) geometry of the Si/SiGe HBT under test and (b) related mesh.
Energies 15 05457 g003
Figure 4. RTH vs. PD for TB spanning the range 300 to 450 K for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared with (13) where α was calibrated at very low dissipated power (solid brown lines), as shown in Figure 5.
Figure 4. RTH vs. PD for TB spanning the range 300 to 450 K for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared with (13) where α was calibrated at very low dissipated power (solid brown lines), as shown in Figure 5.
Energies 15 05457 g004
Figure 5. Zero-power thermal resistance RTHB0 as a function of TB for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared to (9) with optimized α (solid red line) and (15) with calibrated ζB (dashed blue line).
Figure 5. Zero-power thermal resistance RTHB0 as a function of TB for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared to (9) with optimized α (solid red line) and (15) with calibrated ζB (dashed blue line).
Energies 15 05457 g005
Figure 6. RTH vs. PD with TB spanning the range 300 to 450 K for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared with (13) where RTH00 and α were optimized through a “brute-force 2-D search” carried out over all the simulated RTH values (solid red lines), and with (16) using the RTHB0 vs. TB values determined by COMSOL and ζP calibrated at each TB (dashed blue lines).
Figure 6. RTH vs. PD with TB spanning the range 300 to 450 K for (a) the InGaP/GaAs HBT and (b) the Si/SiGe HBT. COMSOL data (symbols) are compared with (13) where RTH00 and α were optimized through a “brute-force 2-D search” carried out over all the simulated RTH values (solid red lines), and with (16) using the RTHB0 vs. TB values determined by COMSOL and ζP calibrated at each TB (dashed blue lines).
Energies 15 05457 g006
Figure 7. Equivalent thermal network included (a) in VBIC, Mextram 504, HICUM, and (b) in AHBT.
Figure 7. Equivalent thermal network included (a) in VBIC, Mextram 504, HICUM, and (b) in AHBT.
Energies 15 05457 g007
Table 1. Quoted values of parameters in (3), (4) for the most important semiconductors and metals in electron devices.
Table 1. Quoted values of parameters in (3), (4) for the most important semiconductors and metals in electron devices.
Materialk(T0) [W/µmK]αβ [K−1]
Si1.422 × 10−4 [20]
1.45 × 10−4 [21]
1.48–1.54 × 10−4 [22] and references therein
1.56 × 10−4 [23]
1.25 [24]
1.3 [25], also reported in [26]
1.33 from elaboration of data in [20], and [27] from elaboration of data in [21]
1.4 [28] from elaboration of data in [23]
1.65 [22], although 1.3 seems better (see Ref. [2] in [29])
-
GaAs0.44 × 10−4 [21]
0.37–0.46 × 10−4 [22] and references therein
0.55 × 10−4 [30]
1.25 [22] and references therein
1.27 [28] from elaboration of data in [30]
-
GaN1.25–1.5 × 10−4 [22] and references therein0.43 [22] and references therein-
InP0.68 × 10−4 [22] and references therein, [31]
0.696 × 10−4 [32]
1.4 [22] and references therein
1.48 [31], also reported in [28]
4H-SiC3.7 × 10−4 [33,34]1.29 [35]-
6H-SiC3.2–4.9 × 10−4 [22] and references therein
3.87 × 10−4 for the conductivity normal to the c axis; a value 30% lower for the conductivity parallel to the c axis [36]
4.9 × 10−4 [33,34,37]
1.29 [35]
1.49 for the conductivity normal to the c axis [36]
-
Al2.39 × 10−4 from elaboration of data in [38]-2.1 × 10−8 from elaboration of data in [38]
Cu3.97 × 10−4 from elaboration of data in [38]-5.2 × 10−8 from elaboration of data in [38]
Table 2. Main features of the experimental RTH extraction techniques explicitly accounting for nonlinear thermal effects.
Table 2. Main features of the experimental RTH extraction techniques explicitly accounting for nonlinear thermal effects.
TechniqueRTH Extraction ProcedureAdvantages, Approximations, and Limitations
Bovolon et al. [50]RTH is experimentally extracted as a function of TB and PD with an extended version of the approach in [51]. For each (TB,PD) couple, two IB-constant ICVCE (and the related VBEVCE) characteristics at TB and TB + ΔTB have to be measured.The technique allows extracting RTH(TB,PD) without any analytical assumption on the dependence of RTH on TB and PD. However, the (TB,PD), (TB,PD + ΔPD), (TB + ΔTB,PD) couples needed for the evaluation of ϕ and RTH(TB,PD) must be cautiously selected. Moreover, the approach is “differential”, being based on differences between two VBE values, and thus it may suffer from a relatively high inaccuracy.
Yeats [45]RTH is experimentally extracted as a function of TB and PD with an improved version of the approach in [51]. It requires the measurement of some IE-constant VBEVCE characteristics at various TB values.The technique allows extracting RTH(TB,PD) without any assumption on the dependence of RTH on TB and PD. Questionable points are the accuracy of the extrapolation step needed to calibrate the VBETj thermometer, and the direct use of the thermometer to evaluate Tj for each VBE, which makes the extracted Tj (and the related RTH) too sensitive to the precision in the VBE measurements.
Marsh [47]RTHB0 is experimentally extracted as a function of TB at low power. The technique requires the measurement of three IB-constant ICVCE characteristics at different TB values.A linear increase of RTHB0 on TB is assumed. The PD dependence of RTH is not considered.
Paasschens et al. [29]RTHB0 is experimentally extracted as a function of TB at low power by resorting to the approach in [54], which for each TB requires the measurement of three IBVBE characteristics.The technique does not extract the PD dependence of RTH, and uses only low-power data to optimize parameter α to be applied in (13). In addition, the “differential” approach in [54] may suffer from a significant inaccuracy if not carefully applied.
Menozzi et al. [48]RTH is experimentally extracted as a function of TB and PD. The technique requires the measurements of some IB-constant ICVCE characteristics by varying TB.A linear behavior of RTH(TB,PD) on PD with a TB-sensitive slope is assumed. The dependence of ICF) on Tj under IB-constant conditions is assumed to be linear, while being exponential. Lastly, the technique cannot be applied to Si BJTs with significant Early effect.
Berkner [55] and Balanethiram et al. [15]RTH is experimentally extracted as a function of Tj by identifying the intersection point between two ICVBE curves at different couples (VCE1,TB1) and (VCE2,TB2) with VCE1 < VCE2 and TB1 > TB2.The technique is intrinsically affected by the assumption that RTH is only a function of Tj, while it can assume different values for a given Tj, depending on TB. The intersection point should be taken in a region where the Kirk effect does not occur. The method cannot be applied to Si BJTs with significant Early effect.
Huszka [17]It is an improved variant of Berkner’s method [55]. It imposes (13) or the linearized (17) to describe the separate dependence of RTH on TB and PD. It requires the measurements of several ICVBE curves at various VCE and TB values.Reliable values for parameters RTH00 and α in (13) or (17) can be achieved by applying an optimization procedure to many intersection points determined as proposed by Berkner [55].
Table 3. Key features of the InGaP/GaAs NPN HBT under test.
Table 3. Key features of the InGaP/GaAs NPN HBT under test.
ParameterValue
Common-emitter current gain βF at 300 K and medium current levels135
Open-emitter breakdown voltage BVCBO27 V
Open-base breakdown voltage BVCEO17 V
Peak cut-off frequency fT for VCE = 3 V40 GHz
Collector current density JC at peak fT for VCE = 3 V0.2 mA/µm2
Maximum oscillation frequency fMAX for VCE = 3 V82 GHz
Table 4. Key features of the Si/SiGe NPN HBT under test.
Table 4. Key features of the Si/SiGe NPN HBT under test.
ParameterValue
Common-emitter current gain βF at 300 K and medium current levels1500
Open-emitter breakdown voltage BVCBO5.5 V
Open-base breakdown voltage BVCEO1.6 V
Peak cut-off frequency fT for VCB = 0.5 V240 GHz
Collector current density JC at peak fT for VCB = 0.5 V10 mA/µm2
Maximum oscillation frequency fMAX for VCB = 0.5 V380 GHz
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Share and Cite

MDPI and ACS Style

d’Alessandro, V.; Catalano, A.P.; Scognamillo, C.; Müller, M.; Schröter, M.; Zampardi, P.J.; Codecasa, L. Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update. Energies 2022, 15, 5457. https://doi.org/10.3390/en15155457

AMA Style

d’Alessandro V, Catalano AP, Scognamillo C, Müller M, Schröter M, Zampardi PJ, Codecasa L. Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update. Energies. 2022; 15(15):5457. https://doi.org/10.3390/en15155457

Chicago/Turabian Style

d’Alessandro, Vincenzo, Antonio Pio Catalano, Ciro Scognamillo, Markus Müller, Michael Schröter, Peter J. Zampardi, and Lorenzo Codecasa. 2022. "Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update" Energies 15, no. 15: 5457. https://doi.org/10.3390/en15155457

APA Style

d’Alessandro, V., Catalano, A. P., Scognamillo, C., Müller, M., Schröter, M., Zampardi, P. J., & Codecasa, L. (2022). Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update. Energies, 15(15), 5457. https://doi.org/10.3390/en15155457

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop