Motor Stator Insulation Stress Due to Multilevel Inverter Voltage Output Levels and Power Quality ^†

Abstract

Multilevel Inverters (MLIs) are widely sought after in medium-voltage applications like electric ships, electric aircraft, and renewable energy integration due to excellent advantages like lower device stress, better power quality, and modularity. However, non-sinusoidal excitations from MLIs pose a serious problem to motor-insulation and lead to their premature breakdown. This paper investigates stress in medium-voltage motor insulation when the stator winding is excited by 3-, 5-, and 7-level multilevel inverter output waveforms. The effect of firing angle on insulation stress is also studied for each of the multilevel inverters. Results show that in addition to the number of output voltage levels, PWM wave shape is a critical factor which affects the insulation stress. Both these factors work together to impact the insulation health. A strong correlation is shown between the increase in the voltage root mean square (RMS) value and increase in dielectric stress when ignoring the dv/dt impact for a fixed DC input voltage and operating frequency of the inverter. Similarly, the dielectric stress in the stator insulation increased with an increase in firing angle for each of the MLIs. This paper shows a potential that both the RMSs can be optimized to reduce the insulation stress and improve the power quality of MLIs in medium voltage drives.

1. Introduction

Multilevel inverters (MLIs) have revolutionized the power electronic drives industry [1]. With their many topologies and control schemes catering to a large variety of applications, MLIs have been replacing conventional 2-level inverters, especially in medium- and high-voltage applications. One of the major advantages of MLIs is the higher power quality when compared to the conventional two-level inverters. It is possible to produce output voltages with very low Total Harmonic Distortion (THD) resembling sine waves, reducing the effort for filtering [2].

Despite the numerous advantages, that have been widely explored, their effect on insulation stress is relatively unknown. The operating voltages, switching frequencies, and the wave shapes of inverter outputs tremendously affect the insulation systems in loads that are fed by MLIs. Conventional insulation systems in motor drives were designed for sinusoidal excitations at power frequency. High frequency staircases, such as waveform outputs by multi-level inverters, stress the insulation differently and their effect on insulation breakdown is not fully understood. Additionally, wide-bandgap devices like Silicon Carbide (SiC) and Gallium Nitride (GaN) have a large dielectric breakdown strength and enable high switching frequencies, which consequently increase the dv/dt in motor drives. Owing to the large dv/dt, the insulation breaks down prematurely before its lifetime.

Many recent studies employ Partial Discharge (PD) to study the insulation breakdown behavior. According to IEC 60270, PD is defined as a localized dielectric breakdown (which does not completely bridge the space between the two conductors) of a small portion of a solid or fluid electrical insulation (EI) system under high voltage (HV) stress. Ideally, it would be desirable to not have PD, but since no material is perfect, some amount of PD exists in insulation. PD is popularly known as both a symptom and a cause of electrical aging. Thus, PD is a phenomenon that occurs inside an insulation material, which is also used in its diagnosis. Ref. [3] monitors PD uses and neural networks for predictive maintenance of high voltage apparatus. Hammarstrom et. al. have extensively worked on the effect of MLIs on insulation PD in [4,5,6]. According to [4,5,6] medium-voltage, high-frequency MLIs, report a decrease in number of PD events and partial discharge inception voltage (PDIV) in the tested insulation material as the number of voltage levels increases. This is explained by the decrease in dv/dt of MLIs as the number of voltage levels increase. Refs. [4,5,6,7] model the insulation stress for 3-, 5- and 7-level MLIs to examine the cause of this trend in medium voltage machines at a power frequency excited by MLI voltage outputs of specific wave shapes. Another relevant work is [8], which studies the effect of the PWM nature, i.e., voltage step sizes and voltage polarity, and the effect of rise time on insulation stress. It shall be noted that these studies are all based on twisted-pair magnet wire coils with relative low PD inception voltages, and thus further studies of the effects of power quality of multilevel inverter on insulation are needed. Ref. [9] considers PD in the design of the electrical insulation system for high power electrical motors used in hybrid electrical propulsion of future regional aircrafts. Ref. [10] analyzes the coordination of insulation in a modular MLI prototype. Conventionally, specific parts in an insulation system—cables and motor insulation—are designed based on the power rating of the machine. However, there is a need to consider the effects of inverter dv/dt while designing the insulation systems.

There are different insulation sub-systems in a machine-drive, such as power electronic device insulation, cable insulation, and motor stator insulation. Among them, motor-stator ground-wall insulation is very critical because it experiences the highest dielectric stress and is the reason behind 70% of medium- and high-voltage machine failures [11,12]. Thus, this paper evaluates the effect of MLI outputs on motor stator ground-wall insulation systems as shown in Figure 1. Cable insulation and power electronics device insulation have not been considered.

Figure 1. Medium-voltage machine drive with stator ground-wall insulation considered.

There are many locations where insulation failure occurs in the machine, including shorted phase-to-phase windings, shorted turn-to-turn, grounded windings at the edge of a slot, windings grounded in the slot, etc. Reasons for these failures vary and include unbalance in voltages, overload and overheating, air pockets in the insulation material where PD is incipient, and many other reasons. Constant monitoring and diagnosis of insulation system health can prevent operational hazards, improve overall system efficiency, and reduce maintenance cost and down time.

This paper reports two key parameters in evaluating insulation health to avoid failure: dielectric stresses and leakage currents within ground-wall motor-stator insulation. For all analyses, the finite element model of the medium voltage induction machine has been simulated in Ansys Maxwell based on [13]. However, there is no literature that directly studies the impact of firing angle on motor-stator insulation stress. Thus, this paper also investigates the effect of firing angle on insulation stress as an extension of work presented in [14].

2. Insulation Stress

2.1. Dielectric Stress

Dielectric stress in an insulation material is the electric field experienced by the material. The dielectric stress at any point is equal to the potential gradient at that point. For a single conductor, the electric field intensity at any distance R from the center of a cable is given by Equation (1).

$$E=\frac{Q}{2\pi {\epsilon }_0{\epsilon }_{r}R} \mathrm{V}/\mathrm{m}$$

(1)

where ε₀ = absolute permittivity = 8.854 × 10⁻¹² farad/meter and ε_r = relative permittivity.

Evaluation and understanding of dielectric stress of insulation under specific excitation and geometry is crucial in choosing the right insulation for any application. For example, medium-voltage motors excited by MLIs, especially those that use wideband gap devices, experience large dv/dt and fast rise times. As a result, the dielectric stress in the stator ground-wall insulation is greater in medium-voltage motors excited by wide-bandgap MLIs when compared to motors excited by conventional Silicon (Si) based inverters.

Medium-voltage stator winding is usually form-wound as rectangular stator-bars in contrast to random-wound stator windings in low-voltage machines. This causes higher dielectric stress on the corners and is shown in the circled red parts of the zoomed-in dielectric stress contour in Figure 2. Figure 2 shows the contour of dielectric stress in machine stator insulation excited by a 3-level inverter with a phase voltage of 3 kV peak and firing angle φ = π/8 rad in VIBGYOR color palette (red being the highest areas of dielectric stress and blue being low dielectric stress).

Figure 2. Contour of dielectric stress (V/m) in stator ground-wall insulation.

Material defects within the insulation, electrical aging, or improper choice of insulation can cause insulation failure due to high dielectric stress. To ensure safe and reliable operation of medium-voltage motors fed by MLIs, maximum dielectric stress within the insulation must not exceed the onset field of rapid aging of the specific insulation used.

2.2. Leakage Currents

Leakage capacitances are the main source of leakage currents, which is one of the key indicators of insulation health. Leakage currents start to flow overtime as the insulation ages. When an electrical system encounters a grounding fault, and if the insulation system has aged, it can cause failure as the leakage currents can flow even when there is no sign of insulation breakdown. Thus, monitoring of leakage currents is crucial. The leakage capacitance values can be derived in a way that is similar to cable leakage capacitance,

$$C=\frac{2\pi {\epsilon }_0{\epsilon }_r}{ln\left(\frac{R_2}{R_1}\right)} \mathsf{\mu }\mathrm{F}/\mathrm{km}$$

(2)

where $R_1$ and $R_2$ are the insulator’s outer and inner radii.

The magnitude of leakage current density (J) in Figure 3 follows the same contour as Figure 2, but the maximum values of electric field E and J do not happen simultaneously. Rather, they have a phase lag of 90° between when they achieve their maxima. Leakage current vectors also change orientation with changing phase in AC systems. Figure 3 shows a snapshot of the leakage current density vector within the stator ground-wall insulation and gives a clearer picture of leakage current directions due to turn-to-turn and ground-wall capacitances. It is shown in VIBGYOR color palette with the color and length of the vector denoting the magnitude and direction of leakage currents.

Figure 3. Zoomed-in contour of leakage current density vectors (A/m²).

2.3. Total Harmonic Distortion (THD)

THD of an MLI is defined as the amount of harmonic distortion present in its output voltage waveform. It is mathematically represented as the ratio of the sum of the quadratic magnitude of all harmonic components to the fundamental component magnitude.

$$TH{D}_{MLI}=\frac{\sqrt{V_2^2+V_3^2+V_4^2+\dots V_n^2+\dots }}{V_1}$$

(3)

V_n is the root mean square (RMS) value of the nth harmonic voltage and V₁ is the RMS value of the fundamental voltage. Thus, there is a direct relationship between RMS and THD.

In this paper, the second section discusses the analysis and approximation of MLI output waveforms. The third section details the results on dielectric stress and leakage currents in stator ground-wall insulation with a discussion on targeting the power quality and dielectric stress of the MLI followed by a conclusion in the fourth section.

3. Simulations

3.1. Analysis of Multilevel Inverter Output Waveform

For the following analysis, all the MLIs are assumed to be fed by a 3 kV DC power supply and run at a switching frequency of 3 kHz and a fundamental frequency of 60 Hz. Ideal MLI output waveforms of 3-level, 5-level and 7-level inverters have been approximated as f_a(t) as shown in Figure 4, Figure 5 and Figure 6. The approximation is done by considering the first 20 terms in the Fourier series expansion; thus, ‘a’ is the number of terms considered and is equal to 19. All the even harmonics are canceled due to symmetry of the output voltage waveforms leaving out the odd harmonics. The approximated waveform in each case is then fed to the motor stator windings as a per-phase voltage excitation.

Figure 4. 3-level approximated waveform.

Figure 5. 5-level approximated waveform.

Figure 6. 7-level approximated waveform.

Per-phase output of a 3-level inverter is approximated as shown in Figure 4. Considering a symmetric wave, the mathematical representation of a 3-level inverter output voltage is given in Equation (4) where V_dc is the inverter’s input, f is the switching frequency, ${\phi }_1$ is the firing angle at which the voltage transition between the different levels occurs, n is the nth harmonic and ‘a = 20’ is the total number of harmonics considered, in this case it is 20. φ dictates the waveform shape of the inverter output phase voltage. It can also be translated in terms of dead time for the 3-level inverter—as φ increases, the dead time increases. Oscillations shown in Figure 4 are due to the finite number of harmonics considered when constructing the waveform.

$$f_a\left(t\right)=\frac{4V_{dc}}{\pi }\times {\displaystyle \sum }_{n=1,3,5 }^a\frac{\cos \left(n{\phi }_1\right)}{n}\sin \left(n2\pi ft\right)$$

(4)

A per-phase output of a 5-level MLI is shown in Figure 5 to obtain a symmetric wave. The mathematical representation of 5-level inverter output voltage is given in Equation (5).

$$f_a\left(t\right)=\frac{4V_{dc}}{\pi }\times {\displaystyle \sum }_{n=1,3,5 }^a\frac{\left(\cos \left(n{\phi }_1\right)+\cos \left(n{\phi }_2\right)\right)}{n}\sin \left(n2\pi ft\right)$$

(5)

A per-phase output of a 7-level MLI is considered and approximated as shown in Figure 6. The mathematical representation of a 7-level inverter output voltage is given in Equation (6).

$$f_a\left(t\right)=\frac{4V_{dc}}{\pi }\times {\displaystyle \sum }_{n=1,3,5 }^a\frac{\left(\cos \left(n{\phi }_1\right)+\cos \left(n{\phi }_2\right)+\cos \left(n{\phi }_3\right)\right)}{n}\sin \left(n2\pi ft\right)$$

(6)

3.2. Finite Element Modeling of Medium-Voltage Machine

A 4500 HP medium-voltage induction motor was simulated in Ansys Maxwell. The machine parameters have been detailed in Table 1 [15]. Initially, the mechanical design was carried out in Ansys RMxprt tool, a template-based tool for fast design of electric machines. The structural parameters of the machine, electrical setup, operating conditions and basic electrical parameters are fed as inputs in RMxprt. Figure 7 shows the stator slot and rotor slot parameters. Slot dimensions are detailed in Table 1 (under machine ⇒ stator ⇒ slot and machine ⇒ rotor ⇒ slot). Then, a model is generated automatically, corresponding to the machine geometry and excitation. Figure 8 shows the RMxprt model generated in Ansys. Additionally, a rough estimate of the electrical properties such as rated current, voltages, losses, efficiency, etc., and mechanical properties such as speed and torque, etc., of the machine based on the simplified equivalent circuit of the machine are simulated in RMxprt. The machine parameters and the loss coefficients of the materials are chosen to match the loss parameters in [16].

Table 1. Machine simulation parameters used in a Finite element model in Ansys Maxwell.

Machine
Number of Poles		24
Reference Speed		193 RPM
Rated Output Power		4500 HP
Rated Voltage		4160 V
Operating Temperature		75 °C
Winding Connection		Wye
Frequency		40 Hz
Stray Loss Factor		0.00
Frictional Loss		283 W
Windage Loss		0 W
Insulation		Mica (stator ground-wall insulation)
Spacer		FR4-epoxy
Wedge		PTFE
Machine ⇒ Stator		Machine ⇒ Rotor
Outer Diameter Inner Diameter Length Number of Slots Steel Type Slot Type	1170 mm	Number of Slots	108
	950 mm	Outer Diameter	948 mm
	1000 mm	Inner Diameter	180 mm
	144	Length	1000 mm
	M36_24 G	Steel type	M36_24 G
	6	Slot type	3
Machine ⇒ Stator Slot		Machine ⇒ Rotor Slot
Hs0 Hs1 Hs2 Bs1 Bs2	1 mm 2.5 mm 75 mm 12 mm 10 mm	Hs0	1 mm
		Hs01	0 mm
		Hs1	0 mm
		Hs2	30 mm
		Bs0	4 mm
		Bs1	10 mm
		Bs2	10 mm
		Rs	0 mm
Machine ⇒ Stator Winding		Machine ⇒ Rotor Winding
Winding material Pitch Number of Strands Winding Type Winding Layers Parallel Branches Conductors per Slot Wire Size	Copper 5 1 Whole-Coiled 2 2 10 8 mm × 4.4 mm	Bar Conductor	Copper
		End Length	25 mm
		End Ring Width	25 mm
		End Ring Height	25 mm

Figure 7. Parameters of a stator slot and a rotor slot. (a) Stator Slot dimensions. (b) Rotor Slot dimensions.

Figure 8. Ansys RMxprt model of medium voltage machine.

With the results from RMxprt, a 2-dimensional (2D) FEA model of the medium-voltage motor is created using the built-in function in ANSYS Maxwell. The cross section of the motor and a zoomed-in view of the stator slot is shown in Figure 9. Each stator slot has two copper stator windings (upper and lower) surrounded by an individual winding insulation. This is also called as stator groundwall insulation. The stator-ground wall insulation material was chosen as Mica. The properties of Mica used in the simulation have been listed in Table 2. Both the windings are separated by a space made of FR4 glass epoxy. The stator slot is closed by a wedge made of Polytetrafluoroethylene (PTFE). The geometry and material assignments of the different parts of the motor are listed in Table 3.

Figure 9. 2D FEA model of the medium-voltage machine. Different parts of the motor are numbered and listed in Table 3.

Table 2. Properties of Mica.

Property	Value
Relative permittivity	5.4
Relative permeability	1
Bulk conductivity	1.11 × 10−13 Siemen/m
Dielectric loss tangent	0.0003
Mass density	2500 kg/m3

Table 3. Parts of medium voltage machine in Ansys Maxwell FEM model.

#	Machine Part	Material
1	Stator Core	M36 Steel
2	Stator Winding Bar	Copper
3	Rotor Core	M36 Steel
4	Rotor Bar	Copper
5	Stator ground-wall insulation	Mica
6	Spacer	FR4-epoxy
7	Wedge	PTFE

Due to the symmetry of the machine, only a part of the cross-section is used for electro-magnetic simulation in Maxwell and the entire machine is replicated using a master-slave boundary condition. Material assignments, boundary conditions, mesh generation, voltage source excitations, operating conditions, analysis setup and result field plots are set automatically during creation to avoid the drawing and setup of the FEA model from scratch. An automatically generated 2D model is modified to include the stator ground wall insulation layer. Additionally, spacers and wedges are added to show a more realistic stator winding system.

4. Results

4.1. Effect of Increase in Number of Voltage Levels

The approximated inverter output voltages in Section 2 are fed as per-phase voltage excitations to the motor phase windings. The dielectric stress and leakage currents within stator ground-wall insulation for all the three levels of the MLI output waveforms were analyzed. The contour of the dielectric stress distribution for these three different cases are similar to Figure 2 but are differ in magnitude. The maximum values of the electric field within the motor stator insulation (E) and current density within stator spacers and insulation (J) are summarized in Table 3 below.

When the peak values of the voltage level is matched to the same voltage, it can be seen from Table 4 that the dielectric stress decreases with an increase in MLI voltage level, which is attributed to the RMS (Root Mean Square) values of voltage as the number of levels increases. Similarly, it can be seen that the leakage current increases with the increase in the number of voltage levels. The orientation of the leakage current vectors changes as the number of voltage levels changes because of changing inter-turn and ground-wall capacitance.

Table 4. Effect of increase in voltage levels on stator ground-wall insulation.

MLI Levels	Firing Angles (rad)	RMS (V) Peak Values of MLI Matched to 3000 V	Maximum Dielectric Stress (MV/m)	Maximum Leakage Current Density (A/m2)
2	0	3000	2.91	0.0526
3	π/4	1244.5	0.773	0.0175
5	π/6, π/3	641.74	0.668	0.0119

For different numbers of voltage levels in MLIs, as $\phi$ increases, the maximum value of dielectric stress and the current density is strongly correlated with the increase in RMS in the absence of any internal voids/impurities which cause PD. Similarly, it is well established that the power quality of the MLI output depends on the RMS value of the waveform. As Total Harmonic Distortion (THD) and insulation stresses depend on RMS, it can be independently selected to achieve both lower dielectric stress and a lower THD.

Many studies like [5] experimentally study the effect of MLI voltage levels on PD in the presence of internal voids/impurities in insulation. Though the RMS value of voltage increases with an increase in the number of MLI voltage levels, the results in [5] show a decrease in the actual number of PD events. This decrease in PD events is due to reduced dv/dt, causing a less frequent breakdown of the internal voids/impurities. As these simulations do not capture voids/impurities and dv/dt, a direct comment cannot be made on the dielectric stress in materials without any impurities.

4.2. Effect of Increase in Firing Angle

Firing angles of the inverter switches are chosen differently for different applications. Applications involving motor control involve choice of firing angles based on torque and/or speed requirements [17]. Applications like selective harmonic elimination used in power quality control employ a choice of firing angles, such that one or more harmonics are eliminated [18]. The effect of firing angle choice on dielectric stress of the insulation is investigated to be able to comment on the best ways to switch the inverter to reduce stress on the motor stator insulation. An approximated 3-level inverter output voltage waveform, like that shown in Figure 4b, is considered and tested for four different firing angles: $\frac{\mathsf{\pi }}{8}, \frac{\mathsf{\pi }}{6}, \frac{\mathsf{\pi }}{4}, \frac{\mathsf{\pi }}{3},$ as shown in Figure 10.

Figure 10. Effect of increasing firing angle in a 3-level inverter.

Maximum dielectric stress and the leakage current density of the four different scenarios are summarized in Table 5 and in Figure 11. As the considered waveform of a 3-level inverter is a function of $\cos \left(n{\phi }_i\right)\frac{\sin \left(n\omega t\right)}{n}$ and cosine is decreasing function in the interval of ($0,\frac{\mathsf{\pi }}{2}$), the RMS value of the per-phase voltage decreases. Thereby, the maximum dielectric stress and leakage current density decrease as the firing angle increases. Thus, PWM schemes leading to inverter output waveforms with larger firing angles should be chosen when applicable to reduce the dielectric stress on motor-stator insulation.

Table 5. Effect of increase in firing angles for 3-level inverter output.

$\mathit{\phi }$ (rad)	RMS (V)	THD %	Maximum Dielectric Stress (MV/m)	Maximum Leakage Current Density (A/m2)
$\mathsf{\pi }/8$	2580.60	18.64%	1.913	0.035
$\mathsf{\pi }/6$	2431.77	20.10%	1.3572	0.0245
$\mathsf{\pi }/4$	2099.73	32.3%	0.97169	0.0175
$\mathsf{\pi }/3$	1704.18	54.42%	0.65882	0.0119

Figure 11. Effect of increasing firing angle in a 3-level inverter. Left Vertical axis: RMS in kV; Maximum Dielectric stress in MV/m; Maximum leakage current density in 10⁻² A/m²; Right Vertical axis: THD in %.

From Figure 9, for 3-level inverters, as $\phi$ increases, THD increases for the chosen $\phi$. However, as the value of RMS voltage decreases, the maximum dielectric stress decreases. THD and insulation stresses are dependent on the MLI output waveform shape. There has to be a compromise in choosing the THD if a lower insulation stress is desired. Similarly, if the MLIs are designed only for better power quality with a lower THD, they stress the motor, causing faster insulation breakdown in the 3-level inverter.

In the case of 5- and 7-level MLIs, maximum dielectric stress, maximum leakage current density and THD need not be inversely correlated as seen in Table 6 and Table 7 and Figure 12 and Figure 13. The maximum dielectric stress and maximum leakage current density are still strongly influenced by the RMS value. However, THD is strongly dependent on the MLI wave shape. It is not only dependent on RMS value, but also on the firing angles, number of voltage levels, and voltage magnitude. With multiple firing angles in MLIs, there are multiple possibilities to obtain a close to sinusoidal output in order to minimize THD. For the reduction of maximum dielectric stress and maximum leakage current density, minimizing the RMS value of the waveform is a good approach. Thus, the MLI output waveform shape can be carefully designed to achieve both lower dielectric stress and a lower THD.

Table 6. Effect of the increase in firing angles for 5-level inverter output.

$\mathit{\phi }$ (rad)	RMS (V)	THD %	Maximum Dielectric Stress (MV/m)	Maximum Leakage Current Density (A/m2)
$\mathsf{\pi }/12$, $\mathsf{\pi }/6$	2514.24	12.8%	$3.3217$	0.0599
$\mathsf{\pi }/10$, $\mathsf{\pi }/5$	2408.76	11.61%	3.1596	0.0570
π/8, π/4	2240.57	13.18%	2.8238	0.0509

Table 7. Effect of an increase in firing angles for 7-level inverter output.

$\mathit{\phi }$ (rad)	RMS (V)	THD %	Maximum Dielectric Stress (MV/m)	Maximum Leakage Current Density (A/m2)
π/10, π/9, π/8	3928.95	18.49%	5.778	0.1042
π/9, π/8, π/7	3847.47	17.609%	5.472	0.0986
π/8, π/7, π/6	3737.675	17.014%	4.852	0.0875

Figure 12. Effect of increasing firing angle in a 5-level inverter. Left Vertical axis: RMS in kV; Maximum Dielectric stress in MV/m; Maximum leakage current density in 10⁻² A/m²; Right Vertical axis: THD in %.

Figure 13. Effect of increasing firing angle in a 7-level inverter. Left Vertical axis: RMS in kV; Maximum Dielectric stress in MV/m; Maximum leakage current density in 10⁻² A/m²; Right Vertical axis: THD in %.

5. Experimental Results

5.1. Low-Voltage Experimental Setup

A low-voltage (LV) experimental test setup of a 5-level neutral point clamped (NPC) multilevel inverter was used to generate either 3-level or 5-level inverter waveforms. The low-voltage testbed does not match the MV simulations, but the goal was to observe trends in dielectric stress in relationship to MLI levels and firing angles. While the 5-level output is standard for the schematic shown in Figure 14, the 3-level output was achieved by operating the four switches above the midpoint as two pairs, and the four switches below the midpoint as another two pairs. Figure 14 shows the schematic of the setup and Figure 15 shows the experimental test setup. Four isolated DC supplies—V₁, V₂, V₃ and V₄—were used to power the setup. Eight switches S₁–S₈ and six diodes D₁–D₆ form the NPC leg. A 7 mil NKN (2 mil Nomex—3 mil Kapton—2 mil Nomex) insulation film was used as a load for testing the dielectric stress and the leakage current due to different inverter wave shapes. Two current limiting resistors, R_lim1–2, of equal magnitudes were used to limit the current through the power circuit in case the insulation film fails and causes a short circuit while operating. The NKN film forms an RC load that is highly capacitive in nature. The inverter output was controlled using Sinusoidal Pulse Width Modulation (SPWM) to generate 3-level inverter with different firing angles. LabVIEW software is used to generate the SPWM signals and communicate with gate driver board through NI FPGA RIO9612.

Figure 14. Schematic of a five-level NPC multilevel inverter used for experimental tests.

Figure 15. Experimental setup—NPC multilevel inverter.

The output voltage V_load is measured using a differential voltage probe. However, the load current I_load (leakage current) is very small due to the large impedance (~MΩ) of the insulation film able to be measured using a current probe. Thus, an opamp-based differential amplifier as shown in Figure 16 (R_lim1 = 1000 Ω; R₁ = 100 Ω; R₂ = 1.2 MΩ; V_ref = 0 V) with a gain of 12,000 was used. This circuit generates the $V_{sense\text{\_}{I}_{load}}$ which is the voltage across the current limiting resistor R_lim1 to find I_load. $V_{sense\text{\_}{I}_{load}}$ is readable by the voltage probes on the oscilloscope and the current I_load as given by Equation (7)

$$I_{load}=(V_{sense\text{\_}I\text{\_}load}{V}_{ref})\frac{R_1}{R_2 \times R_{lim1}} \mathrm{A}$$

(7)

Figure 16. Differential amplifier circuit for leakage current measurement.

It should be noted that geometry of insulation and the operating voltage of the simulations differ from hardware, but the following subsections give a good understanding of the trend of dielectric stress.

5.1.1. Effect of Firing Angle on Insulation Dielectric Stress

Four DC power supplies at 30 V each were used to generate a 120 V peak–peak multilevel inverter. The fundamental frequency was at 60 Hz and the switching frequency was 10 kHz. The SPWM was modified to generate the different $\phi$. Figure 17 shows the 3-level MLI output waveforms—V_load, V_{sense_I_load} and PWM of Switch S₈.

Figure 17. Experimental results—effect of increase in firing angles for 3-level inverter output.

It can be seen from Table 8 that a decrease in RMS value of the voltage excitation causes a decrease in the dielectric stress on the insulation.

Table 8. Comparison of simulation and hardware results to check the effect of the increase in firing angles for a 3-level inverter output.

		MV Simulations		LV Experiments
MLI Levels	Firing Angles (rad)	RMS (V)	Dielectric Stress across Insulation (MV/m)	RMS (V)	Dielectric Stress across Insulation (MV/m)
3	$\mathsf{\pi }/8$	2580.60	1.913	51.6	0.290213
3	$\mathsf{\pi }/6$	2431.77	1.3572	48.9	0.275028
3	$\mathsf{\pi }/4$	2099.73	0.97169	42.4	0.238470
3	$\mathsf{\pi }/3$	1704.18	0.65882	34.7	0.195163

Referring to $V_{sense\text{\_}{I}_{load}}$ from Figure 17, leakage currents $I_{load}$ were calculated using Equation (7). $V_{sense\text{\_}{I}_{load}}$ was observed to be around 50 V and the corresponding leakage current was calculated to be 41.6 µA. However, there was no significant change in the leakage current magnitudes for all the four different firing angles. This is because of the very small changes in leakage current (~nA) due to different firing angles.

5.1.2. Effect of Increase in Voltage Levels

Similar to section A, four DC power supplies at 30 V each were used to generate a 120 V peak–peak multilevel inverter. The fundamental frequency was at 60 Hz and the switching frequency was 10 kHz. The SPWM was modified to generate the two different MLI voltage waveforms shown in Figure 18.

Figure 18. Experimental results—effect of increase in voltage levels.

It can be seen from Table 9 that for the same peak value of the 3-level and 5-level MLI voltage, the RMS value decreases and causes a decrease in the dielectric stress on the insulation.

Table 9. Comparison of simulation and hardware results to check the effect of increase in voltage levels of MLI at same DC bus voltage.

		Simulations Vdc Scaled to Achieve Similar Peak Voltage 3000 V		Experiments
MLI Levels	Firing Angles (rad)	RMS (V)	Max Dielectric Stress across Insulation (MV/m)	RMS (V)	Max Dielectric Stress across Insulation (MV/m)
3	$\mathsf{\pi }/4$	1244.50 1000	0.773	42.4	0.238470
5	$\mathsf{\pi }/3$$, \mathsf{\pi }/6$		0.668	38.5	0.216535

5.2. Additional MV Simulations and Experimental Results

5.2.1. MV Experimental Testbed

A 2-level medium-voltage H-bridge inverter testbed was used to evaluate the dielectric stress of the insulation. A schematic of the test bed is shown in Figure 19, and details of the experimental setup are shown in [19]. The test bed has the capability to operate up to 30 kV DC, 3 mA input to give a +/−15 kV bipolar square waveform as the output up to 4 kHz switching frequency. The H-bridge topology is chosen and built using four Si MOSFET assemblies from BEHLKE. Two PWMs (PWM₁ and PWM₂) of switching frequency (f_sw) control the switching sequence and the operation of the inverter. A Kapton HN film of a certain thickness (ε) is placed at the output of the inverter between the electrodes immersed in Silicone oil. Four 200 Ω current-limiting resistors (R) are placed in series with the Kapton HN film to limit the large current when the films break down.

Figure 19. Schematic of 2 level medium-voltage inverter setup.

This testbed was used to generate a 3 kV peak, 6 kV peak-peak voltage as shown in Figure 20. The RMS value of a bipolar pulse waveform V_rms = V_peak = 3000 V. For an insulation sample of thickness 2 mm, the dielectric stress across the sample would be 1.5 MV/m.

Figure 20. 2-level 3 kV peak medium-voltage inverter output.

5.2.2. Analysis and Simulations

Per-phase output of this 3 kV peak, 2-level MLI is considered and approximated as shown in Figure 21. The mathematical representation of 2-level inverter output voltage is given in Equation (8).

$$f_a\left(t\right)=\frac{4V_{dc}}{\pi }\times {\displaystyle \sum }_{n=1 }^a\frac{1- \cos \left(n\pi \right)}{n\pi }\sin \left(n2\pi ft\right)$$

(8)

Figure 21. 2-level approximated waveform.

To evaluate the dielectric stress using simulations, mica is replaced with Kapton HN as a stator ground wall insulation to match the material used in hardware tests in Section 5.2.1. This is important to mention as Kapton HN is not usually used for ground wall insulation and is only used here for demonstration purposes. Some properties of Kapton HN are shown in Table 10. The 2-level per phase approximated waveform is fed to the motor stator windings and the dielectric stress of the motor insulation is evaluated to be 1.5 MV/m across the 2 mm thick Kapton insulation as shown in Figure 22. This is similar to the dielectric stress measured in experiments.

Table 10. Properties of Kapton HN.

Property	Value
Relative permittivity	3.4
Bulk conductivity	6.66 × 10−20 Siemen/m
Dielectric loss tangent	0.0018

Figure 22. Dielectric stress within the motor stator winding matches the dielectric stress generated by 3 kV peak 2-level waveform using a hardware testbed.

6. Conclusions

Multi-level inverters (MLIs) are widely replacing conventional 2-level inverters due to many advantages, such as improved power quality, enhanced modularity, and reduced voltage stress on the switches. However, their effect on insulation systems is not widely and thoroughly understood. This paper aims to understand the effect of MLIs on motor insulation systems. Specifically, the stator groundwall insulation in a medium voltage machine has been considered. Finite element modeling software Ansys RMxprt and Maxwell were used to create transient electromagnetic simulations of the medium voltage machine. MLI output waveforms were approximated using Fourier series and fed a per-phase voltage excitation to the medium voltage three phase machine. Two main parameters—dielectric stress and leakage currents—were evaluated in the stator groundwall insulation for different MLI output waveforms. Hardware tests on a LV MLI testbed and an MV 2-level inverter testbed were performed.

In this paper, 3-level, 5-level, and 7–level MLI output waveforms were approximated and the motor stator insulation stress due to effect of increase in voltage levels of a multi-level inverter and the effect of increase in firing angle for the 3-level inverter were validated on a 3-level and 5-level low voltage NPC multilevel inverter testbed. Additional simulations and hardware results were performed at MV to validate the dielectric stress due to a 2-level inverter.

When ignoring dv/dt transient effects, it was observed that there is a strong correlation between the RMS values of the voltages and the insulation stress. The dielectric stress increases with an increase in the RMS value of phase voltage excitations. Thus, at a given voltage level, a higher number of levels in MLIs minimize the dielectric stress within the insulation and avoid high voltage motor failure if the RMS value is chosen appropriately. Thus, in addition to switching to MLI, choosing the right PWM scheme can help decrease the dielectric stress on motor insulation systems. Additionally, it was observed that for a given voltage, the dielectric stress in motor stator insulation increases with an increase in firing angle and an increase in RMS values of 3-level MLIs.

Our contribution in this paper on the analysis of the effect of inverter wave shapes on motor insulation stress would be very useful to the insulation, motor and power electronics communities.

• Insulation community—to define motor class insulation for different WBG converters and wave shapes;
• Motor design community—to choose appropriate insulation to ensure reliable and safe operation of motors;
• Power electronics community—to develop new WBG multilevel converter control schemes to optimally reduce the insulation stress and THD at same time.