Enhancing the Performance of Eskom’s Cahora Bassa HVDC Scheme and Harmonic Distortion Minimization of LCC-HVDC Scheme Using the VSC-HVDC Link

Abstract

Cahora Bassa, a thyristor-based High Voltage Direct (HVDC) link, transmits 1920 MW of power from a hydro-power plant in Zambezi River, north of Mozambique, to Apollo Substation in Johannesburg, South Africa. The high degree of harmonics distortion that is transferred into the AC side of the transmission network and the continuous increase in the rate at which commutation failure occurs during systems disturbance are both flaws in the utilization of this HVDC converter technology. AC and DC filters with rugged controllers are often used to minimize this effect but are limited in scope. Modern converter technology, such as the Voltage Source Converter (VSC), was proposed in this study to reduce harmonics content level, increase power transfer capabilities, enhance network stability, and reduce the rate of commutation failure occurrence. This paper, therefore, evaluates the performance analysis of the Cahora Bassa HVDC link and its level of harmonic distortion in the line commutated converters. A proposed method of utilizing VSC HVDC is provided as a suitable solution using three modular-level voltage source converter technology. Current and voltage waveform characteristics during a three-phase short circuits fault were analyzed, and the latest developments in the area of VSC HVDC were discussed. The results show a lower total harmonics distortion with the usage of VSC HVDC converter technology at the inverter station. The continuous occurrence of commutation failure was minimized by implementing a new converter architecture. The network simulation and analysis were carried out using the DIgSILENT PowerFactory engineering software tool.

1. Introduction

In designing and operating electric power networks or implementing major expansions to existing networks, a number of key issues regarding the network’s technical performance at both the transmission and distribution (T and D) levels must be ascertained. These include voltage regulation, voltage fluctuations, rapid voltage rise, electrical losses, distribution plant loading and utilization, fault level, generation stability, harmonics, phase balancing, system security, and supply availability [1]. The quality of power supply has become a significant concern for Electric Power Utilities due to increased economic activities in the industrial and commercial sectors [2].

The most common occurrences of these problems include voltage sag, short or long interruption, harmonic distortion, voltage spike, voltage swell, noise, or voltage unbalance. These have a negative impact on the quality of electric power supply to different consumers. Nonlinear loads are major causes of harmonics distortion. These voltage-dependent loads usually generate non-sinusoidal waveforms because their impedances change with applied voltage and, therefore, draw a nonlinear current [3,4,5]. Semiconductor devices used for different converter circuits also contribute to high nonlinear loads in an electric power system [6,7].

Harmonic content in the form of voltage distortion is mainly observed at the converter circuits’ point of common coupling (PCC) [8]. Ideally, high voltage direct current (HVDC) systems with pulse “p” converter circuits generate ±np+1 characteristic harmonic current order on the AC side and ±np on the DC side, where n is the number of the successive harmonics [9]. Due to converter imperfection and unbalanced AC system voltage, the uncharacteristic harmonic current order is also present in all AC systems utilizing semiconductor devices. Lower frequency order harmonics must be minimized in power systems since they interfere with their fundamental frequency [10,11]. They are responsible for the high transmission losses, increased thermal stress to the converter valve, radio interference due to noise, and often leads to system failure. AC and DC filters are always used to minimize the effect of different harmonic distortions [12,13]. The strategic placement of a thyristors-based HVDC system on the Eskom network for stability enhancement was discussed [14]. HVDC systems harmonics were extensively discussed in the literature. Their causes, interaction with weak AC systems, and the means of mitigation and filters analysis were well discussed in [15,16,17,18]. Das [15] gave a comprehensive basis for the modeling of harmonics and filters in power systems, while Xiao [16] investigated the control measure to predict and detect commutation failures in LCC-HVDC with the primary consideration given to the voltage harmonics on the inverter stations of the converters [16]. Abedin [19] highlighted the problem and key issues relating to LCC and VSC HVDC and suggested some futuristic solutions to a number of these challenges. Given the peculiarity of the Cahora Bassa HVDC scheme and its converter architecture and network configuration, a detailed performance analysis is required to evaluate the harmonics contribution to the AC networks at the Apollo substation located in Johannesburg. This study analyses and quantifies the harmonic content in the Cahora-Bassa HVDC systems. Oni [20] carried out a study using the electromagnetic transient (EMT) to analyze the harmonic content but failed to analyze the total harmonic distortion of these converters. This paper seeks to contribute comprehensively, the harmonics distortion due to the Cahora Bassa LCC HVDC. The issue of harmonic content has been a major complaint of Eskom. Therefore, this research further seeks to compare it with the implementation of VSC-HVDC system. The converters’ controls and mathematical modelling are provided to advance understanding the advantages of VSC HVDC systems over the convectional LCC HVDC systems.

This paper is structured as follows: Section 1 is the introduction, problem statements, and significance of the study. Section 2 discusses the harmonic analysis of dc and ac lines. Section 3 introduces the Southern African Power Pool (SAPP). Section 4 and Section 5 discuss the Cahora Bassa HVDC link and the control scheme implemented. The performance analysis of this Cahora Bassa HVDC link is presented in Section 6. The mathematical modeling of VSC-HVDC systems and their control architecture is presented in Section 7, while Section 8 shows the implementation of the VSC HVDC. Section 9 is the conclusion.

2. HVDC Harmonics Analysis

The harmonic current in the Line Commutated Converter (LCC) HVDC-based scheme is best analyzed by using an impedance model. AC characteristics are given by Equations (1) and (2), while Equations (3)–(5) examine the DC harmonics characteristic [21].

$$I=\frac{I_{io}}{h}$$

(1)

$$I_{IO}=\frac{2\sqrt{6}}{\pi }{I}_{dc}$$

(2)

$$V_h=\frac{V_{d0}\sqrt{C^2+D^2-2C{D}^{}{\cos }^{}\{2\alpha +\mu \}}}{\sqrt{2}}$$

(3)

where

$$C=\frac{\cos 〈h+1〉\ast \raisebox{1ex}{$\mu $}\!\left/ \!\raisebox{-1ex}{$2$}\right.}{h+1}$$

(4)

$$D=\frac{\cos 〈h-1〉\ast \raisebox{1ex}{$\mu $}\!\left/ \!\raisebox{-1ex}{$2$}\right.}{h-1}$$

(5)

The Fast Fourier transform (FFT) was performed on a two-level VSC-HVDC converter switching waveform commutating at the fundamental frequency. The total harmonic voltage is transferred from the DC side to the AC side when a DC voltage harmonic is introduced as $\omega =2\pi f$ and given by Equation (6). This condition holds only if ($\omega >{\omega }_1$). For $\omega -{\omega }_1$ < 0, it implies a negative phase sequence component, while $\omega +{\omega }_1$ > 0 gives a positive phase sequence component.

$$U_v(t)=\frac{2U_{dc0}}{\pi }{e}^{j(w_{1}t-\delta )}+\frac{U_{dch}}{\pi }{e}^{j(\left(w_1+w)t-\delta \right)}+\frac{U_{dch}}{\pi }{e}^{j(\left(w_1-w)t-\delta \right)}$$

(6)

where h is the order of harmonics, µ is the overlap angle, I_I0 is the fundamental harmonics currents, n denotes an integer, p is the pulse number; α is the firing angle, U_v(t) is VSC harmonic voltage at the AC bus, U_dc0 is the dc voltage at the fundamental frequency, U_dch is the dc voltage at the different harmonic frequency.

On the AC side, the harmonics generated are calculated in relation to the total distortion, according to Equation (7). The FFT spectrum of an ideal sine wave signal is shown in Figure 1a. A peak arises at the fundamental frequency f of the applied signal. The FFT spectrum of a distorted, nonlinear sinusoidal signal is shown in Figure 1b. The highest peak is observed at the signal’s fundamental frequency, f₁. Additional peaks arise when the fundamental frequency is divided by two (f₂ = 2f₁, f₃ = 3f₁, f₄ = 4f₁, and so on.) Harmonics are the peaks that characterize a signal’s non-linear nature. The magnitude of the harmonics grows as the signal becomes more nonlinear.

$$THD=\frac{\sqrt{{\displaystyle \sum _{i=2}^n{X}_i^2}}}{X_1}$$

(7)

where X₁ can denote the RMS value of the fundamental component of either voltage or current. X_i is the RMS value of the ith harmonic voltage or current up to the nth harmonic.

3. Southern Africa Power Pool (SAPP) Network

The Southern African Power Pool (SAPP) comprises 16 member countries’ electric utility companies as of 2013. This organization focuses on delivering a reliable and affordable electricity supply to its consumers. It includes Independent Power Producers and Independent Transmission Companies (IPP/ITC) from 12 countries. Cahora Bassa HVDC scheme falls under the SAPP network and is co-owned by Eskom South Africa and Electricidade de Mozambique (EDM) [22,23,24]. Figure 2 shows the SAPP network.

4. Cahora Bassa HVDC Scheme

Cahora Bassa HVDC link is a thyristor-based converter scheme that transmits 1920 MW of electrical power from a hydroelectric power plant located in the Zambezi River, north of Mozambique, to Johannesburg, South Africa. The rectifier station, located at Songo in Mozambique, is connected to the Apollo inverter station in Johannesburg over 1414 km, ±533 kV bipolar lines. A total of 64.2% of the transmission length is located in Mozambican territory, while 35.8% resides in South Africa. The link has approximately 7000 towers with an average span of 426 m of the transmission network. Reinforced towers with earth return are provided using buried graphite electrodes located at a considerable distance from the converter station. Smoothing reactors, surge arresters, and capacitor banks are installed at respective converter stations. The Apollo inverter station was refurbished in 2008, equipping it with 5″ electrically triggered thyristor valves capable of withstanding 3.3 KA, 8.5 kV switching capacity [25]. Figure 3 shows the detailed diagram of the Cahora Bassa HVDC scheme, which was modeled using DIgSILENT PowerFactory. The converter and transmission line data are shown in

Table 1. LCC-HVDC converter data.

		Rectifier	Inverter
Rated AC voltage		220 kV	275 kV
Rated DC voltage		±600 kV
Rated DC current		3 kA	3 kA
Rated power		929 MW	904 MW
Control mode (set point)		Current (2 kA)	Voltage (0.99 p.u.)
Transformer	Min. turns ratio	0.7	0.9
	Max. turns ratio	1.4	1.3
Rect. Firing/Inv. Extinction angle		15 degrees	20 degrees
Tap control mode		α-control	γ-control

and

Table 2. HVDC transmission line data.

Rated Voltage	600 kV
Rated current	3 kA
Length	1414 km
Smoothing reactor	650.8 mH

.

Figure 3 shows the hydro-power plant, low-frequency/high-frequency filter, and capacitor bank at the Songo rectifier station. The Apollo inverter station has the equivalent load (external grid) with different compensating devices installed.

5. Control Scheme

The HVDC controls on PowerFactory software can be divided into two levels: inverter control and rectifier control. A block definition that defines the transfer function in the form of graphical block diagrams and equations is first created for each controller. A composite block frame is then built for the overall control. This controller is then sub-divided into three hierarchical levels: power control, converter control, and pole control. Equations (8)–(10) show the quasi-steady mathematical model of a bipolar LCC HVDC scheme [26]:

$$+UdcR=\frac{2.7U_{Yr}{}_{}\cos {\alpha }_r-\left[I_{dc}{X}_r\raisebox{1ex}{$6$}\!\left/ \!\raisebox{-1ex}{$\pi $}\right.\right]}{2}$$

(8)

$$+UdcI=\frac{2.7U_{Yi}{}_{}\cos {\beta }_i-\left[I_{dc}{X}_i\raisebox{1ex}{$6$}\!\left/ \!\raisebox{-1ex}{$\pi $}\right.\right]}{2}$$

(9)

$$+I_{dc}=\frac{UdcR-UdcI}{R_{dc}}$$

(10)

where +Udc is the dc voltage for the positive pole, U_Y is the ac voltage, α_r is the rectifier firing angle, and β_i is the advance angle of the inverter. X is the commutation reactance. Subscripts R and I stand for rectifier and inverter, respectively.

The overview diagram shows all the slots/interconnections and which object should be assigned to a slot. A standard model was created from the block definition and then added to the composite model. Figure 4 and Figure 5 show a simple overview diagram of the controller connected to the converter. The functions of these major controllers of the HVDC converter are discussed briefly.

Voltage-Dependent Current Order Limiter (VDCOL): The VDCOL function reduces the current order value when there is a disturbance that causes a reduction in the DC voltage. The converter tracks the current order on the table based on the filtered DC voltage, as shown in Figure 5. This control prevents a high rate of reactive power consumption and reduces voltage stress in the valve, thus facilitating the recovery of the converter after a disturbance. With the input voltage of V_cd1, which connotes starting voltage of VDCOL, current I_dc1 is the current order produced by VDCOL. The static relationship between the dc voltage and current can be described in Equation (11) [27,28,29].

$$I_{dc}=\left\{\begin{array}{ccc}{I}_{dc1}& ,& V_{dc}\le V_{dc1}\\ \frac{V_{dc}\left(1-I_{dc1}\right)+\left(V_{dc2}{I}_{dc1}-V_{dc1}{I}_{dc2}\right)}{V_{dc2}-V_{dc1}}& ,& V_{dc1}\le V_{dc}\le V_{dc2}\\ I_{dc2}& ,& V_{dc2}\le V_{dc}\le 1\end{array}\right.$$

(11)

Current Controller: This controller filters the actual direct current measured, calculates the difference against the reference signal, and feeds the current error into a Proportional Integral (PI) controller, producing the firing angle order. The rectifier always operates as a current controller while the inverter uses the gamma controller due to the minimum value selector. The control block diagram for this controller is shown in Figure 6 [19,30,31].

Gamma Controller: This is also known as the extinction angle controller (Figure 7). This controller ascertains that the commutation is complete before the polarity of the voltage across the valve turns positive during an inverter operation of the converter. The firing angle order used in the gamma controller is obtained from a PI regulator that takes the differences between the commutation margin γ (delay between the valve extinction and the valve voltage just before turning positive) and a fixed set point. Where the margin is larger than necessary, the PI controller stops at the α-max. Otherwise, the firing angle is reduced until γ equals the set value [32,33].

Converter Controller: This controller is the firing pulse generator. It generates each valve firing pulse by comparing the reference signal from the Phase-locked Loop (PLL).

Power Controller: This serves as the master controller that coordinates and oversees the overall control actions of the systems. It determines the current order signals for each pole of the converter.

6. Performance Analysis

The Cahora Bassa HVDC scheme was simulated and studied using the EMT tools to analyze the voltage and current distortion during a three-phase short circuit fault. An inverter fault was considered because of its severity on the HVDC link rather than a rectifier station fault. This inverter fault increases the rate of commutation failure at the inverter station. Thus, a three-phase short circuit with X_L = 10 Ω faults reactance was applied at the inverter AC busbar for t = 100 ms, using an electromagnetic EMT simulation tool for 0.4 s simulation time. The busbar voltage and converter current are shown in Figure 8. Figure 8a,b shows the inverter and the rectifier voltage, respectively. These plots show the voltage profiles in pu of the two substations. During the AC system fault at 0 s, the rectifier station (Songo) slightly reduces the bus voltage profile. This voltage gradually increases to its steady-state condition as the fault time progresses. However, the inverter station (Apollo) experiences a continuous dip in the voltage profile till the end of the fault time at 0.1 s. Figure 8c,d shows the inverter and rectifier converter current. The converter AC current rises while the inverter station suffers commutation failure. It can be observed that, though the system regains its steady-state condition after successful clearing of the fault, the AC voltage waveform, which was expected to be purely sinusoidal, had few distortions. Furthermore, the current waveform of an LCC HVDC is typically trapezoidal rather than a perfect sinusoidal shape, coupled with commutation failure at the inverter side.

7. VSC HVDC Scheme

7.1. Introduction to VCS HVDC

Voltage Source Converter (VSC) uses Insulated Gate Bipolar Transistor (IGBT) technology. It was proposed in 2003 by Rainer Marquardt [34]. It creates its own AC voltages in case of black start, thus helping the current to be switched on and off at any time independent of the AC voltage. Its converters operate at a high frequency with pulse width modulation (PWM), which allows simultaneous adjustment of the amplitude and phase angle of the converter while keeping the voltage constant. It has a high degree of flexibility with an inbuilt capability to control its active and reactive power, making it more useful in urban power network areas. Most VSC-HVDC technology converter stations use multilevel converter circuits [35,36], as shown in Figure 9 and Figure 10. Recent VSC HVDC installations around the globe are shown in

Table 3. Installations of VSC-HVDC schemes.

Project Name	Location	Characteristics
		(MW)	(KV)	(Km)	Year
Borwin 1	Germany	400	±150	200	2009
Caprivi link	Namibia	300	±350	951	2010
Transbay	USA	400	±200	85	2010
EWIC	UK	500	±200	261	2012
Inelfe	France	2000	±320	65	2015
NordBalt	Sweden	700	300	450	2015
SylWin1	Germany	864	±320	205	2015
Skagerrak 4	Norway	700	±500	244	2014
Terranora interconnector (Directlink)	Australia	180	80	59	2000
Murraylink	Australia	200	150	176	2002
Dalian City Infeed	China	1000	320	43	2013
Nanao Multi-terminal VSC HVDC	China	200/100/50	±160	42	2013
Zhoushan Multi-terminal DC Interconnection	China	400	±200	134	2014
Rudong Offshore Wind Connector	China	1100	400	100	2022
Sheyang Offshore Wind Connector	China	1100	250	83	2022
Zhangbei DC Grid Project	China	3000	500	495	2021
BorWin2	Germany	800	±300	200	2015
DolWin1	Germany	800	±320	165	2015
HelWin1	Germany	576	±250	130	2015
HelWin2	Germany	690	±320	130	2015
DolWin2	Germany	900	±320	135	2016
DolWin3	Germany	900	±320	160	2017
Caithness—Moray Link3	UK	1200	320	160	2018
BorWin3	Germany	900	±320	200	2019
COBRAcable	Denmark	700	±320	325	2019
Trans Bay Cable	USA	400	200	85	2010
Maritime Link	Canada	500	200	360	2017
Pugalur Thrissur HVDC	India		±320	165	2021

[37,38].

7.2. Control Scheme

Independent control of power at each converter is possible. A converter controls the DC voltage at the link to match the nominal level, while the other converter sets the amount of active power through the link. Active and reactive power control is achieved with a phase reactor from the series inductance between the converter and the AC grid Equations (12) and (13) [39,40].

$$P=\frac{U_{ac}{U}_{conv}\sin \delta }{X}$$

(12)

$$Q=\frac{U_{conv}(U_{conv}-U_{ac}\sin \delta )}{X}$$

(13)

where X represents the series reactance of the phase reactor and the transformer in the converter station.

The VSC-HVDC control used for this study is based on a generic structure provided by DIgSILENT Power Factory. This control structure is shown in Figure 11. This controller consists of two composite controller blocks for the rectifier and inverter station. The inverter composite model houses the three controller blocks; the main controller, the current controller, and the chopper controller block. The current limiter prioritizes the active current I_d during normal operation and then limits the reactive current I_q. However, during a fault period of (v < v₀ − V_t), the active current is limited while the reactive current is prioritized. This main controller uses the first-order lag filter (lowpass) of 10 ms and 30 ms filter time on both the measured AC voltage and reactive power. The output current from the main controller is used as the current reference value for the current controller block, which is then used to generate the modulation index. Negative and positive DC voltage is fed into the chopper control block. This is used to ignite the DC valves of the chopper resistors if the voltage exceeds a certain limit. If the voltage drops again below a defined threshold, it then blocks these valves. These choppers are used as a protective measure against faults on the IGBT valves.

The desired active and reactive power of the VSC can be determined as in Equation (14): where P and Q are the desired active and reactive power of the VSC, respectively. In addition, V_d and V_q are the d- and q-axis voltage levels at the PCC, respectively. I_d and I_q can be controlled directly by picking their corresponding reference values because the voltage is considered to be constant (I_d.ref and I_q.ref) (Equation (15)) [41,42].

$$\left\{\begin{array}{c}P=V_{od}{I}_L+V_{oq}{I}_L\\ Q=V_{od}{I}_L+V_{oq}{I}_L\end{array}\right.$$

(14)

$$\left\{\begin{array}{c}{i}_d^{\ast }=\left(k_{pc}+\frac{k_{ic}}{s}\right)\left(P^{\ast }-P\right)\\ i_q^{\ast }=\left(k_{pv}+\frac{k_{iv}}{s}\right)\left(Q^{\ast }-Q\right)\end{array}\right.$$

(15)

This analysis is equally relevant when the outer loop uses P and V controls since the V control can be seen as a Q control with a variable Q reference. The V control is recommended over the Q control in weak AC grids. Thus, the V control was used in this study. The vector control’s inner loop is designed using the inductor model between the point of common coupling and the VSC. The inner loop’s mathematical model is shown in Equation (16) [39,41,43].

$$\left\{\begin{array}{c}{v}_d^{\ast }=v_{od}-\left(k_{pc}+\frac{k_{ic}}{s}\right)\left(i_{Ld}^{\ast }-i_{Ld}\right)+{\omega }_{1}L{i}_{Lq}\\ v_q^{\ast }=v_{oq}-\left(k_{pv}+\frac{k_{iv}}{s}\right)\left(i_{Lq}^{\ast }-i_{Lq}\right)-{\omega }_{1}L{i}_{Ld}\end{array}\right.$$

(16)

The rectifier controller maintains the AC grid voltage and the system frequency at a constant acceptable value. Measuring devices are used to detect the AC voltage, converter AC current, and positive and negative DC voltage. Phase-locked loops are also deployed to measure the AC phase voltages. This measuring point gives this controller a certain setpoint to keep the voltage magnitude and frequency constant. This is carried out through the input signal “Pm” (modulation index) and “f₀” (frequency) of the PWM converter. The modulation index is controlled through two cascaded PI controllers and a feed-forward path using a measured DC voltage.

The first PI controller obtains the AC voltage deviation as the input signal. Its output is the reactive current reference. This reference signal is compared against the measured reactive current. The output of the second PI controller is then the reference voltage. The controller has two additional functions; it has a built-in limitation of the reactive current. This limitation becomes active only in case of a fault at the rectifier station, and the control can raise the frequency in the rectifier network in case of a high DC voltage.

8. Re-Engineering Using VSC-HVDC

Based on operation records, it is recognized that the Cahora Bassa LCC-HVDC scheme is largely responsible for instabilities in the Eskom EHV network due in part to aging infrastructure. A re-engineering was proposed using the VSC-HVDC scheme. This improves system performance, betters power controllability, and enhances stability margins.

A VSC-HVDC scheme was modeled using ±500 kV, 1500 MW on DIgSILENT PowerFactory (Figure 12). The parameters are shown in

Table 4. VSC-HVDC data.

Parameters	Rectifier	Inverter
Converter type	Two-level converter
AC voltage rating	220 kV	275 kV
Rated DC-voltage	±500 KV
Rated power	1000 MVA
Modulation techniques	Sinusoidal PWM
Active power setpoint	750 MW	700 MW
Reactive power setpoint	0 M var
Control mode	P-Q	Vdc-Q (0.98 put)

.

A three-phase short circuits fault of X_L = 10 Ω fault reactance was also applied at the AC busbar of the inverter station and cleared at t = 100 ms. This compares the impact of the 3-phase fault with an LCC-HVDC and VSC-HVDC system by evaluating the harmonics distortions generated after the fault using the waveforms generated during and after the fault condition.

During a three-phase short circuit fault at the inverter AC station, the busbar voltage profile and the converter current was observed on the subplot in Figure 13. From these plots, the rectifier, Songo substation, voltage (Figure 13b), and converter current (Figure 13d) were unaffected during the fault. The inverter voltage profile in Figure 13a experiences a dip while the converter current recorded an increase in fault current throughout the duration of the fault. However, it maintains its steady-state condition after the fault period. Unlike the LCC-HVDC, the Songo voltage waveform suffered no reduction in bus voltage during the fault. It maintained ±1.00 p.u. peak to peak voltage. These results show that it minimizes fault condition transfer to the rectifier station.

From the VSC-HVDC converter current, neither the inverter nor the rectifier experienced a commutation failure during the fault. A slight increase in the current spike was observed at the instant of the fault occurring until the fault was cleared. Unlike the LCC-HVDC scheme, the system retained its sinusoidal waveform after the fault, which had to rebuild its converter current.

It was observed that the VSC-HVDC produced a perfect sinusoidal current waveform free of harmonic distortion, as shown in Figure 14 (in

Table 5. Comparison of LCC and VSC harmonics distortion at the AC busbar.

Harmonics Number (n)	THD in %
	LCC	VSC
1.0	100.00	100.00
5.0	0.00	0.00
7.0	0.00	0.00
11.0	0.18	0.00
13.0	0.21	0.00
17.0	0.00	0.00
19.0	0.00	0.00
23.0	11.44	0.00
25.0	7.09	0.00
29.0	0.00	0.00
31.0	0.00	0.00

), compared to a trapezoidal waveform of the LCC-HVDC scheme. The voltages showing ripples and harmonics are shown in Figure 14a. The harmonic distortion with 11th, 13th, 23rd, and 25th harmonics contents can also be seen in Figure 14b during the LCC HVDC scenarios.

It may be concluded that the VSC-HVDC scheme provides better stability enhancement to an AC system than the conventional LCC scheme. The stability enhancement may be due to the high-frequency VSC HVDC switches during converter operation, which cannot be achieved in the LCC-HVDC scheme. However, this high switching frequency rate results in higher power losses and heat production. Furthermore, a modern VSC circuit can override this challenge. Thus, with the ongoing technological advancement of different VSC converter circuits, feasible technical solutions are desired or required for high-power transmission systems with reduced transmission losses.

9. Conclusions

The power transfer via the Cahora Bassa LCC HVDC link contributes largely to the stability of the South African power grid. However, the harmonics content generated due to the imperfection in LCC HVDC requires a large number of capacitors and inductor filters. Furthermore, the LCC line requires complex control of both the active and the reactive power. This study was carried out on the ±533 kV Cahora Bassa HVDC scheme to evaluate the system’s performance analysis. A solid three-phase short circuit was applied to the network at the AC side of the inverter station. The results show that this LCC HVDC link contributes some harmonic and current distortion to the South African grid. This becomes worse during load-shedding. The network analysis showed that the LCC-HVDC has limitations with respect to harmonic distortion, imperfect current waveform, and frequent commutation failure at the inverter side of the converter station during a worst-case scenario of three-phase short circuits fault. A better means of power transfer with enhanced system stability with a suitable sinusoidal waveform is therefore proposed using VSC-HVDC technology. A total harmonic distortion analysis was carried out, which shows that the proposed implementation of VSC HVDC reduces the harmonics distortion at the AC side of the inverter station and better recovers post fault time

The future implementation of this network VSC HVDC will enhance better stability of the South African power grid, reduce harmonics content, and provide better controllability of active and reactive power of the grid. It should be pointed out that challenges such as high fault current and losses are paramount to VSC HVDC schemes. However, with the recent advancement in semiconductor devices, research in the area of DC circuit breakers, and VSC fault ride-through capabilities, the VSC HVDC provides a better option for system controllability and improved stability. Future research areas include the hybrid implementation of the LCC and VSC HVDC on the Cahora Bassa HVDC link.