# Series-Parallel Reconfigurable Electric Double-Layer Capacitor Module with Cell Equalization Capability, High Energy Utilization Ratio, and Good Modularity

^{*}

## Abstract

**:**

## 1. Introduction

_{cha}is the charging voltage, and V

_{cut}is the cut-off voltage. A characteristic of U as a function of V

_{cut}/V

_{cha}is graphed in Figure 2. The lower the cut-off voltage V

_{cut}, the higher the energy utilization ratio U will be. For example, 75% of the stored energy can be utilized by discharging an EDLC cell as low as V

_{cut}= V

_{cha}/2. Discharging as low as 0.32 V

_{cha}achieves 90% energy utilization. Wide input/output voltage range DC–DC converters achieve high energy utilization, but their performance is unavoidably impaired, as discussed above.

_{M}is equal to the cell voltage V

_{C}. Before V

_{M}decreases down to the predetermined lower voltage limit V

_{L}, the module is reconfigured to be 2S-2P configuration to double the module voltage V

_{M}(i.e., V

_{M}= 2 V

_{C}). Before V

_{M}reaches V

_{L}again, the module is reconfigured to be 4S-1P configuration so that V

_{M}= 4 V

_{C}. This reconfiguration technique allows cells to discharge deeply while keeping V

_{M}within a desired voltage range. In the charging process (Figure 3c), the series-parallel configuration is reconfigured in the opposite order.

_{1}–C

_{4}is shown in Figure 4a that operates identically to the circuit in Figure 3. This circuit operates either in the 1S-4P, 2S-2P, or 4S-1P configuration, and all cells can discharge and charge uniformly in all configurations. However, this technique cannot be used for modules comprising odd number cells (e.g., five and seven cells), and, therefore, its design flexibility and extendibility are poor. Employing cells with a larger/smaller capacitance is another way to tune the module capacitance, but the limited variety of products does not allow fine-tuning. For example, capacitances of DXE series from Nippon Chemi-Con corporation [19] are 400, 800, 1200, and 1400 F. Changing from 800 F cells to 400 F or 1200 F ones only achieves a 0.5 or 1.5 times greater module capacitance.

_{1}–C

_{4}are shown in Figure 5. V

_{C}

_{1}–V

_{C}

_{4}in Figure 5b,c are the voltages of C

_{1}–C

_{4}. The number of series-connection changes one by one (i.e., 2S, 3S, and 4S), and voltage step changes can be finer than those of the balance-shift circuits. All cells can be equally discharged and charged in 2S-2P and 4S-1P configurations, but unequal currents flow in the 3S configuration, generating cell voltage imbalance. In the discharging process, for example, C

_{1}and C

_{4}discharge faster, and V

_{C1}and V

_{C4}decrease steeper than V

_{C}

_{2}and V

_{C}

_{3}. The occurrence of voltage imbalance significantly lowers the energy utilization ratio of the module, because some cell voltages decrease down to 0 V or some cells might be over-discharged under subzero voltages in the worst case. A representative unbalanced-shift circuit for four cells and its operation modes are shown in Figure 6 [17].

## 2. Proposed Series-Parallel Reconfiguration Circuit

#### 2.1. Circuit Topology

#### 2.2. Major Features

## 3. Operation Analysis

#### 3.1. Operation Principle

_{M}is between the upper and lower voltage limits of V

_{U}and V

_{L}. There are five configurations (i.e., 1S-5P, 2S, 3S, 4S, and 5S-1P), and 2S-, 3S-, and 4S-configurations have their own unique substates. The substates in 2S-, 3S-, and 4S-configurations are repetitively switched to achieve cell voltage equalization. Current flow paths in each configuration or substate in discharging process are shown in Figure 10.

_{M}reaches V

_{L}, the operation mode moves to the 2S configuration.

_{1}–C

_{3}are connected in parallel, while the remaining cells of C

_{4}and C

_{5}are also connected in parallel in a different group. Their voltage relationships in substate 2A are expressed as:

_{C}

_{1}–V

_{C}

_{5}are the voltages of C

_{1}–C

_{5}. The combined capacitance of C

_{1}–C

_{3}is 1.5 times larger than that of C

_{4}–C

_{5}, generating voltage imbalance. In substate 2B (Figure 10c), on the other hand, C

_{3}is connected in parallel with C

_{4}and C

_{5}, yielding the following voltage relationships:

_{1}–C

_{2}and C

_{3}–C

_{5}are different, their voltages tend to be mismatched. Although both substates contain unbalanced combined capacitances, all cells are virtually connected in parallel by switching substates 2A and 2B repetitively at a fixed frequency. Repetitive switching between substates 2A and 2B is equivalent to combining (2) and (3), yielding V

_{C}

_{1}= V

_{C}

_{2}= V

_{C}

_{3}= V

_{C}

_{4}= V

_{C}

_{5}. Thus, the virtual parallel connection equalizes all cell voltages in the module.

_{1}, C

_{3}, or C

_{5}is discharged alone, whereas the remaining cells are discharged in parallel with another cell. In substate 3A (Figure 10d), for example, the discharging current of C

_{5}is twice that of other cells. Similarly, a larger current flows through C

_{3}and C

_{1}in substates 3B and 3C, respectively. Although cell voltages tend to be imbalanced in these substates in 3S configuration, repetitively alternating the configuration among substates 3A–3C realizes the virtual parallel connection for all cells. From Figure 10d–f, the voltage relationships in substates 3A–3C are:

_{C}

_{1}= V

_{C}

_{2}= V

_{C}

_{3}= V

_{C}

_{4}= V

_{C}

_{5}, achieving the voltage equalization.

_{1}and C

_{2}are connected in parallel, and other cells are connected in series. In other substates, the other two cells are connected in parallel. Cell voltage relationships in substates 4A–4D (Figure 10g–j) are expressed as:

_{C}

_{1}= V

_{C}

_{2}= V

_{C}

_{3}= V

_{C}

_{4}= V

_{C}

_{5}. Similar to the 2S and 3S configurations, repetitive alternation among these four substates realizes cell voltage equalization.

_{M}is between V

_{U}and V

_{L}, as illustrated in Figure 9b.

#### 3.2. Operation Condition

_{M}must stay between the upper limit V

_{U}and lower limit V

_{L}, even when the circuit is reconfigured. The cell and module voltage profiles in Figure 9a yield the following equations:

_{0}–T

_{5}are the time at the beginning or end of operation modes in the discharging process (see Figure 9a). Rearrangement of (11) and (12) produces:

#### 3.3. Reconfiguration Algorithm

_{C}, the operation modes are determined, based on V

_{C}, as:

_{C}. Substates in Modes 2–4 are switched at several hertz to preclude the occurrence of cell voltage imbalance.

#### 3.4. Switching Frequency

_{4}and C

_{5}in Mode 3 is focused as an example.

_{5}discharges alone, while C

_{4}shares the discharge current with C

_{3}. Assuming all cell capacitances are C, the current difference between C

_{4}and C

_{5}is I

_{M}/2, where I

_{M}is the module’s discharge current. The voltage imbalance generated in substate 3A, ΔV, is expressed as:

_{4}and C

_{5}are connected in parallel, and a balance current I

_{eq}flows between them. Cells’ internal resistances r

_{4}and r

_{5}, and switches’ on-resistance R

_{on}limit I

_{eq}are expressed as:

_{total}is the total resistance. In general, R

_{total}is in the range of several to a few ten milliohms and, therefore, ΔV should be within a few ten millivolts. Equation (15) suggests that f < 10 Hz would be high enough to achieve ΔV < 10 mV for 400 F cells, even when I

_{M}ranges several ten amperes.

## 4. Experimental Results

_{on}= 39 mΩ) were used as switches. The gate-source voltage of 10 V was applied to turn on switches. Substates in 2S-, 3S-, and 4S-configurations were switched at 2.5, 5, and 10 Hz, respectively. V

_{1}–V

_{4}were set to be 1.25, 0.83, 0.625, and 0.5 V, respectively. The EDLC module was cycled with a constant current of 2.0 A.

_{C}reached V

_{1}= 1.25 V. Cell voltage profiles in Mode 2 are magnified in the inset of Figure 14a. The voltage of C

_{5}was slightly higher than others. This offset is attributable to a mismatch in cells’ internal resistances, and the internal resistance of C

_{5}would have been lower than others—the voltage of C

_{5}in Mode 2 was the highest and lowest in discharging and charging processes in Figure 14a,b, respectively. However, the voltage imbalance was as low as 10 mV, and all cell voltages were satisfactorily balanced. All cells continued to uniformly discharge in Modes 3 and 4 (3S- and 4S-configurations) without causing cell voltage imbalance. All cells were discharged as low as 0.3 V at the end of the discharging experiment, which was equivalent to the energy utilization ratio of 98.6%.

_{M}was limited within 1.04 V and 2.83 V, while all cells discharged from 2.5 V to 0.3 V. Both discharging and charging voltage profiles matched very well with the theoretical characteristics, demonstrating the proposed reconfiguration technique.

## 5. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Conflicts of Interest

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**Figure 1.**Cell voltage profiles of lithium-ion battery (LIB), lithium-ion capacitor (LIC), and electric double-layer capacitor (EDLC) cells as a function of ampere-hour depth-of-discharge (DoD).

**Figure 3.**(

**a**) Typical reconfiguration sequence of balance-shift circuit for four-cell module, and its (

**b**) discharging and (

**c**) charging profiles.

**Figure 5.**(

**a**) Reconfiguration sequence of unbalance-shift circuit for four-cell module, and its (

**b**) discharging and (

**c**) charging profiles.

**Figure 6.**Unbalance-shift circuit for (

**a**) four cells. Operation modes in (

**b**) 2S-2P, (

**c**) 3S, and (

**d**) 4S-1P.

**Figure 10.**Operation modes. (

**a**) Mode 1 (1S-5P), (

**b**) substate 2A, (

**c**) substate 2B, (

**d**) substate 3A, (

**e**) substate 3B, (

**f**) substate 3C, (

**g**) substate 4A (

**h**) substate 4B, (

**i**) substate 4C, (

**j**) substate 4D, (

**k**) mode 5 (5S-1P).

**Figure 14.**Resultant module and cell voltage profiles in (

**a**) discharging and (

**b**) charging processes.

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**MDPI and ACS Style**

Uno, M.; Lin, Z.; Koyama, K.
Series-Parallel Reconfigurable Electric Double-Layer Capacitor Module with Cell Equalization Capability, High Energy Utilization Ratio, and Good Modularity. *Energies* **2021**, *14*, 3689.
https://doi.org/10.3390/en14123689

**AMA Style**

Uno M, Lin Z, Koyama K.
Series-Parallel Reconfigurable Electric Double-Layer Capacitor Module with Cell Equalization Capability, High Energy Utilization Ratio, and Good Modularity. *Energies*. 2021; 14(12):3689.
https://doi.org/10.3390/en14123689

**Chicago/Turabian Style**

Uno, Masatoshi, Ziyan Lin, and Kakeru Koyama.
2021. "Series-Parallel Reconfigurable Electric Double-Layer Capacitor Module with Cell Equalization Capability, High Energy Utilization Ratio, and Good Modularity" *Energies* 14, no. 12: 3689.
https://doi.org/10.3390/en14123689