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Open AccessArticle

A New Configuration of Three-Level ZSI Using Transistor Clamped Topology

Electrical and Instrumentation Engineering Department, Thapar Institute of Engineering and Technology, Patiala 147004, India
Energies 2020, 13(6), 1469; https://doi.org/10.3390/en13061469
Received: 10 January 2020 / Revised: 26 February 2020 / Accepted: 27 February 2020 / Published: 20 March 2020
(This article belongs to the Special Issue Multilevel Power Converters Control and Modulation Techniques)
In this paper, a three-level ZSI (impedance source inverter) based on transistor clamped theory is proposed. It uses the least number of switch counts and associated gate circuitry among all existing topologies of three-level ZSI without any performance degradation. The existing three-level ZSI topologies require three power switches to be turned ON for upper-lower shoot-through (ULST), and four power switches to be turned ON for full dc-link shoot-through (FST). However, with the proposed configuration, upper–lower shoot-through (ULST) and full dc-link shoot-through (FST) is inserted by turning ON only two power semiconductors. A comparison between diode clamped, transistor clamped, and t-type is presented. The proposed topology can realize any of the existing sine-triangle- or space vector-based PWM (pulse width modulation) schemes, and all existing configurations of three-level ZSI can merge into the proposed inverter configuration. View Full-Text
Keywords: three-level inverters; Z-source inverters; pulse width modulation; transistor clamped inverter three-level inverters; Z-source inverters; pulse width modulation; transistor clamped inverter
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Sonar, S. A New Configuration of Three-Level ZSI Using Transistor Clamped Topology. Energies 2020, 13, 1469.

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