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Article

Cooperative Control for Multi-Module Charging Systems of Ultracapacitors

1
School of Computer Science and Engineering, Central South University, Changsha 410083, China
2
School of Automation, Central South University, Changsha 410083, China
*
Author to whom correspondence should be addressed.
Energies 2020, 13(19), 5218; https://doi.org/10.3390/en13195218
Submission received: 5 August 2020 / Revised: 23 September 2020 / Accepted: 2 October 2020 / Published: 7 October 2020

Abstract

:
Ultracapacitors have recently received great attention for energy storage due to their small pollution, high power density, and long lifetime. In many applications, ultracapacitors need to be charged with a high current, where a multi-module charging system is typically adopted. Although the classical decentralized control method can control the charging process of ultracapacitors, there exists a problem that the charging current may be imbalanced among charging modules. In this paper, a cooperative cascade charging method is proposed for the multi-module charging system to reduce the current imbalance among charging modules. First, the state-space averaging method and graph theory are used to model the multiple-module charging system. Second, an effective cooperative cascade control is proposed, where the outer voltage loop stabilizes the output voltage to the desired voltage and the inner current loop guarantees the current of each charger to follow the target current. The block diagram is used to establish the closed-loop model of the charging system. In order to evaluate the proposed charging method, a laboratory prototype was established. Compared with the classical decentralized method, this method can effectively suppress the current imbalance, which is proved by simulation and experimental results.

1. Introduction

As an emerging energy storage device, ultracapacitors have been widely used in many high-power applications, including catenary-free trams [1,2], elevators [3], and electric vehicles [4,5,6]. Compared with traditional batteries, ultracapacitors have its merits such as faster charging and discharging, greater power density, and longer service lifetime [7,8,9].
In practical applications, the ultracapacitors need to be charged and discharged frequently [10]. There is a great demand for the charging speed of the ultracapacitor and high current charging is required generally. For instance, in the catenary-free tram applications, onboard supercapacitors need to be recharged at each station where the charging time is limited to 30 s [11]. In order to satisfy the fast charging requirement, the multi-module charging system is typically adopted [12,13].
In practice, a decentralized control method is applied to manage the multi-module charging system, which means that charging modules work independently [14,15,16]. Due to the differences of the charging modules, this method may cause charging current imbalance among charging modules, resulting in different lifetimes of each charging module. Extensive centralized control methods have also been proposed to manage multiple modules, i.e., the currents of all modules are collected and processed in a central node [17]. The drawback of the centralized methods is that the single point failure degrades the reliability of the multi-module charging system [15].
In a multi-agent system, cooperative control describes a situation where the state of each agent is affected by other agents, so that all agents track the leader simultaneously [18]. The cooperative cascade control of multiple charging modules is proposed [19]. By considering the communication of the various charging modules, the charging current of each module is synchronized, and then the stability and lifetime of the entire charging system are guaranteed.
There are three innovations in this paper:
  • We propose the cooperative cascade control for multiple charging modules to restrain the current imbalance and increase the life of charging modules.
  • The closed-loop transfer function matrix is proposed to describe the charging system. The design of the controllers is illustrated with a practical case study.
  • Extensive simulation and experiment results verify the effectiveness and superiority of the proposed method in the charging of ultracapacitors.
The remainder of this paper is organized as follows. Section 2 describes the mathematical modeling of the multi-module charging system. In Section 3, we propose a cooperative cascade charging method. Case studies are provided in Section 4. We conclude the paper in Section 5.

2. System Modeling

The averaging method of state-space and graph theory are the media used to describe the modeling of multi-module charging system in this section.

2.1. Physical Modeling

In this paper, we choose the buck converter as the main topology, because the buck converter has significant advantages such as the simple structure and good dynamic performance. The buck converter and ultracapacitor stack are the main part of physical layer. The average method is used to establish the state-space model of physical layer, and the transfer function of physical layer is solved by Laplace transform.
A combination of multiple charging modules and ultracapacitor stacks forms the charging system. The input of charging module is power grid. The ultracapacitor stack is charged by the output ports of n charging modules in parallel. Therefore, the charging current of ultracapacitor is the sum of each modules’ output current. Next, we model the ultracapacitor stack and the charging module respectively. Then, we build the system-level model according to the model of the charging modules and ultracapacitor stack.
The equivalent circuit method is used to model the ultracapacitor. It is well known that the single R-C model is generally accepted as an equivalent electrical model due to its simplicity and rapid caculation [20]. A resistor and a capacitor are connected in series to form the main part of the model. The R is the equivalent internal resistor and C is the equivalent capacitor of ultracapacitor stack. Then, we have
v s = v c + i s R ,
where v s stands for the terminal voltage of ultracapacitor stack, i s is the summed charging current, and v c is the voltage of internal equivalent capacitor.
In Figure 1, the components of charging module k are as follows; rectifier T k , a MosFET S k , a freewheeling diode D k , and an inductor L k . The input of charging module is power grid, and then the DC flow is adjusted as the output current of the charging module k. By choosing the i k ( t ) and v c ( t ) as the state variables, we can derive the state equation of buck converter.
When the MosFET S k is on, we have
C d v c t d t = i s t , L k d i k t d t = v s t + V i n .
The matrix expression is
d v c t d t d i k t d t = 0 1 C 1 L k 0 v s t i s t + 0 1 L k V i n .
When the MosFET S k is off, the state equation of buck converter is
C d v c t d t = i s t , L k d i k t d t = v s t .
The corresponding expression is
d v c t d t d i k t d t = 0 1 C 1 L k 0 v s t i s t .
Then, the state space average equation can be deduced as follows,
L k d i k ( t ) d t = V i n d k v s ( t ) , C d v c t d t = i s t ,
where V i n is the rectified DC input voltage for each charging module, L k and d k are the inductor and duty cycle of charging module k, respectively; and i k and v c are the average current and voltage of charging module k during the switching cycle, respectively. The symbol is omitted later, but all variables represent the mean of their switching cycles.
As is shown in Figure 1, the topology of entire system consists of multiple charging modules connected in parallel, i.e.,
i s = i 1 + i 2 + + i n ,
v 1 = v 2 = = v n .
The system-level state-space model is described as
L k d i k d t = V i n d k v s , k = 1 , 2 , · · · , n . C d v s d t = R C d i s d t + i s .
N + 1 differential equations are used to describe the charging system. The time-domain model (9) can be converted to a transfer function model. According to the model (9), we have
s L k I k ( s ) = V i n D k ( s ) U s ( s ) , k = 1 , 2 , · · · , n . s C U s ( s ) = s R C I s ( s ) + I s ( s ) ,
where I s ( s ) is the Laplace transform of charging current i s , U s ( s ) is the Laplace transform of terminal voltage v s , I k ( s ) is the Laplace transforms of output current i k , and D k ( s ) is the Laplace transform of duty cycle d k of the charging module k.
Then, (10) can be simplified by eliminating the variable U s ( s ) as
s L k I k ( s ) + R I s ( s ) + 1 s C I s ( s ) = V i n D k ( s ) , k = 1 , 2 , · · · , n .
We define I as the output of system, I 0 as the reference and D as input of system. Therefore, the I , I 0 , and D can be written as follows,
I = i 1 i 2 i n T , I 0 = i 0 i 0 i 0 T , D = d 1 d 2 d n T .
Now, the matrix form of the physical layer model is derived as
Ψ I ( s ) = V i n D ( s ) ,
where I ( s ) is the Laplace transform of I , D ( s ) is the Laplace transform of D , and Ψ is
s L 1 + R + 1 s C R + 1 s C R + 1 s C R + 1 s C s L 2 + R + 1 s C R + 1 s C R + 1 s C R + 1 s C s L n + R + 1 s C .
The transfer function matrix P 1 ( s ) from D ( s ) to I ( s ) is
P 1 ( s ) = V i n Ψ 1 .
The transfer function model of charging system is established from I ( s ) to v s ( s ) . The derivation process is as follows.
From (12) we can know I = i 1 i 2 i n T . According to (10), we can know s C U s ( s ) = s R C I s ( s ) + I s ( s ) .
Then, we have
U s ( s ) I s ( s ) = R + 1 C s .
As the charging modules is connected in parallel, we have
I s ( s ) = 1 1 I ( s ) .
Now, the transfer function matrix from I ( s ) to U s ( s ) is derived as
P 2 ( s ) = R + 1 C s R + 1 C s .

2.2. Cyber Modeling

In this section, the interconnection topology among n charging modules is described by graph theory. The charging modules are regarded as nodes in graph [21]. If node m can send information to node k, we denote a k m = 1 , otherwise a k m = 0 . We define an adjacency matrix A to describe the communication relationship among n charging modules, i.e., A = [ a k m ] n × n . The degree matrix B which is a diagonal matrix can be defined as B = [ b k k ] n × n , where b k k is the number of the nodes which can send information to node k. B A is defined as the Laplacian matrix L.
The design objective is to guarantee the charging currents/voltages of each charging module follow the target current/voltage. In order to describe the availability of the reference to charging modules, we define a diagonal pinning matrix G as
G = [ g k ] n × n .
where g k = 1 if the reference is available to node k, and g k = 0 otherwise.
The matrices L and G can characterize the interactions of charging modules. The matrix L represents the communication topology of neighbor modules and the matrix G indicates whether the modules receive the reference information or not.
There are two prerequisites for the effectiveness of the proposed method: (i) at least one charging module is pinned to the reference and (ii) the communication graph of modules is connected.

3. Cooperative Cascade Charging

In this section, a cooperative cascade controller is designed to regulate the charging process of onboard ultracapacitors. The proposed charging scheme consists of an inner current loop and an outer voltage loop. The current loop balances the charging current among charging modules and the voltage loop guarantees the voltage of ultracapacitors follows the reference voltage.

3.1. Cyber-Physical Representation

Figure 2 shows the cyber-physical representation of the proposed charging method, which consists of three layers: physical layer, cyber layer, and control layer. The physical layer mainly includes ultracapacitor stack and multiple parallel charging modules. The sum current of all charging modules serves as the charging current of the ultracapacitor. In the cyber layer, each charging module is regarded as a node in the graph. The connection of the nodes represents that the two modules can communicate with each other. Unlike other nodes, node 0 is a virtual leader representing the reference information. In the control layer, a cooperative control method is designed to eliminate the current imbalance of charging modules.

3.2. Cooperative Current Control

The inner current loop is responsible for the constant-current charging. The inner cooperative current controller consists of two terms: a compensator H 1 ( s ) and a cooperative current tracker. The control strategy is shown as follows,
δ k = g k i 0 i k + m = 1 n a k m i m i k
where i 0 is the reference current, i k is the output current of charging module k, i m is output current of module k’s neighbor, g k is the pinning gain, and a k m is the adjacent modules.
The reference current i 0 is the leader and i k is the follower. The goal of the cooperative current tracker is that the follower i k follows the leader i 0 while reducing the current difference with it’s neighbors’ current [18].
The second term is the compensator H 1 ( s ) . The input of compensator H 1 ( s ) is the output of the current tracker δ k . The compensator generates duty cycle d k to ensure the δ k converge to zero. The compensator H 1 ( s ) is shown as follows,
H 1 ( s ) = k p 1 + k i 1 s ,
where k p 1 and k i 1 are the proportional coefficient and integral coefficient, respectively. The compensator can reduce steady state error and improve the transient response of the charging control system.
Theorem 1.
If the current loop satisfy the following conditions. (i) The reference pins to at least one charging module; (ii) the modules are connected; (iii) the compensator can ensure the formation of a closed-loop system, all followers can be synchronized with the reference finally.
Proof. 
From (19), we have
δ k = g k i 0 g k i k + m = 1 n a k m i m m = 1 n a k m i k = g k i 0 g k i k + m N k a k m i m m N k a k m i k = b k k + g k i k + g k i 0 + m N k a k m i m .
Formula (21) is written in matrix form as
Δ = B + G I + G I 0 + AI = B A I + G I 0 I = LI + G I 0 I
where Δ = δ 1 · · · δ n T .
From the definition of the Laplacian matrix, we can know the sum of each row of L is zero. Then we have LI 0 = 0 . Adding it to (22) gives the following result:
Δ = L I 0 LI + G I 0 I = L + G I 0 I .
If the closed-loop system is stable due to the action of compensator H 1 ( s ) , the feedback error Δ will be suppressed to zero. It means that
Δ = 0 L + G I 0 I = 0 .
The matrix L + G is invertible if the reference pin and the module diagram of at least one module are connected.
L + G I 0 I = 0 I = I 0 .
This completes the proof. ☐
Figure 3 shows the block diagram of the inner cooperative current loop, where the input signal is I 0 , and the output is I . According to the block diagram, we can obtain the open-loop transfer function matrix as
G o ( s ) = P 1 ( s ) H 1 ( s ) ( L + G )
The closed-loop transfer function matrix is
G c ( s ) = [ E + G 0 ( s ) ] 1 G o ( s )
where E is the identity matrix of order n × n .

3.3. Pinning-Based Voltage Control

Parallel connection is used in charging modules, i.e., the voltage of each module is equal to the voltage of ultracapacitor stack. It means that the ultracapacitor voltage can be controlled by anyone of charging modules.
There are two parts of the outer voltage loop, and the first part is the voltage tracker:
σ k = g 0 k ( v 0 v s )
where the σ k is the input of the voltage closed-loop controller, v 0 is reference voltage, v s is the actual output voltage, and g 0 k is the pinning gain.
The second part is a compensator H 2 ( s ) :
H 2 ( s ) = k p 2 + k i 2 s
where k p 2 and k i 2 are proportional coefficient and integral coefficient, respectively.

3.4. Closed-Loop Modeling

The n × n MIMO model is determined to be the closed-loop model of the whole system. We can use a transfer function matrix to characterize the n-order system.
A control system can be represented by a block diagram which consists of signal lines, lead points, comparison points, and blocks. The signal line is a straight line with an arrow indicating the direction of the signal. The lead point indicates where the signal is taken or measured. Comparison point means the sum or difference of more than two signals. The block indicates the mathematical transformation of the signal, and the transfer function of the component or system is written in the block.
The proposed control system has two main parts: outer voltage loop and inner current loop, where the output of the voltage loop is the reference of inner current loop. The objective of the control system is to ensure the voltage of the ultracapacitor converges to the reference voltage v 0 , i.e., the input signal of the system is v 0 . The tracking error σ k = v 0 v s goes to H 2 ( s ) to generate the reference current i 0 . As i 0 is a scalar, it is multiplied by a vector to produce I 0 . Then, the negative feedback signal generated by I 0 I is transmitted to the L + G to generate the tracking error Δ . The compensator H 1 ( s ) generates the duty cycle signal D according to the current error. Finally, the multi-module charging system P 1 ( s ) obtains the duty cycle signal D to provide the output current I . The charging block diagram of the system is shown in Figure 4.

4. Case Studies

In this section, we evaluate the proposed charging method based on experimental results, and in order to illustrate how to design compensators H 1 ( s ) and H 2 ( s ) , we provide a practical case study. Without loss of generality, we consider the case of three chargers, which can charge ultracapacitors with three chargers connected in parallel.

4.1. Parameter Setting

We first provide the physical and cyber parameters, and then compute the control parameters of H 1 ( s ) and H 2 ( s ) .

4.1.1. Physical Parameters

We design the parameters of the whole charging system: the input voltage V i n = 24 V, reference current i 0 = 1 A, desired voltage v 0 = 2.7 V, the capacitance of ultracapacitors C = 100 F, the ESR of ultracapacitors R = 0.1 Ω , and three inductors L 1 = L 2 = L 3 = 1 mH.

4.1.2. Cyber Parameters

Without losing generality, we assume that three chargers are interconnected and the three chargers follow the reference signal. In this case, the matrix L and matrix G are
L = 2 1 1 1 2 1 1 1 2 , G = 1 0 0 0 1 0 0 0 1 .

4.1.3. Control Parameters

The control parameters of H 1 ( s ) in the current control loop are determined first, and then the control parameters of H 2 ( s ) in the voltage control loop are calculated.
Current Compensator Design: From the work in (27), the closed-loop model of the current loop is determined as
I 1 ( s ) I 2 ( s ) I 3 ( s ) = G 11 ( s ) G 12 ( s ) G 13 ( s ) G 21 ( s ) G 22 ( s ) G 23 ( s ) G 31 ( s ) G 32 ( s ) G 33 ( s ) I 0 ( s ) I 0 ( s ) I 0 ( s ) ,
where G k m ( s ) k , m 1 , 2 , 3 is the ( k , m ) component of the closed-loop transfer function matrix G c ( s ) in (27).
Then, G k 0 ( s ) represents the closed-loop transfer function from reference to the output current of module k, which can be derived as
G k 0 ( s ) = G k 1 ( s ) + G k 2 ( s ) + G k 3 ( s ) .
The transfer function G k 0 ( s ) is calculated by Matlab
( 24,000 k p 1 ) s + 24,000 k i 1 s 2 + ( 24,000 k p 1 + 300 ) s + 24,000 k i 1 + 30 .
The transfer function (32) is a standard second-order transfer function in form. The dynamic performance of the system is determined by the parameters k p 1 and k i 1 . The natural frequency ω n 1 and damping ratio ζ 1 of (33) are derived as follows,
ω n 1 = 24,000 k i 1 + 30 , ζ 1 = 24,000 k p 1 + 300 2 24,000 k i 1 + 30 .
The time required for a system to stabilize within 2 % of the reference signal is called the setting time. In the second-order system, the settling time t s 1 is approximated as [22,23]
t s 1 = 4.4 ζ 1 ω n 1 .
The stabilization time is usually selected as 0.01 s during CC charging. Substituting t s = 0.01 into (34) and (35), we obtain
k p 1 = 0.0242 .
The transient response can be improved when the damping ratio ζ 1 is small during the CC charging. We typically choose ζ 1 = 0.4 0.8 [22]. On the premise of generality, we choose ζ 1 = 0.707 . Then, from (34)
k i 1 = 16.137 .
The parameters k p 1 and k i 1 of compensator H 1 ( s ) in the current control loop have been calculated. Next, the parameters of H 2 ( s ) in the voltage control loop will be determined.
Voltage Compensator Design: The current control loop response is extremely fast compared to the outer voltage loop. Thence in the process of modeling the outer voltage loop, the current loop can be approximated that I = I 0 . Analogy to the above derivation (31)–(33), the transfer function G k 0 ( s ) of the voltage circuit is
30 k p 2 s 2 + ( 30 k i 2 + 3 k p 2 ) s + 3 k i 2 ( 30 k p 2 + 100 ) s 2 + ( 30 k i 2 + 3 k p 2 ) s + 3 k i 2 .
We can compute
k p 2 = 1.678 , k i 2 = 0.0003921 .
Now the parameters k p 2 and k i 2 of compensator H 2 ( s ) are also determined. The effectiveness of the compensators H 1 ( s ) and H 2 ( s ) will be verified with simulation and experiment results.

4.2. Simulation Results

By selecting the corresponding module in Simulink, connecting each module with reference to the mathematical model, and adjusting the parameters, we build the Simulink block diagram, where the reference voltage is set to 2.7 V, and the three charging modules charge the capacitor with a total current of 3 A [24].
The total current and the charging voltage of the ultracapacitor are shown in the Figure 5. The total current quickly rises to 3 A. The current drops after the capacitor voltage reaches the reference value. The voltage of the capacitor increases linearly to a reference value and then stabilizes.
As shown in the Figure 6, the three charging modules’ current of the cooperative charging method and the decentralized control method is as follows. If choosing the decentralized control as the method of multi-module charging system, the current among the modules is unbalanced because each charging module operates independently, which reduces the service life of the system. The designed collaborative control method can avoid this situation because the charging current of the three modules are equal.

4.3. Hardware Setup

The experiment platform is shown in Figure 7 which consists of (1) direct current (DC) power source, (2) measurement board, (3) three buck converters, (4) ultracapacitor, (5) PXI platform, and (6) Labview. The charging system consists of one micro-controller, three buck converters, and one ultracapacitor. In this paper, we choose the DSP2808 as the control chip, the controllable DC power supply as the power source [25], and a 100 F ultracapacitor of Maxwell as the load. The PXI platform is used to observe and record the waveform of the ultracapacitor voltage and three chargers’ currents.
The TMS320F2808 is the heart of the control board. It is a fixed-point DSP chip on the C2000 platform introduced by Texas Instruments, and the chip has the advantage of low-cost, low-power, and high-performance processing capabilities. There are 16 PWM outputs, 2 CAN modules, and 16 ADC channels. The measured analog signal is filtered by the operational amplifier TL074ID. In the experiment, we apply one micro-controller to control three charging modules, i.e., the micro-controller consists of three control procedures. The control procedure collects the current of the corresponding charging module and then communicates with each other through the signal flow to make a control decision. The communications among modules are signal flows in the software design.

4.4. Experiment Results

4.4.1. Constant-Current Charging

The constant-current (CC) charging is adopted for fast charging of the ultracapacitors. The current of each charging module and the voltage change of the ultracapacitor are shown in Figure 8. It can be seen from the profiles that the ultracapacitor is charged with a total current of 3 A provided by three charging modules in parallel. When the voltage increases linearly to 2.7 V, the current is disconnected and the charging time is 87 s. Due to the internal resistance of ultracapacitor, the voltage has a sudden drop of 300 mV.

4.4.2. Constant Current-Constant Voltage Charging

Cascade charging method can achieve the constant current-constant voltage charging of ultracapacitors when the full charging is required. The charging curves of the charging system are shown in Figure 9, which comprises the voltage profile of the ultracapacitor and current profiles of three charging modules. There are two stages in the charging process: CC charging stage and CV charging stage. In the CC stage, three charging modules supply 1 A output current, respectively. The ultracapacitor is charged with a total current of 3 A, and the voltage increases linearly to the desired voltage 2.5 V. The CC charging protocol is transformed to the CV charging protocol, with the help of algorithm, when the ultracapacitor voltage increases to the desired voltage 2.5 V at 75 s. In the CV stage, the ultracapacitor voltage increases slowly and maintains at 2.7 V. The current of three charging modules decrease to zero exponentially. The ultracapacitor is fully charged and the total charging time is 100 s.

4.5. Fault-Tolerant Charging

The superiority of cooperative control is verified with Figure 10, in which we find that the proposed method can reduce the current imbalance effectively. In the decentralized control method, charging modules supply unbalanced charging current. Then, charging modules with larger current will be affected by overload, which will reduce the lifetime of the charging modules and the reliability of the whole charging system will be reduced.
The control strategy of this paper adopts a distributed structure. The advantage is that it avoids failure of single point and improves the fault tolerance ability of the system. Figure 10b illustrates that during the normal operation of the circuit, the third charging module suddenly fails and the output current becomes zero. When the third charging module fails, the other two charging modules still provide the current required for the ultracapacitor and are not affected by the third charging module. As shown in Figure 10a, the ultracapacitor can be charged to full charge. Due to the failure of other modules, the current of single module may be too high. When the current of a module reaches the limit, we limit its value through the program design to ensure safety.
Due to all of the charging modules are connected with the virtual leader in cyber layer, so the three charging modules work cooperatively to power the ultracapacitor instead of simply paralleling together. From Figure 10b, we can also know that when the third current becomes 0, the current of the ultracapacitor is provided by two charging modules. If the three charging modules are simply connected in parallel, the normal two buck circuit will maintain the original current. In the proposed control scheme of this paper, three parallel current loops are connected in the same voltage loop, so i 1 , i 3 change from 1 A to 1.5 A when i 2 changes from 1 A to 0 A.
At 32 s, where the second charging module is back to normal, Figure 10b shows that i 2 returns back to 1 A and i 1 , i 3 return to 1 A too. Moreover, the slope of the change in ultracapacitor voltage did not change too much during the whole process, and the ultracapacitor voltage rises steadily which is shown in Figure 10a. From Figure 10b we can know the total current of three charging modules is 3 A all the time. It indicates that the faulty of the second charging module has no effect on the normal operation of the system, which confirms the independence among modules of the system.

4.6. Discussions

4.6.1. Effectiveness

In practice, the ultracapacitors can be charged by constant-current (CC) method and constant-current constant-voltage (CC-CV) method. From Figure 8, the charging of CC method is fast but there is a voltage drop of 300 mV at the end of charging. The charging speed of CC-CV method is a little slow but can charge ultracapacitor more fully.

4.6.2. Superiority

As shown in Figure 6, the current imbalance can be restrained by the cooperative charging method which means that the effect is better than that of decentralized control method. The stability and lifetime of the entire charging system are guaranteed. As shown in Figure 10, compared with the classical centralized control method, good scalability, and fault tolerance can be shown in the proposed method.

4.6.3. Scalability

The method proposed in this paper is a cooperative control method. Each charger only communicates with adjacent modules. Therefore, this method has a good scalability. The number of chargers will not affect the stability of the whole system. The proposed method is suitable for multi-module charging applications.

4.6.4. Fault Tolerance

We prove the fault-tolerant ability of the proposed charging system by setting a charging module to fail, and then resume normal operation. As shown in Figure 10. From the figure we can see the failure of second charging module has no effect on the total charging current and ultracapacitor’s voltage, and the entire charging system can still complete the charging task successfully. In addition, Figure 10b also demonstrates the cooperative work ability among charging modules. The output of each charging module is not only related to local information, but also has a relationship with neighbor information.

4.6.5. Communication Delays

The proposed method can be applied in small-scale or large-scale scenarios. In small-scale application, only one micro-controller is needed. The micro-controller can provide the port needed for control without delay problem. In large-scale application where multiple micro-controllers are required, the communication delays between modules will affect the effectiveness of the system.

5. Conclusions

In this paper, we proposed a charging scheme which incorporates cooperative control and cascade control for the ultracapacitor. The cooperative control in the inner current loop of cascade control guarantee that the charging current among charging modules is balanced for the charging system with multiple modules. The outer voltage loop of cascade control can guarantees the ultracapacitor to be charged fully. We also build the block diagram of the proposed control scheme. Moreover, the proposed charging system has a great fault-tolerant ability. The experimental results show the effectiveness of the proposed method. Time delay and synchronization issues of multiple micro-controllers and measurement noises will be considered in our future work.

Author Contributions

Conceptualization, H.L. (Heng Li) and J.P.; methodology, X.Z. and H.L. (Heng Li); validation, J.L.; data curation, J.L. and H.L. (Hongtao Liao); writing–original draft preparation, X.Z. and J.L.; writing–review and editing, H.L. (Heng Li) and J.P. All authors have read and agreed to the published version of the manuscript.

Funding

This research is supported by the National Natural Science Foundation of China (Grant No. 61803394), the National Natural Science Foundation of China (Grant No. 61873353) and the Natural Science Foundation of Hunan Province (Grant No. 2019JJ50822).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The scheme of the multi-module charging system.
Figure 1. The scheme of the multi-module charging system.
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Figure 2. The cyber-physical representation of the proposed charging control system.
Figure 2. The cyber-physical representation of the proposed charging control system.
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Figure 3. The control block diagram of the current loop.
Figure 3. The control block diagram of the current loop.
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Figure 4. The closed-loop model of the multi-module charging system.
Figure 4. The closed-loop model of the multi-module charging system.
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Figure 5. The total charging current and the charging voltage of ultracapacitor.
Figure 5. The total charging current and the charging voltage of ultracapacitor.
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Figure 6. The three charging modules’ current of two methods.
Figure 6. The three charging modules’ current of two methods.
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Figure 7. The hardware setup of the three-charger testbed: (1) power source; (2) measurement board; (3) three buck converters; (4) ultracapacitor; (5) PXI platform; (6) Labview.
Figure 7. The hardware setup of the three-charger testbed: (1) power source; (2) measurement board; (3) three buck converters; (4) ultracapacitor; (5) PXI platform; (6) Labview.
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Figure 8. The CC charging profiles.
Figure 8. The CC charging profiles.
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Figure 9. The CC-CV charging profiles.
Figure 9. The CC-CV charging profiles.
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Figure 10. Fault-tolerant Charging Process.
Figure 10. Fault-tolerant Charging Process.
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MDPI and ACS Style

Zhang, X.; Lei, J.; Li, H.; Liao, H.; Peng, J. Cooperative Control for Multi-Module Charging Systems of Ultracapacitors. Energies 2020, 13, 5218. https://doi.org/10.3390/en13195218

AMA Style

Zhang X, Lei J, Li H, Liao H, Peng J. Cooperative Control for Multi-Module Charging Systems of Ultracapacitors. Energies. 2020; 13(19):5218. https://doi.org/10.3390/en13195218

Chicago/Turabian Style

Zhang, Xiaoyong, Jiaxuan Lei, Heng Li, Hongtao Liao, and Jun Peng. 2020. "Cooperative Control for Multi-Module Charging Systems of Ultracapacitors" Energies 13, no. 19: 5218. https://doi.org/10.3390/en13195218

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