An MPC Reference Governor Approach for Enhancing the Performance of Precompensated Boost DC–DC Converters

Abstract

This article addresses the problem of enhancing the performance of boost DC–DC converters that are already compensated either in voltage-mode by a common proportional–integral–derivative (PID, Type III) primary controller or in current-mode with a two-loop PI control law. Improved performance may be obtained with the addition of a secondary controller/prefilter in the form of a reference governor. This complementary scheme adjusts the imposed voltage reference input signal dynamically and can be designed in an optimal fashion via the model predictive control (MPC) methodology. Our evaluation with numerical simulation in MATLAB suggests that this two-level controller can effectively enhance the performance of a DC–DC boost converter in a wide operating range without imposing extra requirements or limitations. A simple linear MPC design in explicit form is employed in this approach, which is computationally tractable for digital microprocessor implementation. This work paves the way for future research involving reference governor ideas in the area of bilinear power electronic converters.

1. Introduction

Reference governor techniques have only very recently appeared in the power electronics field [1,2,3]. Such ideas have been developed theoretically for over two decades and already applied to other engineering fields, mainly in the automotive industry and robotics (see, e.g., [4,5,6] and references therein). Especially for the more demanding types of DC–DC converters (i.e., boost converters with nonlinear dynamics), many advanced control methods have been recently proposed with the aim of improving their transient response and robustness [7,8,9,10,11,12,13], including model predictive control (MPC) technology [14,15,16,17,18,19]. The vast majority of the control algorithms developed are replacements to the primal controller, resulting in an increased complexity and implementation cost. However, there are many cases in which the main controller is already hard-coded or implemented in low-cost hardware with certified performance, stability, and robustness, which we would not like to sacrifice or which is not possible to replace. Instead of replacing this controller, a new idea is to complement it with a secondary, higher-level controller that provides a dynamically modified reference signal to the primal controller. This idea results in a two-loop control structure, where the outer loop provides a modified reference to the inner loop and can also run in a different (slower) rate as it usually involves on-line (e.g., MPC) optimization.

In this paper, the idea of using an MPC reference governor scheme is applied for the first time, to the best of the author’s knowledge, to a voltage-mode-controlled boost DC–DC converter. A similar technique has been recently tested for a DC–DC buck converter controlled by a simple proportional–integral (PI) primary controller [1]. However, the case of a boost converter presents further nontrivial challenges as its dynamics are nonlinear (bilinear), it is a nonminimum phase system, and it requires a much more complicated primary controller. The so-called PI–derivative (PID) Type III controller is an industrial standard for boost converters [20,21]; however, further performance enhancement is possible using a predictive controller and a hybrid scheme combining PID and predictive controllers, as shown in [22]. Considering a standard PID Type III primary controller, this work demonstrates that an MPC reference governor in explicit form can be found that provides improved performance without imposing more stringent operational requirements (higher currents or component stress) or extra constraints. This framework can offer improvements and more degrees of freedom compared to the results of [22], at the expense of added complexity. These findings are supported by extensive simulation results.

Additionally, current-mode, two-loop PI controllers, which are quite common for boost converters, are also studied. Similar MPC reference governor ideas are applied and performance improvements are also obtained, especially in disturbance rejection tasks and soft-start startup situations.

This paper is structured as follows. Section 2 describes the DC–DC boost converter, and Section 3 outlines the basic controllers used in the literature. The main results are included in Section 4, Section 5 and Section 6. Section 4 provides a detailed exposition of the design procedure for the proposed voltage-mode MPC reference governor scheme, while Section 5 presents a thorough evaluation with numerical simulation results. The current-mode scheme is presented in Section 6. The final section concludes.

2. DC–DC Boost Converter

The circuit diagram of the boost converter considered in this paper is shown in Figure 1. A nonideal circuit with parasitic elements of the inductor and the capacitor was adopted. For comparison purposes, the values and the parameter ranges used were taken from [22], and they are summarized in

Table 1. Boost converter parameter values and ranges.

${\mathit{f}}_{\mathit{s}} \left(\mathbf{K}\mathbf{H}\mathbf{z}\right)$	${\mathit{V}}_{\mathit{I}\mathit{N}} \left(\mathbf{V}\right)$	$\mathit{L} \left(\mathsf{\mu }\mathbf{H}\right)$	${\mathit{r}}_{\mathit{L}} \left(\mathbf{\Omega }\right)$	$\mathit{C} \left(\mathsf{\mu }\mathit{F}\right)$	$\mathit{R} \left(\mathbf{\Omega }\right)$	${\mathit{r}}_{\mathit{C}} \left(\mathbf{\Omega }\right)$	${\mathit{V}}_0 \left(\mathbf{V}\right)$	$\mathit{D}$
200	8–14	100	0.05	200	10–50	0.01	24	0.42–0.58

, where $f_s$ is the switching frequency of the pulse width modulator (PWM), and $D$ is the duty cycle taking values in the interval [0, 1].

A common averaging small-signal analysis (see, e.g., [23]) leads to a typical transfer function from the duty cycle $d\left(t\right)$ to the output voltage $v_0\left(t\right)$ in the following form:

$$G_{v_{0}d}\left(s\right)=\frac{v_0\left(s\right)}{d\left(s\right)}=G_{d0}\frac{\left(1+\frac{s}{{\omega }_{Z_1}}\right)\left(1-\frac{s}{{\omega }_{RHPZ}}\right)}{1+\frac{s}{{\omega }_{0}Q}+\frac{s^2}{{\omega }_0^2}}$$

(1)

with one zero ${\omega }_{ZC}$ in the left half plane, another zero ${\omega }_{RHPZ}$ in the right half plane (nonminimum phase behavior), and two poles parameterized by the frequency ${\omega }_0$ and the quality factor $Q$, where

$$\begin{gathered} G_{d0}=\frac{V_{IN}}{{\left(D^{\prime }\right)}^2}=\frac{V_0{}^2}{V_{IN}}, {\omega }_0=\frac{1}{\sqrt{LC}}\sqrt{\frac{r_L+R {\left(D^{\prime }\right)}^2}{R}}\cong \frac{1}{\sqrt{LC}}\frac{V_{IN}}{V_0}, D{ }^{\prime }=1-D, \\ {\omega }_{Z_1}=\frac{1}{C r_C}, {\omega }_{RHPZ}\cong \frac{R}{L}{\left(\frac{V_{IN}}{V_0}\right)}^2,\hspace{1em}\hspace{1em}Q=\frac{{\omega }_0}{\frac{r_L}{L}+\frac{1}{C\left(R+ r_C\right)}} \end{gathered}$$

(2)

3. PID Type III and ARMarkov Predictive Control Design

A standard control strategy in industrial applications, including power electronics, is the PID controller. A special form of practical PID with three poles and two zeros, a double pole (second-order filter for high-frequency roll-off and noise mitigation), and a double zero (offering the necessary phase boost) is typically used in power electronics. It is known as the Type III compensator (see Figure 2), and its design is usually performed based on the so-called small-signal model of the converter in the frequency domain [23]. Typical requirements are a phase margin (PM) above 45° and a gain margin (GM) over 10 dB. In the present work, and as a reference point for assessing the performance of the proposed MPC reference governor scheme, the design presented in [22] was adopted. The transfer function of the Type III compensator is as follows:

$$\begin{gathered} G_{PID}\left(s\right)=\frac{k_{PID}}{s}\frac{{\left(1+\frac{s}{{\omega }_{ZC}}\right)}^2}{{\left(1+\frac{s}{{\omega }_{PC}}\right)}^2},\hspace{1em}\hspace{1em}{\omega }_{PC}=10 a_P {\omega }_{0dB},\hspace{1em}\hspace{1em}{\omega }_{0dB}={\omega }_{RHPZ}, \\ {\omega }_{ZC}=\frac{a_P {\omega }_{0dB}}{10},\hspace{1em}\hspace{1em}{k}_{PID}=\frac{{\left(a_P {\omega }_{0dB}\right)}^3}{100 G_{do}{\omega }_o^2}\rho \end{gathered}$$

(3)

where the values $a_P,\rho$ are design parameters selected by the tuning procedure in order to obtain the required PM and GM values. The Type III controller in [22] was tuned for the worst-case operating conditions $V_{IN}=8 \mathrm{V}$, $R=10 \mathsf{\Omega }$, $D=0.585$, which resulted in the following values:

$$G_{d0}=72,\hspace{1em}\hspace{1em}{\omega }_0=2.357\mathrm{krad}/\mathrm{s},\hspace{1em}\hspace{1em}{\omega }_{Z_1}=50\mathrm{krad}/\mathrm{s},\hspace{1em}\hspace{1em}{\omega }_{RHPZ}=11.111\mathrm{krad}/\mathrm{s},\hspace{1em}\hspace{1em}Q=2.3582$$

(4)

For an appropriate selection $a_P=1, \rho =0.4$ the controller’s transfer function takes the following form:

$$G_{PID}\left(s\right)=\frac{129}{s}\frac{{\left(1+\frac{s}{1111}\right)}^2}{{\left(1+\frac{s}{111100}\right)}^2}$$

(5)

As demonstrated in [22], this controller has good disturbance rejection properties but suffers from a slow startup response with a large average settling time of 15 ms. Another predictive controller called reduced-order ARMarkov-PFC (ROAPFC) has been designed, which exhibits significantly shorter average settling time without oscillations during the startup. However, this predictive controller has been shown to have noticeably worse disturbance rejection properties with oscillatory transients (three different perturbations, i.e., load, input, and set-point step changes, have been tested, as detailed later). The authors therefore produced the best results by combining the two controllers, Type III and ROAPFC, with appropriate weighting factors and additional feedforward compensation, in a new hybrid version termed APP controller (ARMarkov Plus PID). In this way, the advantages of both controllers are exploited, and a good response in all operating conditions can be obtained. The predictive controller ensures a fast and acceptable transient during startup, while the Type III controller offers good disturbance rejection properties around normal operating conditions. Other recently proposed optimal techniques, e.g., [8,9], have been shown in [22] to perform equally well when dealing with disturbances, but they fail to offer consistent performance in the whole operating range or in unfavorable circumstances (due to very high gains, excessive currents during startup are required).

The ARMArkov-PFC controller is a special type of MPC controller with low computational burden, offering ease of practical implementation in quick processes. One of its advantages is the simple form of the controller, which is a difference equation of relatively low order, requiring only output measurements (inductor current measurements are avoided). More specifically, the PFC controller designed in [22] for the converter in (1), which is a fourth-order discrete transfer function, was converted to a continuous form using Tustin transformation, followed by a model-order reduction, hence producing the so-called ROAPFC. The final controller proposed takes a very simple analogue form:

$$G_{ROAPFC}\left(s\right)=\frac{0.174}{s}\frac{\left(s^2+1050s+5540000\right)}{s+4310}$$

(6)

In the following sections, we use the controllers (3), (6), and their hybrid combination (APP) as a reference point and propose an MPC reference governor scheme on top of the Type III controller capable of producing better results throughout the whole operating envelope, at the expense of increased complexity requiring a digital microprocessor implementation.

4. MPC Reference Governor Design for a Voltage-Mode-Controlled Converter

The development of an optimal and efficient reference governor using linear MPC ideas is commonly performed in a linear discrete-time state-space formulation. Hence, both the system and Type III controller dynamics have to be modeled in an appropriate linear discrete-time state-space form. To this end, a similar procedure to the one in [1] was followed.

4.1. Converter State-Space Modeling

An accurate state-space model of the boost circuit of Figure 1 can be found by following the common practice of defining the inductor’s current $x_1=I_L$ and the capacitor’s voltage $x_2=V_0$ as state variables. The model takes the following bilinear form (the tiny resistance $r_C$ is ignored for simplicity):

$$\begin{gathered} \dot{x}=Ax+Bu+F_1{x}_{1}u+F_2{x}_{2}u+B_v,\hspace{1em}\hspace{1em}y=Cx,\hspace{1em}\hspace{1em}x={\left[I_L V_0\right]}^T\in {\mathbb{R}}^{2\times 1} \\ A=\left[\begin{array}{cc}-\frac{r_L}{L}& -\frac{1}{L}\\ \frac{1}{C}& -\frac{1}{RC}\end{array}\right],\hspace{1em}\hspace{1em}B=0,\hspace{1em}\hspace{1em}C={\left[0 1\right]}^T,\hspace{1em}\hspace{1em}{F}_1={\left[0 -\frac{1}{C}\right]}^T, \\ {F}_2={\left[1/L 0\right]}^T, B_v={\left[V_{IN}/L 0\right]}^T \end{gathered}$$

(7)

The next step is to linearize the dynamics about the equilibrium point using small signal variations reflecting nominal operating conditions $\tilde{x}=x-x_e,\tilde{u}=u-u_e,\tilde{y}=y-y_e$ to obtain new matrices:

$$\begin{gathered} \dot{\tilde{x}}=A_{lin} \tilde{x}+B_{lin}\tilde{u},\hspace{1em}\hspace{1em}y=C_{lin} \tilde{x}+D_{lin}\tilde{u} \\ {A}_{lin}=\left[\begin{array}{cc}-r_L/L& -\left(1-u_e\right)/L\\ \left(1-u_e\right)/C& -1/\left(RC\right)\end{array}\right],\hspace{1em}\hspace{1em}{B}_{lin}={\left[x_{2e}/L-x_{1e}/C\right]}^T,\hspace{1em}\hspace{1em}{C}_{lin}={\left[0 1\right]}^T,\hspace{1em}\hspace{1em}{D}_{lin}=0\hspace{1em}\hspace{1em} \\ {x}_e={\left[x_{1e} x_{2e}\right]}^T,\hspace{1em}\hspace{1em}{x}_{1e}=\frac{V_{IN}}{r_L+R {\left(1-u_e\right)}^2}, \\ {x}_{2e}=\left(R V_{IN} \left(1-u_e\right)\right)/\left(r_L+R {\left(1-u_e\right)}^2\right) \end{gathered}$$

(8)

These linear continuous-time dynamic equations may be further discretized for a fixed sampling period $T$ to obtain the following discrete-time model in the new state variables $x_d\in {\mathbb{R}}^{2\times 1}$:

$$\begin{gathered} x_d\left(k+1\right)=A_d x_d\left(k\right)+B_d u_d\left(k\right), y_d\left(k\right)=C_d x_d\left(k\right) \\ {A}_d=e^{A_{lin} T}, B_d={{\displaystyle \int }}_0^T{e}^{A_{lin} \tau } {\rm B} d\tau , C_d=C \end{gathered}$$

(9)

4.2. PID Controller State-Space Form

A reliable discretization method for small sampling periods is the approximate backward difference (It is well known that, for a sufficiently high sampling frequency, all approximation methods are safe and guarantee satisfactory performance. However, the backward difference method is the simplest possible representation and hence advantageous for subsequent modeling and control design.) method, for which it is well known that the Laplace-transform variable $s$ and the Z-transform $z$ are related by $=\frac{z-1}{Tz}$ as the time derivative of a time variable $x\left(t\right)$ is approximated by $\stackrel{·}{x}\left(t\right)=\frac{x\left(k\right)-x(k-1)}{T}$. Direct substitution of $s$ in the Type III controller transfer function $G_{PID}\left(s\right)$ as in (3) leads to the following discrete-time transfer function $G_{PID}\left(z\right)$:

$$\begin{gathered} G_{PID}\left(s\right)=\frac{k_{PID}}{s}\frac{{\left(1+\frac{s}{{\omega }_{ZC}}\right)}^2}{{\left(1+\frac{s}{{\omega }_{PC}}\right)}^2} \underset{\mathrm{s}=\frac{\mathrm{z}-1}{\mathrm{Tz}}}{\Rightarrow }{G}_{PID}\left(z\right)=K_0\frac{z {\left(z-z_1\right)}^2}{\left(z-1\right){\left(z-z_2\right)}^2} \\ {K}_0=k_{PID} T \frac{{\left(1+\alpha \right)}^2}{{\left(1+\beta \right)}^2}, z_1=\frac{\alpha }{1+\alpha }, z_2=\frac{\beta }{1+\beta }, a=\frac{1}{T{\omega }_{ZC}}, \beta =\frac{1}{T{\omega }_{PC}} \end{gathered}$$

(10)

Subsequently, a state-space formulation is obtained by partial fraction expansion of $G_{PID}\left(z\right)$ as

$$\begin{gathered} G_{PID}\left(z\right)=K_0\frac{z {\left(z-z_1\right)}^2}{\left(z-1\right){\left(z-z_2\right)}^2} =K_0+\frac{K_1}{z-1}+\frac{K_2}{z-z_2}+\frac{K_3}{{\left(z-z_2\right)}^2} \\ {K}_1=K_0\frac{{\left(z_1-1\right)}^2}{{\left(z_2-1\right)}^2},\hspace{1em}\hspace{1em}{K}_2=K_0\frac{2z_2^3-\left(3+2z_1\right)z_2^2+4z_1{z}_2-z_1^2}{{\left(z_2-1\right)}^2},\hspace{1em}\hspace{1em}{K}_3=K_0\frac{z_1^2{z}_2-2z_1{z}_2^2+z_2^3}{z_2-1} \end{gathered}$$

(11)

Further introduction of a new controller state variable vector $x_c={[x_{c1},x_{c2},x_{c3}]}^T\in {\mathbb{R}}^{3\times 1}$ as

$$X_{c1}\left(z\right)=\frac{K_1}{z-1},\hspace{1em}\hspace{1em}{X}_{c2}\left(z\right)=\frac{K_2}{z-z_2},\hspace{1em}\hspace{1em}{X}_{c3}\left(z\right)=\frac{K_3}{{\left(z-z_2\right)}^2}$$

(12)

This leads, after some trivial calculations, to a simple state-space formulation in discrete-time:

$$\begin{gathered} x_c\left(k+1\right)=A_c x_c\left(k\right)+B_c u_c\left(k\right), y_c\left(k\right)=C_c x_c\left(k\right)+D_c x_c\left(k\right) \\ {A}_c=\left[\begin{array}{ccc}1& 0& 0\\ 0& z_2& 0\\ 0& 1& z_2\end{array}\right], B_c=\left[\begin{array}{c}1\\ 1\\ 0\end{array}\right], C_c={\left[K_1,K_2,K_3\right]}^T, D_c=K_0 \end{gathered}$$

(13)

4.3. Reference Governor MPC Design and Tuning

For an MPC reference governor design on top of an already controlled plant, a discrete-time state-space model of the combined converter–controller closed-loop system is required. This may be found by noting that the output of the controller is the input to the converter, i.e., $y_c\left(k\right)=u_d\left(k\right)$, and that the input of the controller $u_c\left(k\right)$ is the error $e\left(k\right)=r\left(k\right)-y\left(k\right)$; hence, an augmented system-controller closed-loop discrete-time state-space formulation may be formed with a new extended state vector $x_a={\left[x_c{x}_d\right]}^T\in {\mathbb{R}}^{5\times 1}$ and corresponding matrices from (9), (13) as follows:

$$\begin{gathered} x_a\left(k+1\right)=A_a x_a\left(k\right)+B_a r\left(k\right), y_a\left(k\right)=C_a x_a\left(k\right) \\ {A}_a=\left[\begin{array}{cc}{A}_c& -B_c{C}_d\\ B_d{C}_c& A_d-B_d{D}_c{C}_d\end{array}\right] \in {\mathbb{R}}^{5\times 5}, B_a=\left[\begin{array}{c}{B}_c\\ B_d{D}_c\end{array}\right]\in {\mathbb{R}}^{5\times 1}, C_a={\left[0 C_d\right]}^T \in {\mathbb{R}}^{1\times 5} \end{gathered}$$

(14)

It is important to note that, in this formulation, the input coincides with the reference signal $r\left(k\right)$, while the output $y_a\left(k\right)$ coincides with the real output of the system, i.e., the output voltage $V_0$. The role of the reference governor is explained pictorially in Figure 3. It is a secondary controller responsible for producing a dynamically modified optimal reference signal $r\left(k\right)$ from a desired set-point signal $r_d\left(k\right)$, which is usually constant or at least slowly time-varying. The MPC reference governor is using the measured (sampled) output $y\left(k\right)$ to extract knowledge of the full state vector $x_a\left(k\right)$. There are five state variables, which are all known except the inductor current for which a specialized observer is included, as explained below in Section 4.4. The MPC scheme operates by resorting at the linear closed-loop model in (14) to predict future trajectories and generate optimal decisions for $r\left(k\right)$. This scheme can be combined either with an analogue Type III compensation circuit (Figure 2) or with a purely digital implementation, as implied by Figure 3.

One of the simplest possible and computationally tractable ideas for an MPC formulation was adopted in this work, along the same lines with relevant design in [1], which proved surprisingly effective as the simulations results reveal in the next sections. An unconstrained formulation was used, which allowed the derivation of an explicit form of the corresponding MPC control law, hence avoiding the computationally demanding on-line optimization procedures. The gains of the controller were fixed and a priori determined, and this resulted in a computationally tractable implementation, especially because it is a single-input and single-output (SISO) system with low control and prediction horizon demands. Simple constraints regarding the size or the rate of change of the controller’s signal can also be dealt with easily with the same explicit MPC formula and without compromising the optimality, as explained in the sequel.

The first observation is that our MPC reference governor controller must be equipped with an extra integrator because the controller’s decisions for $r\left(k\right)$ must converge to the desired values $r_d\left(k\right)$. The simple formulation in ([24], Chapter 1) was adopted, where an embedded integrator augmented state-space model was used for control design and optimization.

The first step was to take a difference operation on both sides of (14) to obtain the following:

$$\Delta x_a\left(k+1\right)=A_a \Delta x_a\left(k\right)+B_a \Delta r\left(k\right)$$

(15)

where the differences of the control variables and the input need to be defined as follows:

$$\Delta x_a\left(k+1\right)=x_a\left(k+1\right)-x_a\left(k\right),\Delta r\left(k+1\right)=r\left(k+1\right)-r\left(k\right)$$

(16)

A new extended state vector $x\left(k\right)\in {\mathbb{R}}^{6\times 1}$ was formed next with an embedded integrator:

$$x\left(k\right)={\left[\Delta x_{\alpha }{\left(k\right)}^T y\left(k\right)\right]}^T$$

(17)

Combining (16) and (17) yielded a new state-space model of an increase by one order given by the following equation:

$$\begin{gathered} x\left(k+1\right)=A x\left(k\right)+B \Delta r\left(k\right), y\left(k\right)=C x\left(k\right) \\ A=\left[\begin{array}{cc}{A}_a& 0_5^T\\ C_a{A}_a& 1\end{array}\right] \in {\mathbb{R}}^{6\times 6}, B=\left[\begin{array}{c}{B}_a\\ C_a{B}_a\end{array}\right]\in {\mathbb{R}}^{6\times 1}, C={\left[0_5 1\right]}^T \in {\mathbb{R}}^{1\times 6},\hspace{1em}\hspace{1em}{0}_5=\left[0,0,0,0,0\right] \end{gathered}$$

(18)

Note that the input to the new state-space model ($A,B,C$) is now $\Delta r\left(k\right)$. Assuming that, at the sampling instant $k_i>0$, the state variable vector $x(k_i)$ is available and the control horizon is $N_c$, the future control trajectory is given by the sequence $\Delta r\left(k_i\right),\Delta r\left(k_i+1\right),\cdots ,\Delta r\left(k_i+N_c-1\right)$. Moreover, for a prediction horizon (optimization window) $N_p$, the future state variables are specified as $x\left(k_i+1\right),x\left(k_i+2\right),\cdots ,x\left(k_i+N_p\right)$. The model equation in (18) can be sequentially applied to yield the future state and output variables as a function of the future control parameters (for a detailed exposition see [24]). By defining the vectors

$$\Delta R= {\left[\Delta r\left(k_i\right), \Delta r\left(k_i+1\right),\cdots ,\Delta r\left(k_i+N_c-1\right)\right]}^T, Y= {\left[y\left(k_i+1\right), y\left(k_i+2\right),\cdots ,y\left(k_i+N_p\right)\right]}^T$$

(19)

which have dimensions $N_c,N_p$ in the SISO case, respectively, all prediction equations can be collected in a compact matrix form as follows:

$$\begin{gathered} Y=F x\left(k_i\right)+\Phi \Delta R \\ F= {\left[CA, C{A}^2,C{A}^3,\cdots ,C{A}^{N_p}\right]}^T, \Phi =\left[\begin{array}{ccccc}CB& B& 0& \cdots & 0\\ CAB& CB& 0& \cdots & 0\\ C{A}^{2}B & CAB& CB& \cdots & 0\\ ⋮& ⋮& ⋮& \ddots & ⋮\\ C{A}^{N_p-1} B& C{A}^{N_p-2} B& C{A}^{N_p-3} B& \cdots & C{A}^{N_p-N_c} B\end{array}\right] \end{gathered}$$

(20)

Assuming that the setpoint signal $r_d(k_i)$ at sample time $k_i$ is constant in the optimization window, the data vector containing the setpoint data is $R_d^T=\stackrel{N_p}{\overbrace{\left[11\cdots 1\right]}}{r}_d\left(k_i\right)={\overline{R}}_d{r}_d\left(k_i\right)$, and the cost function $J$ to be minimized is the sum of two terms:

$$J={\left(R_d-Y\right)}^T\left(R_d-Y\right)+\Delta R^T\overline{R}\Delta R$$

(21)

where the first term is related to the tracking errors and the second to the size of $\Delta R$, while the weighting matrix $\overline{R}=r_w{I}_{N_c\times N_c}$ is a diagonal matrix, with $r_w\ge 0$ the main tuning parameter affecting closed-loop performance. By zeroing the first derivative of $J$, the unconstained optimal solution for the control problem is given as follows (assuming that ${\Phi }^T\Phi +\overline{R}$ is invertible):

$$\Delta R={\left({\Phi }^T\Phi +\overline{R}\right)}^{-1}{\Phi }^T\left({\overline{R}}_d{r}_d\left(k_i\right)-Fx(k_i\right))$$

(22)

Due to the receding horizon principle, only the first element $\Delta r$ of $\Delta R$ at time $k_i$ is applied:

$$\Delta r\left(k_i\right)=K_r·r_d\left(k_i\right)-K_x·x\left(k_i\right)$$

(23)

where $K_r$ is the first element of ${\left({\Phi }^T\Phi +\overline{R}\right)}^{-1}{\Phi }^T{\overline{R}}_d$, and $K_x$ is the first row of ${\left({\Phi }^T\Phi +\overline{R}\right)}^{-1}{\Phi }^{T}F$. Hence, the optimal MPC reference governor takes an explicit static state-feedback form, where the gains of the controller are fixed and can be a priori determined. This is important for a computationally tractable implementation. Moreover, as we have a SISO system, simple constraints regarding the size of $r\left(k_i\right)$ and/or the rate of change $\Delta r\left(k_i\right)$ of the reference signal can also be dealt with easily with the same explicit MPC formula and without compromising the optimality. This is explained in ([24], Chapter 3). When constraints are violated, the only action needed is to clamp the imposed $r\left(k_i\right)$ at the limit and notify the observer accordingly. These simple constraints are of the following form:

$$\Delta r_{min}\le \Delta r\left(k_i\right)\le \Delta r_{max},r_{min}\le r\left(k_i\right)\le r_{max}$$

(24)

4.4. Nonlinear Current Observer

The implementation of the MPC scheme introduced in the previous section requires knowledge of all five state variables in $x_a={\left[x_c{x}_d\right]}^T\in {\mathbb{R}}^{5\times 1}$, which include the inductor current $x_1=I_L$. To avoid the addition of an extra current sensor, an efficient current observer can be a good alternative. In [1], a general linear observer (Kalman filter) was employed. In this work, a recently proposed robust and efficient nonlinear current observer [25] was selected with very good results due to its specialized nonlinear structure as well as the high sampling frequency used. A brief description of this structure is given below; for more details, please refer to [25].

With reference to the bilinear formulation of the converter dynamics as in (7), the observer formula proposed in [25] for the estimated state vector $\widehat{x}={\left[{\widehat{x}}_1{\widehat{x}}_2\right]}^T\in {\mathbb{R}}^{2\times 1}$ based on the output estimation error ${\tilde{x}}_2={\widehat{x}}_2-x_2$ (recall that $x_2=V_0$ is the output voltage directly measured) is given by the following continuous-time equations:

$$\begin{gathered} \dot{\widehat{x}}=A \widehat{x}+F_1{\widehat{x}}_{1}u+F_2{\widehat{x}}_{2 }u+B_v+W\left(x_2,{\tilde{x}}_2\right) \\ W\left(x_2,{\tilde{x}}_2\right)=\left[\begin{array}{c}0\\ -K{\tilde{x}}_2+\eta \left(x_2,{\tilde{x}}_2\right)\end{array}\right], \eta \left(x_2,{\tilde{x}}_2\right)\equiv C^{-1}sgn\left({\tilde{x}}_2\right)\left(\rho \left|x_2\right|+a\right) \end{gathered}$$

(25)

In this formula, the value of the parameter $\rho$ is determined by the a priori assumed perturbation bounds of the unknown load $R$. The tuning parameters are $K,a$. After some experimentation with the tuning suggestions in [25], appropriate values $K=1,a={10}^{-4}$ were found for $\rho =-0.1$ (corresponding to load resistance $R$ in the designated range 10–50 Ω).

The observer was tested numerically in a discrete-time formulation using the backward difference method for approximating the derivatives in (25). The difference update equations used take a straightforward form that can be directly coded to a microprocessor in the following form:

$$\begin{gathered} {\widehat{x}}_1\left(k+1\right)={\widehat{x}}_1\left(k\right)+T·\left[-r_L{L}^{-1}{\widehat{x}}_1\left(k\right)-L^{-1}{\widehat{x}}_2\left(k\right)+L^{-1}{\widehat{x}}_2\left(k\right)u\left(k\right)+V_{IN}{L}^{-1}\right] \\ {\widehat{x}}_2\left(k+1\right)={\widehat{x}}_2\left(k\right)+T·\left[C^{-1}{\widehat{x}}_1\left(k\right)-R^{-1}{C}^{-1}{\widehat{x}}_2\left(k\right)-C^{-1}{\widehat{x}}_1\left(k\right)u\left(k\right)-K{\tilde{x}}_2\left(k\right)+\eta \left(k\right)\right] \\ \eta \left(k\right)=C^{-1}sgn\left({\tilde{x}}_2\left(k\right)\right)\left(\rho \left|x_2\left(k\right)\right|+a\right) \end{gathered}$$

(26)

5. Numerical Simulation Results

In this section, the performance enhancement achieved with the proposed MPC reference governor is presented with the help of Figure 4, Figure 5, Figure 6, Figure 7 and Figure 8. A detailed comparison with the two controllers used in [22] was made, where the distinctive features of all schemes were revealed. The simulations were performed in two environments: in Simulink with the help of the PowerSim library, which uses the exact switching model, and in MATLAB with the nonlinear averaging model in discrete-time with sampling frequency equal to the switching frequency $f_s=200$ $\mathrm{kHz}$. For such a high sampling frequency, the results obtained by both methods are very close to each other; however, the advantage of the second method is that it contains transparent code (close to microprocessor level) that runs significantly faster and also produces clearer diagrams for comparison purposes. Hence, a decision was made to present these results in the following figures.

It is noted that a lower sampling frequency is enough for a successful reference governor scheme. A frequency of $100\mathrm{kHz}$, i.e., equal to half of the main controller sampling frequency, was used for the MPC scheme when obtaining the results shown below. The specifications of the MPC reference governor scheme are given in

Table 2. MPC voltage-mode reference governor specifications.

$\mathbf{Prediction}\mathbf{Horizon}{\mathit{N}}_{\mathit{p}}$	$\mathbf{Control}\mathbf{Horizon}{\mathit{N}}_{\mathit{c}}$	$\mathbf{Control}\mathbf{Weight}{\mathit{r}}_{\mathit{w}}$	$\mathbf{Rate}\mathbf{Limits}\mathbf{\Delta }{\mathit{r}}_{\mathit{m}\mathit{a}\mathit{x}}$	Main Control Frequency	MPC Control Frequency
45	1	50	0.5	200 kHz	100 kHz

. While experimenting with different values for the control and prediction horizons, we realized that we could afford to reduce the control horizon $N_c$ to unity as long as the prediction horizon was long enough to deal with the nonminimum phase characteristic of the transient responses of the boost converter. The values $N_c=1,N_p=45$ were found suitable in order to obtain very satisfactory results.

Figure 4 compares the performance of the three controllers in four different cases covering the most important situations, i.e., startup transient, reference input changes, load perturbations, and line voltage changes. The notation used is as follows: the MPC reference governor scheme on top of the Type III controller is denoted as MPC, the combination of ROAPFPC with the Type III is called APP (ARMarkov Plus PID), while the Type III controller alone is termed as PID.

It is clear from Figure 4a,b that APP was 3–4 times faster than PID when it came to reference tracking, and it is clear from Figure 4c,d that APP was slightly worse than PID as far as disturbance rejection (load or input voltage changes) was concerned. It is also evident that the proposed strategy in this work, i.e., MPC, outperformed both APP and PID in all four situations, as depicted in Figure 4, where it appeared to be at least two times faster in terms of rise time and three times faster in terms of settling time, approximately.

The key to achieving this performance enhancement was the dynamic modification of the reference input by which the Type III controller was commanded. The command history corresponding to all four cases of Figure 4 is shown in Figure 5, where the values are normalized to unity for better illustration.

Further details of the three control laws for the first two cases (startup and reference changes) are given in Figure 6. The inductor current and duty cycle waveforms (i.e., the main control signals) reveal that the performance benefits obtained were not due to higher absolute values of currents or duty cycles or extensive use of energy but rather to a smarter use of the available energy, which was characterized by higher variability. The MPC controller appeared to act in a much more flexible manner, allowing large excursions of the control signals in a short time scale, without imposing extra operational requirements, e.g., higher inductor currents or energy consumption or excessive duty cycles. In fact, in MPC, the maximum current imposed did not increase, while the duty cycle never came close to saturation.

Further justification of this claim is provided by the simulation results depicted in Figure 7. Four different responses were obtained by imposing different rate constraints $\Delta r_{max}$ = 0.05, 0.15, 0.25, 0.5, as in (24), which restrict the flexibility of the dynamically modified reference governor signals. Although there was little effect when considering perturbations around the nominal working point, it was obvious that, during the startup, they played a crucial role in the performance enhancement that may be achieved. Nevertheless, it was clear that in all cases the MPC controller inevitably did a good job, at least within the imposed constraints envelope.

Finally, a last test was performed to assess the proper MPC operation; a set of different weighting factor values $r_w$ (50, 250, 500, 1000) were used, and the comparative results are shown in Figure 8. The controller behaved exactly as expected, i.e., larger $r_w$ values gave rise to more sluggish responses, which also exhibited increased overshoot. The values $r_w$ = 50, $\Delta r_{max}$ = 0.5 were the ones selected for the nice results shown in Figure 4, Figure 5 and Figure 6. The explicit MPC gains in (21) are given next:

$$K_r=0.1737, K_x={\left[\begin{array}{cccccc}0.0001535& -0.064& -0.0847& 1.2691& 5.3893& 0.1737\end{array}\right]}^T$$

(27)

6. MPC Reference Governor Design for a Two-Loop Current-Mode-Controlled Converter

The developments in the previous sections considered a voltage mode control (VMC) structure, which consists of a single loop for output voltage regulation. This simplifies the control structure because the use of a current sensor is avoided, but it requires a more complicated controller (Type III). The alternative for simplifying the converter’s dynamics and the controller form is to adopt the so-called current mode control (CMC) structure, which takes a two-loop cascaded form, resulting in an indirect linear control approach in the analog [26] or the digital domain [27]. The main advantage is that the current/voltage dynamics may be separated, and simple PI controllers for each loop may be designed using trivial pole placement procedures, which simplifies the control task while also ensuring faster transient response. The shortcoming is the need for a current sensor. The cascaded two-loop scheme used for analog design [26] is shown in Figure 9.

An averaged current-mode structure is followed, which involves the design of two nested control loops with a current (inner loop) controller $C_i\left(s\right)$ and a voltage (outer loop) controller $C_v\left(s\right)$. The transfer functions $G_i\left(s\right)=\frac{I_L\left(s\right)}{U\left(s\right)}, G_v\left(s\right)=\frac{V_C\left(s\right)}{U\left(s\right)}$ are given based on the linearization of (8) as follows:

$$\begin{gathered} G_i\left(s\right)=\frac{u_e^{\prime }{x}_{1e}+x_{2e}/R}{r_L/R+u_e^{\prime 2}} \frac{C{x}_{2e}/\left(u_e^{\prime }{x}_{1e}+x_{2e}/R\right) s+1 }{\frac{LC}{r_L/R+u_e^{\prime 2}} s^2+\frac{L/R+r_{L}C}{r_L/R+u_e^{\prime 2}}s+1} \\ {G}_v\left(s\right)=\frac{u_e^{\prime }{x}_{2e}-x_{1e}{r}_L}{r_L/R+u_e^{\prime 2}} \frac{-L/\left(u_e^{\prime }{x}_{2e}/x_{1e}-r_L\right) s+1 }{\frac{LC}{r_L/R+u_e^{\prime 2}} s^2+\frac{L/R+r_{L}C}{r_L/R+u_e^{\prime 2}}s+1} \end{gathered}$$

(28)

where $u_e^{\prime }=1-u_e$ and the presence of a right-half plane zero in $G_v\left(s\right)$ (which is not affected by the control law) dictates the design procedure. For dynamics separation between the two loops, the inner loop’s bandwidth must not be placed near this zero; otherwise, the designed performance cannot be guaranteed. The desirable dynamic performance of the faster inner loop is imposed first by appropriate pole placement on the basis of certain bandwidth and damping features. The control design of the outer loop follows after closing the inner loop and designing the slower outer loop to be at least 5 times slower than the inner closed loop [26]. Trivial PI controllers are sufficient for both designs, where a simple root locus procedure can be used to establish the dominant pole’s position.

6.1. Two-Loop PI Controller State-Space Form

Again, we adopt the backward different method for which a PI control law $C_{PI}\left(s\right)=K_p+K_i/s$ with gains $K_p,K_i$ is approximated in dicrete-time by $C_{PI}\left(z\right)=\frac{(K_p+K_{i}T)z-K_p}{z-1}$. This is a first-order equation admitting a simple state-space formulation. For the two PI control laws in Figure 9, by assuming gains $K_{p1},K_{i1}$ for the inner law $C_i\left(z\right)$, gains $K_{p2},K_{i2}$ for the outer law $C_v\left(z\right)$, and by defining corresponding state (integrator) variables $x_i,x_v$, and a controller state variable vector $x_c={[x_i,x_v]}^T\in {\mathbb{R}}^{2\times 1}$, new state equations are obtained:

$$\begin{gathered} x_i\left(k+1\right)=x_i\left(k\right)+u_i\left(k\right), y_i\left(k\right)=K_{I1 }{x}_i\left(k\right)+K_{PI1} u_i\left(k\right) \\ {x}_v\left(k+1\right)=x_v\left(k\right)+u_v\left(k\right), y_v\left(k\right)=K_{I2} x_i\left(k\right)+K_{PI2} u_i\left(k\right) \end{gathered}$$

(29)

where the inputs $u_i,u_v$ and the outputs $y_i,y_v$ of the PI blocks in Figure 8 are specified as follows:

$$u_i=e_i=i_{ref}-i_L=i_{ref}-y_v,u_v=e_v=V_{ref}-V_C,y_i=u,y_v=i_{ref}$$

(30)

and the new gains are defined as $K_{I1}=K_{i1}T,K_{I2}=K_{i2}T,K_{PI1}$ = $K_{p1}+K_{i1}T$, $K_{PI2}$ = $K_{p2}+K_{i2}T$.

6.2. Current-Mode Reference Governor MPC Formulation

Similarly to Section 4.3, for an MPC reference governor an augmented system-controller closed-loop discrete-time state-space formulation is formed with a new extended state vector $x_a={\left[x_c{x}_d\right]}^T\in {\mathbb{R}}^{4\times 1}$ and corresponding matrices from (9) and (29) as follows:

$$\begin{gathered} x_a\left(k+1\right)=A_a x_a\left(k\right)+B_a r\left(k\right), y_a\left(k\right)=C_a x_a\left(k\right) \\ {A}_a=\left[\begin{array}{c} \begin{array}{ccc} -1 & -K_{PI2}& \begin{array}{cc} 1& K_{I2}\end{array}\end{array}\\ \begin{array}{ccc} 0& -1& \begin{array}{cc} 0& 1\end{array}\end{array}\\ \begin{array}{ccc}{A}_{d1}-K_{PI1}{B}_d& A_{d2}-K_{PI}{B}_d& \begin{array}{cc}{K}_{I1}{B}_d& K_{PI1}{K}_{I2}{B}_d\end{array}\end{array}\end{array}\right], B_a=\left[\begin{array}{c}{K}_{PI2}\\ 1\\ K_{PI} B_d\end{array}\right], C_a={\left[0 C_d\right]}^T \end{gathered}$$

(31)

where ${\mathit{K}}_{\mathit{P}\mathit{I}}={\mathit{K}}_{\mathit{P}\mathit{I}\mathit{1}} {\mathit{K}}_{\mathit{P}\mathit{I}\mathbf{2}}$ and ${\mathit{A}}_{\mathit{d}\mathbf{1}}, {\mathit{A}}_{\mathit{d}\mathbf{2}}$ are the two columns of ${\mathit{A}}_{\mathit{d}}$ in (9). This result can be obtained after simple algebraic manipulations by noting that the controller/converter connection is established by the relations ${\mathit{u}}_{\mathit{v}}=\mathit{r}-{\mathit{x}}_{\mathit{d}} \left(\mathbf{2}\right), {\mathit{y}}_{\mathit{i}}=\mathit{u}$. Compared to the voltage-mode-controlled system (14), it is noted that the current-mode-controlled one is lower order due to the simpler second-order controller (two PI controllers) as opposed to the third-order controller of the Type III scheme.

6.3. Numerical Simulation Results

Following the guidelines of the previous sections, two different current-mode designs were performed, with the specifications given in

Table 3. Two-loop PI current-mode control designs and specs.

Design	${\mathit{K}}_{\mathit{p}1}$	${\mathit{K}}_{\mathit{i}1}$	${\mathit{K}}_{\mathit{p}2}$	${\mathit{K}}_{\mathit{i}2}$	${\mathit{T}}_{\mathit{s}}\left(\mathbf{ms}\right)$	$\mathit{\zeta }$
PI 1	0.025	126	0.84	922	3	0.7
PI 2	0.046	357	1.4	1448	1	0.7

. The first design (PI 1) had smaller bandwidth (settling time $T_s$ of 3 ms) and notably smaller gains compared to the second (PI 2). The transient responses of these two-loop PI current-mode designs with the APP (PID + ROAPC) design of Section 3 are compared in all possible situations in Figure 10.

Figure 10a,b confirms the reference tracking of superior performance of the current-mode control, while Figure 10c,d shows its inferior disturbance rejection properties. This is expected as current-mode control exploits the faster current dynamics in the inner loop, while PID control offers better disturbance rejection. Using higher gains, as in PI 2, offers some improvements; however, it also results in a startup transient with unacceptably high overshoot, which requires some form of soft-start procedure. Can a reference governor scheme offer any remedies to these situations? This question is answered with the results shown in Figure 11 for the PI 2 design. The disturbance rejection was drastically improved, while the reference tracking problem in the startup was tackled. The MPC current-mode reference governor specifications for obtaining the results of Figure 11 are listed in

Table 4. MPC current-mode reference governor specifications.

$\mathbf{Prediction}\mathbf{Horizon}{\mathit{N}}_{\mathit{p}}$	$\mathbf{Control}\mathbf{Horizon}{\mathit{N}}_{\mathit{c}}$	$\mathbf{Control}\mathbf{Weight}{\mathit{r}}_{\mathit{w}}$	$\mathbf{Rate}\mathbf{Limits}\Delta {\mathit{r}}_{\mathit{m}\mathit{a}\mathit{x}}$	Main Control Frequency	MPC Control Frequency
100	1	200	0.5	200 KHz	100 KHz

.

Finally, this MPC current-mode reference governor (CM RG) design was compared with the corresponding voltage-mode reference governor (VM RG) design of Section 5, in Figure 12. The two designs had comparable reference tracking capabilities, while VM RG had better disturbance rejection properties. This was attributed to the PID Type III controller around which the VM RG was designed and the important fact that the relatively inferior reference tracking properties of the PID Type III controller were cured using a VM RG. All in all, the merits of combining an optimal MPC RG scheme in voltage-mode with a typical PID Type III controller have become obvious. The best results in terms of reference tracking and disturbance rejection were obtained without the need to resort to a current-mode two-loop policy, which is also less efficient with disturbance rejection.

7. Conclusions

This article presents one of the first attempts in the literature to apply reference governor ideas to the power electronics field for obtaining performance enhancements without replacing the main controller, which may be worth keeping for a cheap and/or safe modern implementation. Assuming that a digital microprocessor can be integrated into the existing control circuit, a secondary controller in the form of a reference governor that dynamically modifies the set-point of the primary controller may be a good idea, provided the implementation cost and complexity are kept low.

More specifically, this research considered the problem of enhancing the performance of boost DC–DC converters that are precompensated in voltage-mode or current-mode by a typical primary controller such as a Type III (or a double PI for current-mode), which is a standard industrial practice. A secondary controller–prefilter in the form of a reference governor was systematically designed, which operates by introducing dynamic adjustments to the imposed voltage reference input signal. It was shown that such a scheme, designed optimally via a simple linear MPC methodology, can enhance the performance in a wide operating range without imposing extra requirements or limitations. Clear improvements compared to recently reported results in the literature were found. It is noteworthy that even for such a highly nonlinear (bilinear) and nonminimum phase system like a boost converter, the shortcomings of a linear controller like PID, which is designed with a linear model for a particular operating point, can be dealt with by complementing it with a relatively simple linear unconstrained MPC scheme that takes a simple explicit form.

It is quite common to use current-mode two-loop controllers for nonminimum phase boost converters as they offer some advantages. Our simulation results revealed that the voltage-mode MPC RGs outperformed the current-mode designs, especially in disturbance rejection situations. Current-mode MPC RGs were also tested, which offered some improvements; however, voltage-mode MPC RGs combined with PID Type III primary controllers delivered the best results while also avoiding the use of a current sensor.

Of course, these advancements come at a price. The proposed controller is more complicated as it is expressed in a state-space form, and it requires extra knowledge of the inductor current and a digital microprocessor implementation. However, the computational demands of the proposed scheme are light enough and can be addressed with a modern cheap microprocessor. Moreover, placing an inductor current sensor is not necessary as reliable nonlinear observers for bilinear systems are available.

A light MPC algorithm with short horizons and trivial constraints, allowing an explicit solution through unconstrained optimization, was proven to be sufficient enough for our main purpose in the present work. These first positive results pave the way for further research with a reference governor flavor in the area of power electronics, e.g., in more complicated converter topologies or using more advanced techniques. Only few possibilities offered by MPC technology were explored in this research. There is a multitude of methods in the literature that are worth testing, including many more sophisticated constrained linear or nonlinear MPC schemes. The vast literature in MPC techniques, as well as the various optimal reference governor ideas developed thus far, imply that many other constrained optimization methodologies are available to be explored for future improvements.