Analysis of Non-Isolated Multi-Port Single Ended Primary Inductor Converter for Standalone Applications

Abstract

A non-isolated Multiport Single Ended Primary Inductor Converter (SEPIC) for coordinating photovoltaic sources is developed in this paper. The proposed multiport converter topologies comprise a Single Input Multi yield (SIMO) and Multi Input Multi Output (MIMO). It is having the merits of decreased number of parts and high power density. Steady state analysis verifies the improved situation of both the proposed topologies, which is further checked through simulation results.

1. Introduction

Sustainable power sources are of potential interest these days to supplant the conventional fossil fuel power generation. Future power systems will require interfacing of different power sources. To empower multi-source innovation, a multi-input control converter (MIPC) is of practical use. The multi-input control supply could accommodate an assortment of sources and consolidate their features. With numerous data sources, the power source provides unwavering quality and effectively uses power sources. A multi-input control converter (MIPC) contains different sources fed through separate converters as shown in Figure 1. The MIPC structure incorporates a few drawbacks, for example, it requires a different converter for each source which makes the structure complicated and control techniques difficult. As a result of this reason the usage exertion of MIPC is high.

To overcome these challenges in MIPC, multiport converters (MPCs) are of potential interest for applications, for example, the aging grids using numerous sustainable power sources. In MPCs, different sources are fed to the load through a single power electronics converter as shown in Figure 2. MPC leads to a reduction of the unpredictability of the structure and the control procedure. Different kinds of MPC under DC-DC buck-boost topology have been considered, and limitations of MPC have also been figured out [1,2,3,4].

Second, voltage sagging is a fundamental feature in the majority of their new sources, which imposes unnecessary requests and unpredictability to converter designs [5]. Third, very dangerously high electrostatic potentials are frequently introduced to the sources [6,7]. In this manner, parallel-associated topologies have been generally well known [8,9]. Based on coupling, isolated MPCs are typically derived by combining various converters via magnetic coupling such as utilizing multi-winding transformers [10,11], Disconnection and bidirectional abilities of the considerable number of ports can be accomplished in these topologies [12,13]. These MPCs are valuable for the applications where detachment and bidirectional change are essential. However, the real issue is that an excessive number of dynamic switches are available, and the utilization of transformers makes the structure massive [14,15]. The non-isolated structure does not utilize a transformer which makes for an economical and simpler structure [16,17,18,19,20].

The method of developing dual or multi input converters from single input converters was not explained in [21,22]. In [23] the concepts of Pulsating Voltage Source Cell (PVSC) and the Pulsating Voltage Load Cell (PVLC) have been introduced. These PVSC and PVLC are extracted from the basic non-isolated converters like buck, boost, buck- boost, Cuk, zeta, and SEPIC converters. In [24] they used as the single input multi output but no storage device. In this proposed system a non-isolated SEPIC converter is used as the PVSC as well as PVLC with the storage device. Since sustainable power sources are irregular in nature, the use of device capacity is necessary for reliability aspects [25]. A classification of the various multiport converters is given in Figure 3.

In unidirectional MPCs, the arrangement for associating storage device is not available, so this structure is less reliable compared with bidirectional MPC. Bidirectional MPC’s contains bidirectional ports which can use for associating storage devices. In this paper, the proposed structure is a parallel connected non-isolated SEPIC/SEPIC bidirectional MPC.

2. SEPIC Converter

DC-DC converters are most prevalently known for their ability to increase or decrease the magnitude of the dc input voltage and furthermore rearrange its polarity [26]. A dc-dc converter works by quickly turning on and off a power electronics switch. A buck-boost, Cuk and SEPIC converter can increase or decrease the output voltage more than the input voltage. In Cuk and SEPIC converters the information current is consistent, unlike in a buck-boost converter, which leads to an advantage of a better power factor. Another advantage of SEPIC converters is that they have non-inverting output unlike in a Cuk converter or buck-boost converter [27]. Also in a SEPIC converter, a series capacitor is used to transfer energy from the input to the output and thus it can respond more smoothly to a short circuit output, being capable of a true shutdown. When the switch is turned off, its output drops to 0 V. The circuit diagram of a SEPIC converter is shown in Figure 4.

In a SEPIC converter, when the pulse is high, the switch S is on, the input voltage charges the inductor L₁, and the capacitor C₁ charges the inductor L₂. The diode D is reverse biased, and the capacitor C₂ maintains the output. When the pulse is low, the switch S is off, the inductors discharge through the diode to the load, and charges the capacitors. The greater the percentage of time (duty cycle) is, the wider the pulse is, and more the output will be, because the longer the inductors charge, the greater their voltage will be.

We assume a SEPIC converter has the small magnitude of switching ripples compared to its respective dc components and that without losses. The link between input and output voltage can be obtained both in continuous current mode (CCM) and in discontinuous current mode (DCM) [4]. CCM is preferable for high efficiency and better utilization of passive components and the converter switches. Converters in both categories provide the same conversion relation given by (1) and (2):

$${\mathrm{V}}_0\left(\mathrm{CCM}\right)=\mathrm{V}\frac{\mathrm{D}}{1-\mathrm{D}}$$

(1)

$${\mathrm{V}}_0\left(\mathrm{DCM}\right)=\mathrm{DV}\sqrt{\frac{{\mathrm{RT}}_{\mathrm{s}}}{2{\mathrm{L}}_{\mathrm{eq}}}}$$

(2)

2.1. Proposed Configuration Description

In this paper, a three port (two inputs and one output) SEPIC/SEPIC converter is proposed as shown in Figure 5. The proposed structure is the combination of pulsating voltage cells (PVC’s). PVC’s can be of two types. For input side a pulsating voltage source cell (PVSC) is used and for the output side, a pulsating voltage load cell (PVLC). Each PVSC connects with a common PVLC (as it’s a MISO structure) through a coupling capacitor forming a complete SEPIC structure. A generalized structure of the proposed circuit shown in Figure 6 indicates that the number of ports can increase/decrease further by connecting/disconnecting the additional PVC’s depending on availability of sources [11,14].

2.2. Single Input Multi output SEPIC Converter

Table 1. Comparison table of components of MPC and MIPC SEPIC.

Components	Multiport Converter	(n) Individual SEPIC Converters
Capacitors	n	2(n − 1)
Inductors	2	2(n − 1)
Switches	n	n − 1
Diodes	0	n − 1

shows the comparison of components used in proposed n’port SEPIC MPC and conventional MIPC. Here “n” port refers to (n − 1) number of sources and one output port or one sources and (n − 1) number of output ports [28].

In the topology, if both the sources are renewable dc sources, for example solar (PV), the converter works as a unidirectional converter as the energy flows from source to load. The switch S1 is provided with a definite duty cycle and is triggered at one time. As the one source is PV it works as a partially unidirectional converter. The reason for becoming particularly unidirectional is that we have a single voltage source. The output power of two loads is varied by varying the duty cycles of the switches. The output can be increased or decreased by varying the duty cycles of the switch S1 with respect to the input voltage. Considering voltage source (PV) having a value of voltage V1. In order to use the source effectively, the source is operated at different duty cycles. The source is operated with higher duty cycle for higher output and for lower duty cycle for lesser value. Assume the input voltage V₁, output voltage to be V₂ and V₃,then D₁, D₂ & D₃ are the respective duty cycles of switch S1, S2 & S3 (PVSC, PVLC1 & PVLC2).

2.3. Modes of Operation

The operation is categorized in three modes as shown in Figure 7.

2.3.1. Mode-1: S1 is ON (S1 Conducts) and S2 & S3 are OFF

The equivalent circuit of Mode-1 is shown in Figure 8. In this mode, the input side switch is on and the other switches are turned off. The inductor is charged and the capacitor C₁ is pre-charged and it charges the inductor L. We assume that the capacitor is pre-charged and supplies to the loads. The voltage source provided charges the inductor L₁.

2.3.2. Mode-2: S1 OFF and S2 and S3 are ON

The equivalent circuit of Mode-2 is shown in Figure 9. Once the switch S1 is turned on, the switches S2 and S3 are turned off. Now the capacitor C₁ is charged and as the inductors L₁ and common inductor L being charged initially supply current to the load. Now capacitors C₂ and C₃ are charged.

2.3.3. Mode-3: S1 and S2 OFF & S3 Conduct

The equivalent circuit of Mode-3 is shown in Figure 10. The switch S1 and S2 are off and S3 is turned on. The inductors L₁ & L₂ supply the current to the load V₃ and the capacitor C₂ supplies the load V₂.

2.4. Steady State Analysis of a Single Input Multi Output SEPIC

The three modes of operations are considered to be in CCM and assuming the ripple voltage and ripple current as negligible. The steady state equations of topology-1 are as follows, the steady state equations of each mode are described below:

$$\mathrm{L}\frac{{\mathrm{di}}_{{\mathrm{L}}_1}}{\mathrm{dt}}=({\mathrm{V}}_{{\mathrm{C}}_1}{\mathrm{D}}_1-{\mathrm{V}}_{{\mathrm{C}}_3}{\mathrm{D}}_{\mathrm{eff}})$$

(3)

$${\mathrm{C}}_1\frac{{\mathrm{dV}}_{{\mathrm{c}}_1}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}}{\mathrm{D}}_1+{\mathrm{i}}_{{\mathrm{L}}_1}\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}}\right)$$

(4)

$${\mathrm{C}}_2\frac{{\mathrm{dV}}_{{\mathrm{C}}_2}}{\mathrm{dt}}=\frac{-{\mathrm{V}}_2}{{\mathrm{R}}_1}({\mathrm{D}}_1+{\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}})+{\mathrm{i}}_{{\mathrm{L}}_1}{\mathrm{D}}_2+{\mathrm{i}}_{\mathrm{L}}{\mathrm{D}}_2$$

(5)

$${\mathrm{C}}_3\frac{{\mathrm{dV}}_{{\mathrm{C}}_2}}{\mathrm{dt}}=\frac{{\mathrm{V}}_3}{{\mathrm{R}}_2}({\mathrm{D}}_1+{\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}})+{\mathrm{i}}_{{\mathrm{L}}_1}({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}})+{\mathrm{i}}_{\mathrm{L}}({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}})$$

(6)

At the state assuming:

$$\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}=0\mathrm{And}{\mathrm{V}}_{{\mathrm{C}}_2}={\mathrm{V}}_2;{\mathrm{V}}_2;{\mathrm{V}}_{{\mathrm{C}}_3}={\mathrm{V}}_3;{\mathrm{V}}_{{\mathrm{C}}_1}={\mathrm{V}}_1$$

(7)

From Equation (7):

$${\mathrm{V}}_1=\frac{{\mathrm{D}}_1}{1-{\mathrm{D}}_1}{\mathrm{V}}_1$$

(8)

$${\mathrm{V}}_2\left[\frac{{\mathrm{D}}_1}{{\mathrm{D}}_2}\left[\frac{1-{\mathrm{D}}_1-{\mathrm{D}}_{\mathrm{eff}}}{1-{\mathrm{D}}_1}\right]{\mathrm{V}}_1\right]$$

(9)

On solving the steady state Equations (7) to (9) considering the left hand side as zero, the six state variables can be derived (i_L1 I_L12, i_L, ${\mathrm{V}}_{{\mathrm{C}}_1}$ and ${\mathrm{V}}_{{\mathrm{C}}_2}$).

2.5. Small Signal Approximation model of Single Input Multi output SEPIC Converter

In this section, the expressions for all the circuit parameters are described. Following the individual mode equations from Equations (3) to (7), the expressions of L₁, L₂, L, C₁, C₂ and C with respect to current and voltage ripples is described below. Considering three modes (i.e., D₁, D₂ and D_eff) operating for periods t₁, t₂ and t₃, respectively:

$${\mathrm{t}}_{{\mathrm{A}}_1}={\mathrm{D}}_1\mathrm{T},{\mathrm{t}}_2={\mathrm{D}}_2\mathrm{T},{\mathrm{t}}_3={\mathrm{D}}_{\mathrm{eff}}\mathrm{T}$$

(10)

In mode-1 the inductor current increases from a low level to high level, say I_L11 to I_L12 and in second and third mode, the current falls from I_L12 to I_L11, so the current ripple is considered to be Δ I_L1 = I_L12 − I_L11:

Therefore:

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{{\mathrm{L}}_1}}{\mathrm{dt}}={\mathrm{V}}_1$$

(11)

$${\mathrm{L}}_1\frac{\mathrm{i}{\Delta }_{{\mathrm{L}}_1}}{\mathrm{dt}}={\mathrm{V}}_1$$

(12)

t₁, t₂ and t₃ can be written as D₁ T, D₂ T and D_eff T, respectively, where, T is the total time period. Similarly, the voltage ripples can be calculated from the mode equations. The voltage across C₁ rises (assuming linearly) from a low value to a high value, say V₁₁ to V₁₂ during the time t₂ and t₃. This gives a voltage ripple ΔV_C1 = V_C12 – V_C11. In this period the capacitor charges by the source current of V₁, i.e., I₁ = i_L1:

$$\Delta {\mathrm{V}}_{{\mathrm{C}}_1}=\frac{{\mathrm{I}}_1}{{\mathrm{C}}_1}\left({\mathrm{tD}}_2+{\mathrm{tD}}_{\mathrm{eff}}\right)$$

(13)

$${\mathrm{C}}_1=\frac{{\mathrm{I}}_1}{\mathrm{f}\Delta {\mathrm{V}}_{{\mathrm{C}}_1}}\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}}\right)$$

(14)

The capacitor C₂ discharges in period t₁ and t₃, i.e., this gives a voltage ripple:

$$\Delta {\mathrm{V}}_{{\mathrm{C}}_2}={\mathrm{V}}_{{\mathrm{C}}_{22}}-{\mathrm{V}}_{{\mathrm{C}}_{21}}$$

(15)

$$\Delta {\mathrm{V}}_{{\mathrm{C}}_2}=\frac{{\mathrm{V}}_2}{{\mathrm{fR}}_1{\mathrm{C}}_2}\left({\mathrm{D}}_1+{\mathrm{D}}_{\mathrm{eff}}\right)$$

(16)

The output side capacitor C₃ discharges within the period t₁ and provides the load current. The voltage ripple can be written as ΔV_C3 = V_C32 − V_C31

$$\Delta {\mathrm{V}}_{{\mathrm{C}}_3}=\frac{{\mathrm{V}}_2}{{\mathrm{fR}}_2{\mathrm{C}}_3}\left({\mathrm{D}}_1\right)$$

(17)

So, the circuit parameters can be derived from Equations (13) to (16):

$${\mathrm{L}}_1=\frac{{\mathrm{V}}_1{\mathrm{D}}_1}{\mathrm{f}\Delta {\mathrm{I}}_{{\mathrm{L}}_1}}$$

(18)

$${\mathrm{C}}_1=\frac{{\mathrm{I}}_1{\mathrm{D}}_{\mathrm{eff}}}{\mathrm{f}\Delta {\mathrm{C}}_{{\mathrm{C}}_1}}$$

(19)

$$\mathrm{L}=\frac{{\mathrm{V}}_2\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}}\right)}{\mathrm{f}\Delta {\mathrm{I}}_{\mathrm{L}}}$$

(20)

$${\mathrm{C}}_2=\frac{{\mathrm{V}}_2\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}}\right)}{\mathrm{f}\Delta {\mathrm{V}}_{{\mathrm{C}}_2}{\mathrm{R}}_1}$$

(21)

$$\mathrm{L}=\frac{{\mathrm{V}}_3\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{eff}}\right)}{\mathrm{f}\Delta {\mathrm{I}}_{\mathrm{L}}}$$

(22)

$${\mathrm{C}}_3=\frac{{\mathrm{V}}_3\left({\mathrm{D}}_1\right)}{\mathrm{f}\Delta {\mathrm{V}}_{{\mathrm{C}}_3}{\mathrm{R}}_2}$$

(23)

V₁ = 25 V, D₁ = 60%, D₂ = 30%, D_eff = 10%.

$$\Delta {\mathrm{I}}_{{\mathrm{L}}_1}=0.5,\Delta {\mathrm{I}}_{\mathrm{L}}=0.5\Delta {\mathrm{I}}_{{\mathrm{C}}_1}=0.5,\Delta {\mathrm{V}}_{{\mathrm{C}}_2}=0.5,\Delta {\mathrm{V}}_{{\mathrm{C}}_3}=0.5$$

Allowed ripples and calculated values of the components are:

• L₁ = 3 mH, C₁ = 416 µf,
• L = 3.08 mH, C₂ = 539 µf,
• L = 3.08 mH, C₃ = 462 µf

Estimated ripples from simulation are:

$$\Delta {\mathrm{I}}_{{\mathrm{L}}_1}=0.55,\Delta {\mathrm{I}}_{\mathrm{L}}=0.45$$

3. Multi Input Multi Output SEPIC Converter

In the proposed topology both of the input sources used is PV. The converter works as a unidirectional one where power flows from source to load only. The comparisons of components are listed in

Table 2. Comparisons of the components in conventional MPC and the proposed SEPIC/SEPIC MPC.

Components	n Port SEPIC/SEPIC Converter	(n − 2) Individual SEPIC Converter
Capacitors	N	2(n − 2)
Inductors	N	2(n − 2)
Switches	n – 2	n − 2

. The loads used in the circuit are a DC motor and a lamp load. The inputs are connected in parallel and even the outputs are parallelly connected. To use both the sources effectively [7,8], the duty cycles for both the sources should be different. The greater the duty cycle, the lower is the pulse and the output obtained is greater. This is due to the fact that the longer the inductors are charged, the greater the voltage will be. The loads are connected across the capacitors C₃ and C₄. Therefore, the voltage across the respective capacitors is the same as the load voltage for both the loads are explained in Figure 11.

3.1. Unidirectional Power Flow

Two separate sources (both photovoltaic cells) having same power ratings have been considered. To use both the sources effectively, the two sources operate at different duty cycles. The source having the higher value of voltage operates for lower duty cycle whereas the source having the lower value of voltage operates for higher duty cycle.

Assuming V₁ as the voltage value for the first source and V₂ as the voltage value for the second source; D₁ and D₂ are the duty cycles for PVSC1 and PVSC2 respectively. If the voltage value of source 1 is greater than that of source 2, then the duty cycle of source 2 is greater than that of source 1. The operation can be categorized into four modes. The duty cycles for different modes is shown in the Figure 12. D₁, D₂, D₃ and D₄ are the duty cycles for different modes of operation of the circuit.

Here, D_eff = D₁ − D₂ and D_D = D₄ − D₃. Each input source is connected in parallel through a power semiconductor switch and shares a common inductor (L). Only unidirectional power flow from the sources to inductor is allowed in this configuration. Power flow from each source i.e., source 1 and source 2, to load is controlled by operating switches S₁ and S₂ with different duty ratios for the same switching frequency. Hence, it results in four modes of operation of the converter. The modes with their respective duty cycle are explained below in

Table 3. Modes of Operation.

MODES	ON	OFF
Mode A	S1	S2, S3, S4
Mode B	S2	S1, S3, S4
Mode C	S3, S4	S1, S2
Mode D	S4	S1, S2, S3

.

3.1.1. Mode A: S₁ and S₂ ON but only S₁ conducts, S₃ and S₄ is OFF

The equivalent circuit of mode A is shown in the Figure 13. In this mode, the switches S₁ and S₂ are ON. As S₂ is reverse biased only switch S₁ conducts. In steady state, voltages on the input capacitors C₁ and C₂ are V₁ and V₂ respectively. Since V₁ value is greater than V₂, S₂ blocks the possibility of flow of inverse current through the second input leg. Since S₂ is reverse biased it does not conduct and the load is sustained by the output capacitors C₃ and C₄. The inductor L charges during this mode of operation. Also, the capacitors C₃ and C₄ on the load side discharge.

3.1.2. Mode B: S₁ OFF and S₂ ON, S₃ and S₄ is OFF

Once the switch S₁ is OFF, the switch S₂ gets forward biased and starts conducting since the duty cycle of S₂ is greater than that of S₂.The load current is maintained by the capacitors on the output side. The inductor L is charged during this mode by the discharge of the capacitor C₂. The capacitors C₃ and C₄ discharges and the output voltages are obtained across them. The inductor L is charged during both mode A and mode B through the discharge of the capacitors C₁ and C₂, respectively shown in Figure 14.

3.1.3. Mode C: S₁ OFF and S₂ OFF, S₃ and S₄ is OFF

The equivalent circuit of mode C is shown in Figure 15. Both the switches S₁ and S₂ are in OFF state while the switches S₃ and S₄ conduct. The load is now supplied by both the sources V₁ and V₂ through the input sides inductors and capacitors. During the mode 3, the capacitors C₃ and C₄ on the load side charges through the discharge of the inductor L in the circuit.

3.1.4. Mode D: S₁ OFF and S₂ OFF, S₃ is OFF and S₄ is ON

The equivalent circuit of mode D is shown in Figure 16. Both the switches S₁ and S₂ are in OFF. Also the switch S₃ is OFF and S₄ is ON. The duty cycle for mode D is D_D where D_D = D₄ − D₃. In this mode of operation, the load side capacitor C₃ discharges as the switch S₃ is open. Also, the inductor L discharges while the capacitor C₄ on the load side charges.

3.2. Steady State Analysis of Multi Input Multi Output SEPIC Converter

The steady state equations of the proposed topology can be derived:

$${\mathrm{V}}_{01}{\mathrm{D}}_3+{\mathrm{V}}_{02}\left({\mathrm{D}}_3+{\mathrm{D}}_4\right)={\mathrm{V}}_1{\mathrm{D}}_1+{\mathrm{V}}_2{\mathrm{D}}_2$$

(24)

Steady state average conditions:

$$\frac{\mathrm{diL}}{\mathrm{dt}}=0$$

(25)

$${\mathrm{V}}_{{\mathrm{c}}_1}={\mathrm{V}}_1,{\mathrm{V}}_{{\mathrm{c}}_2}={\mathrm{V}}_2,{\mathrm{V}}_{{\mathrm{c}}_3}={\mathrm{V}}_{01},{\mathrm{V}}_{42}={\mathrm{V}}_{02}$$

(26)

Using the above steady state average conditions in the equations (from (24) to (26)), we have:

$${\mathrm{V}}_{{\mathrm{c}}_1}{\mathrm{D}}_1+{\mathrm{V}}_2{\mathrm{D}}_{\mathrm{eff}}={\mathrm{V}}_{{\mathrm{c}}_4}{\mathrm{D}}_{\mathrm{D}}$$

(27)

The above equations represent the output voltage equations for the first and second load, respectively.

3.3. Small Ripple Approximation of Multi Input Multi Output SEPIC Converter

Following the individual mode equations from (28) to (34), the expressions of L₁, L₂, L, C₁, C₂ and C with respect to current and voltage ripples is described below. Considering three modes i.e., D₁, D_eff, D₃ and D_D operating for T₁, T₂, T₃ and T₄ periods respectively.T₁, T₂, T₃ and T₄ can be written as D₁ T, D_eff T, D₃ T and D_D T, respectively, where, T is the total time period.

Therefore, the voltage ripples can similarly be calculated from the mode equations. The voltage across C₁ rises (assuming linearly) from a low value to a high value, say V₁₁ to V₁₂ during the time T₂, T₃ and T₄.Therefore, the circuit parameters are:

$${\mathrm{L}}_1=\frac{{\mathrm{V}}_1{\mathrm{D}}_1}{\mathrm{f}\Delta {\mathrm{i}}_{{\mathrm{L}}_1}}$$

(28)

$${\mathrm{L}}_2=\frac{{\mathrm{V}}_2{\mathrm{D}}_2}{\mathrm{f}\Delta {\mathrm{i}}_{{\mathrm{L}}_2}}$$

(29)

$$\mathrm{L}=\frac{{\mathrm{VC}}_3}{\mathrm{f}\Delta {\mathrm{i}}_{\mathrm{L}}}\left({\mathrm{D}}_3\right)$$

(30)

$${\mathrm{C}}_1=\frac{{\mathrm{I}}_1}{\mathrm{f}\Delta {\mathrm{VC}}_1}\left(1-{\mathrm{D}}_1\right)$$

(31)

$${\mathrm{C}}_2=\frac{{\mathrm{I}}_2}{\mathrm{f}\Delta {\mathrm{VC}}_2}\left({\mathrm{D}}_1+{\mathrm{D}}_4\right)$$

(32)

$${\mathrm{C}}_3=\frac{{\mathrm{VC}}_3}{\mathrm{fR}\Delta {\mathrm{VC}}_3}\left({\mathrm{D}}_2+{\mathrm{D}}_{\mathrm{D}}\right)$$

(33)

$${\mathrm{C}}_4=\frac{{\mathrm{VC}}_4}{\mathrm{fR}\Delta {\mathrm{VC}}_4}\left({\mathrm{D}}_2\right)$$

(34)

4. Results and Discussion

Analysis of a Single Input Multi Output SEPIC the Simulink model for a three port unidirectional SEPIC details are shown in Figure 17.

In Figure 18 shows the output voltage and current waveforms of a SIMO SEPIC and Figure 19 shows second values of the output voltage and current waveforms of a SIMO SEPIC.

Table 4. Actual and estimated values of output voltage for different set of supplies.

V1	D1	D2	D3	V2 (act)	V2 (est.)	V3 (act)	V3 (est.)
25	60	30	10	37.5	35.97	37.5	35.93
25	50	30	20	25	24.63	25	24.59
30	30	20	50	13	12.55	13	12.51
30	40	40	20	20	19.75	20	19.71
36	60	30	10	54	51.8	54	51.7
36	70	20	10	84	78.43	84	78.29

shows the comparison of measured output voltages (V₂ and V₃) (from the Simulink model) and estimated output voltage from (24) to (27) for different set of input voltage (V₁) and duty cycles (D₁, D₂ and D_eff) and also explained the voltage and current of components in PVSC, PVlC2 and PVLC2 shown in Figure 20.

The three modes of operations are clearly visualized in the waveforms of capacitor voltages and inductor currents of PVSC, PVLC1 and PVLC2. Also the comparison of measured and estimated output voltages (V₁ (act) and V₁ (est.)) and voltages (V₂ (act) and V₂ (est.)) shows approximately the same values for each different set of input values. And the speed and torque of motor is shown in Figure 21. In Figure 22 shown in simulink model for a port of SEPIC converter working operations and simulink details of output voltages 1 and 2.

In the above Figure 23 shows the output voltage and current waveforms of the proposed topology and also explain the detailed operations of Waveforms of voltage and currents across the components of PVSC2 in Figure 24.

In above the Figure 25 shows the detailed voltage and currents across the components of PVLC1.

In Figure 26 shows the voltage and currents across the components of PVLC2.The four modes of operation are visualized in the waveforms of capacitor voltages and inductor currents of the source and load sides. The ripple present in inductor currents and capacitor voltages obtained through MATLAB (R2016a, MathWorks, Natick, MA, USA) is concurrent with an estimated ripple of 0.5. In the output voltages of load 1, Speed torque characteristics PVSC1, PVSC2, PVLC1 and PVLC2shown in Figure 27, Figure 28 and Figure 29.

The waveforms of capacitor voltages and inductor currents of PVSC1, PVSC2 and PVLC1 and PVLC2. Also the comparison of measured and estimated output voltages (V₀ (act)) and V₀ (est.)) shows approximately the same values for a set of input sources (V₁, V₂) and duty cycles (D₁, D₂).

5. Hardware Implementation of Multi Port SEPIC Converter

The simulation analysis of the open loop unidirectional topology is verified with a real time hardware setup. The hardware setup is realized with one IGBT (FGA15N1) (Fairchild Semiconductor and this IGBT short description IGBT NPT 1200V 15A TO-3P) and two MOSFETs (N-channel MOSFET and 600V 4A MOSFET).A DSPIC30F2010 microcontroller (Microchip Technology, Wide operating voltage range (2.5 V to 5.5 V) dsPIC30F Motor Control 16-bit Digital Signal Controller) is used for generating the switching pulses. The research laboratories and Researchers mainly used for in this version of Matlab software Experiments are carried out in continuous current mode. In the input port, supply is provided by solar PV of almost equal power rating. The input to PVSC is V₁ = 35 V. The duty cycle for two corresponding switches D₁ = 60%, D₂ = 30% and D₃ = 10%. A 50 W universal motor is given as load to the unit. The components of the setup are designed to operate maximum at 1 kW. The component design parameters of the setup are given in

Table 5. Design of parameters.

PVSC Inductor, L1	15 mH
Common inductor, L	15 mH
PVSC1 capacitor, C1	0.54 mF
PVLC1 capacitor, C2	0.54 mF
PVLC2 capacitor, C3	0.46 mF
Switching frequency, f	5000 Hz

.

With the given input and duty cycle, the calculated value of the output voltages for V₁ is V₀₁ = 85.6 V and V₀₂ = 86 V. The output of MATLAB simulation of the proposed topology for the similar parameters is approximately V₀₁ = 86.66 and V₀₂ = 85.66 V. The output voltages of the proposed hardware setup for the given input and duty cycle are V₀₁ = 85 V and V₀₂ = 84 V. This indicates that for the similar value of parameters and inputs, the output corresponding to mathematical analysis, MATLAB simulation and hardware setup is approximately the same. In Figure 30 shows the block diagram of hardware arrangements.

In

Table 6. Component specifications.

Component	Model	Specification
Microcontroller	DSPIC30F2010	28 IC pins
		6 PWM channel
		(21–26)
		5 V operating voltage
		10 MHz operating frequency
		(9–10)
Driver	TLP250	8 pins
		12 V operating voltage
IGBT	FGA15N120	15 A maximum current
		1200 V maximum voltage
MOSFET	ISA04N60A	1 MHz maximum frequency
		600 V maximum voltage
		4 A maximum current

Explain the microcontroller and driver, IGBT, MOSFET components specifications and models details.

In the above Figure 31 is shown in the complete circuit of the three port SIMO structures details

Table 7. Actual and Estimated Output Voltages for Different Sets of Input Voltages.

V1	V2	D1	D2	D3	D4	V01 (Act)	V01 (Est.)	V02 (Act)	V02 (Est.)
50	25	0.37	0.67	0.15	0.33	80	79	80	78.78
50	35	0.25	0.70	0.15	0.30	95	94.17	95	94.16
60	30	0.20	0.50	0.30	0.50	45	42	45	42
60	40	0.42	0.60	0.25	0.40	82	81	82	81
35	20	0.30	0.55	0.20	0.45	32.5	34.45	32.5	34.44

shows the comparison of measured output voltage (from MATLAB Simulink) and timed output voltages for different sets of input voltages and duty cycles. Therefore it operates in buck, boost and buck-boost modes. All the hardware output voltage, capacitor output voltages & load 1 and 2 is given in Figure 32, Figure 33, Figure 34, Figure 35, Figure 36, Figure 37, Figure 38, Figure 39, Figure 40 and Figure 41.

6. Conclusions

The multiport topology for SEPIC converter was studied. A three-port unidirectional model is proposed. The proposed multiport converter is capable of interfacing two outputs by using a single voltage source such as a photovoltaic (PV) cell. The operation of the proposed converter with single a voltage source with a PV is verified. The authentication for the performance and operation of the converter is done with MATLAB simulations and mathematical analysis. The proposed circuit is efficient in interfacing the renewable energy due to its advantages of simple configuration, high efficiency, and reduced devices. The work is carried further with implementation of real time hardware with a DSPIC microcontroller. The authentication of simulation results and mathematical analysis of the proposed open loop topology have been proved by a real time hardware setup. Input to the hardware setup is provided from a solar PV of 35 V, and the unit operates with duty cycles of 67%. The output voltage of the hardware unit was 85 V, which matches the output voltage of the simulation and mathematical model. Also the modes of operation of the proposed open loop topology have been verified with the hardware results.

The multiport converter topology of a SEPIC was studied and a four port SEPIC for unidirectional properties is proposed. The two sources coupled to the converter are two PV cells. Four port power management systems can accommodate two sources and combine their advantages by using only a single conversion stage to interface four power ports. The operation of the proposed converter having two sources has been verified. The authentication for the performance and operation of the converter is done using MATLAB simulations and mathematical analysis. The calculation for small ripple approximation is done to find the parameter values of the different components used in the circuit. Analysis of the dual-input, dual-output converter with the simulation and experimental results are presented. Performance comparisons between the ideal calculation and results obtained from the hardware and simulation are closely matched.