# Series-Connected High Frequency Converters in a DC Microgrid System for DC Light Rail Transit

## Abstract

**:**

## 1. Introduction

## 2. Proposed Converter

_{dc}, −V

_{dc}and neutral line) can be adopted on the DC microgrid. When a fault condition in one of the DC poles occurs, the DC power is still suppled to the local load by the other two wires and an auxiliary converter. It is clear that the reliability of the DC mircogrid system is increased during fault condition. Therefore, three voltage levels (2V

_{dc}, +V

_{dc}and −V

_{dc}) can be used to provide industry and transportation with the 2V

_{dc}voltage level and future residential and commercial buildings with the +V

_{dc}or −V

_{dc}voltage level. To keep two voltage levels (+V

_{dc}and −V

_{dc}) balanced during unbalanced loads, a voltage balancing circuit is normally needed to realize this goal. The DC/DC converter can be used to convert a high input voltage to a low output voltage and it does not relate to the bipolar voltage system. For a DC light rail vehicle, the input voltage is normally around 760 V. Power devices such as the 1500 V IGBT can be adopted in two-level power converters to supply auxiliary low voltage power for control units, telecommunication units and lighting systems in the light rail vehicle. The MOSFETs with a 600 V rating can be adopted in the three-level power converter to achieve the same goal but with a much higher switching frequency to reduce converter size. The studied converter is concentrated on power conversion for light rail vehicle applications. Figure 2a shows the basic block diagrams of power distribution in a conventional light rail vehicle. First, 750 V

_{dc}is converted to the three-phase AC voltage 380 V

_{ac}by the DC/AC inverter. Second, the AC/DC converter is adopted to convert 380 V

_{ac}to a low DC voltage in an auxiliary power distribution system to supply a necessary amount of DC voltage for the battery bank, lighting equipment, door equipment, control power units and communication equipment in a light rail vehicle system. The AC/DC/AC converter is also adopted to convert 380 V

_{ac}to a variable AC voltage output for the AC motor drive. If the power of the DC light rail vehicle is supplied directly from the DC microgrid, then some power conversion stages can be saved to reduce costs and increase circuit efficiency. The basic power distribution diagrams in the proposed light rail vehicle are illustrated in Figure 2b. The auxiliary power in a light rail vehicle is directly converted from 760 V through a DC/DC converter. The AC motor drive and the air compressor are controlled by the DC/AC converters. Therefore, the AC/DC conversion can be saved to reduce costs and increase circuit efficiency and reliability.

_{1}~Q

_{6}is reduced to V

_{in}/3 and the low turn-on resistance of power MOSFETs is adopted to reduce conduction losses and increase circuit efficiency. Each HB circuit provides P

_{o}/3 to the output load. Flying capacitors are widely used in a multilevel inverter to reduce voltage stress and balance input split voltages. Thus, two flying capacitors C

_{f}

_{1}and C

_{f}

_{2}are used on the high voltage side to achieve an input voltage balance of V

_{C}

_{1}~V

_{C}

_{3}. The current doubler rectifier is used on the low voltage side to reduce the output ripple current. The driving signals of each HB circuit use asymmetric pulse-width modulation. Due to the resonant behavior between the output capacitor of the power MOSFETs and the primary leakage inductor at switch on/off instant, the power MOSFETs can be turned on at zero-voltage switching to reduce the switching loss. Figure 4 shows the timing sequence of switches Q

_{1}~Q

_{6}and the main PWM waveforms in the proposed converter. The operation principle and circuit analysis of the studied circuit are assumed under the following conditions: (1) the output capacitor C

_{o}is large enough to be treated as a constant voltage V

_{o}, (2) power devices Q

_{1}~Q

_{6}, D

_{1}and D

_{2}are ideal, (3) C

_{f}

_{1}= C

_{f}

_{2}= C

_{f}, C

_{b}

_{1}= C

_{b}

_{2}= C

_{b}

_{3}= C

_{b}, L

_{r}

_{1}= L

_{r}

_{2}= L

_{r}

_{3}= L

_{r}, and L

_{m}

_{1}= L

_{m}

_{2}= L

_{m}

_{3}= L

_{m}, (4) n

_{1}= n

_{2}= n

_{3}= n

_{p}/n

_{s}, and (5) V

_{Cb}

_{1}= V

_{Cb}

_{2}= V

_{Cb}

_{3}= V

_{Cb}and V

_{C}

_{1}= V

_{C}

_{2}= V

_{C}

_{3}= V

_{Cf}

_{1}= V

_{Cf}

_{2}= V

_{in}/3. The duty cycles of Q

_{1}, Q

_{3}and Q

_{5}are d. Conversely, the duty cycles of Q

_{2}, Q

_{4}and Q

_{6}are 1 − d. The equivalent circuits of the operating steps in the proposed circuit are shown in Figure 5. There are eight operating stages for every switching period.

**Step 1 [t**Before step 1, power switches Q

_{0}~t_{1}]:_{1}, Q

_{3}and Q

_{5}are conducting and the output current freewheels through D

_{1}and D

_{2}. After time t

_{0}, i

_{D}

_{1}is decreased to zero and D

_{1}becomes reverse biased. i

_{o}flows through D

_{2}. Power is transferred from V

_{in}to R

_{o}in this step. In step 1, V

_{Cf}

_{1}= V

_{C}

_{1}, V

_{Cf}

_{2}= V

_{C}

_{2}, v

_{Q}

_{2,ds}= V

_{C}

_{1}, v

_{Q}

_{4,ds}= V

_{C}

_{2}, v

_{Q}

_{6,ds}= V

_{C}

_{3}, v

_{Lm}

_{1}≈ V

_{C}

_{1}− v

_{Cb}

_{1}, v

_{Lm}

_{2}≈ V

_{C}

_{2}− v

_{Cb}

_{2}, v

_{Lm}

_{3}≈ V

_{C}

_{3}− v

_{Cb}

_{3}, ${v}_{Lo1}\approx [{V}_{C1}-{v}_{Cb1}]/{n}_{1}-{V}_{o}$ and ${v}_{Lo2}=-{V}_{o}$. Thus, i

_{p}

_{1}~i

_{p}

_{3}and i

_{Lo}

_{1}increase and i

_{Lo}

_{2}decreases. Since all circuit components in three HB circuits are identical and n

_{1}= n

_{2}= n

_{3}= n

_{p}/n

_{s}, it can obtain v

_{Lm}

_{1}= v

_{Lm}

_{2}= v

_{Lm}

_{3}= nv

_{ns}and i

_{p}

_{1}= i

_{p}

_{2}= i

_{p}

_{3}≈ i

_{s}/(3n

_{1}). Since i

_{Lo}

_{1}increases and i

_{Lo}

_{2}decreases in this step, the ripple current of i

_{Lo}

_{1}+ i

_{Lo}

_{2}is reduced.

**Step 2 [**

**t**

_{1}~**t**

_{2}**]**

**:**When Q

_{1}, Q

_{3}and Q

_{5}are turned off at time t

_{1}; the positive primary currents i

_{p}

_{1}~i

_{p}

_{3}rapidly discharge C

_{Q}

_{2}, C

_{Q}

_{4}and C

_{Q}

_{6}, respectively. On the other hand, C

_{Q}

_{1}, C

_{Q}

_{3}and C

_{Q}

_{5}are charged by i

_{p}

_{1}~i

_{p}

_{3}respectively. The secondary winding voltage v

_{ns}is decreased in this step.

**Step 3 [t**When C

_{2}~t_{3}]:_{Q}

_{2}, C

_{Q}

_{4}and C

_{Q}

_{6}are discharged to v

_{Cb}

_{1}, v

_{Cb}

_{2}and v

_{Cb}

_{3}respectively, then the secondary winding voltage v

_{ns}= 0. Then the output current i

_{o}freewheels through D

_{1}and D

_{2}. In this operation step, v

_{Lo}

_{1}= v

_{Lo}

_{2}= −V

_{o}and i

_{Lo}

_{1}and i

_{Lo}

_{2}decrease.

**Step 4 [t**

_{3}~**t**

_{4}**]:**At time t

_{3}, C

_{Q}

_{2}, C

_{Q}

_{4}and C

_{Q}

_{6}are discharged to zero voltage. Since i

_{p}

_{1}(t

_{3})~i

_{p}

_{3}(t

_{3}) are all positive, the body diodes D

_{Q}

_{2}, D

_{Q}

_{4}and D

_{Q}

_{6}are forward biased. Therefore, Q

_{2}, Q

_{4}and Q

_{6}can be turned on at this moment to realize a zero-voltage turn-on. Because i

_{o}is still freewheeling through D

_{1}and D

_{2}, it can obtain v

_{ns}= 0, v

_{Lo}

_{1}= v

_{Lo}

_{2}= −V

_{o}, v

_{Lr}

_{1}= −v

_{Cb}

_{1}, v

_{Lr}

_{2}= −v

_{Cb}

_{2}and v

_{Lr}

_{3}= −v

_{Cb}

_{3}. i

_{p}

_{1}~i

_{p}

_{3}, i

_{Lo}

_{1}and all i

_{Lo}

_{2}decrease. This step is ended when i

_{D}

_{2}= 0. During this freewheeling interval, the currents i

_{Lr}

_{1}~i

_{Lr}

_{3}are decreased from i

_{Lo}

_{1}/(3n

_{1}) to −i

_{Lo}

_{2}/(3n

_{1}) and the current variation on L

_{r}

_{1}~L

_{r}

_{3}is about I

_{o}/(3n

_{1}). The duty loss in step 4 is obtained as (1) shows:

**Step 5 [t**After t

_{4}~t_{5}]:_{4}, i

_{D}

_{2}is decreased to zero so that D

_{2}is reverse biased. i

_{o}flows through D

_{1}, L

_{o}

_{1}and L

_{o}

_{2}. In step 5, power is transferred from V

_{in}to R

_{o}, V

_{Cf}

_{1}= V

_{C}

_{2}, V

_{Cf}

_{2}= V

_{C}

_{3}, v

_{Q}

_{1,ds}= V

_{C}

_{1}, v

_{Q}

_{3,ds}= V

_{C}

_{2}, v

_{Q}

_{5,ds}= V

_{C}

_{3}, v

_{Lm}

_{1}≈ −v

_{Cb}

_{1}, v

_{Lm}

_{2}≈ −v

_{Cb}

_{2}, v

_{Lm}

_{3}≈ −v

_{Cb}

_{3}, ${v}_{Lo1}=-{V}_{o}$ and ${v}_{Lo2}\approx {v}_{Cb1}/{n}_{1}-{V}_{o}$. Thus, i

_{p}

_{1}~i

_{p}

_{3}and i

_{Lo}

_{1}decrease and i

_{Lo}

_{2}increases.

**Step**

**6 [t**

_{5}~t**When Q**

_{6}]:_{2}, Q

_{4}and Q

_{6}turn off at time t

_{5}, the negative primary currents i

_{p}

_{1}~i

_{p}

_{3}rapidly charge C

_{Q}

_{2}, C

_{Q}

_{4}and C

_{Q}

_{6}, respectively. On the other hand, C

_{Q}

_{1}, C

_{Q}

_{3}and C

_{Q}

_{5}are discharged by i

_{p}

_{1}~i

_{p}

_{3}respectively. The secondary winding voltage v

_{ns}is increased in this step.

**Step 7 [t**When C

_{6}~t_{7}]:_{Q}

_{2}, C

_{Q}

_{4}and C

_{Q}

_{6}are charged to v

_{Cb}

_{1}, v

_{Cb}

_{2}and v

_{Cb}

_{3}respectively at t

_{6}, it can obtain v

_{ns}= 0. Thus, i

_{o}freewheels through D

_{1}and D

_{2}in this step and v

_{Lo}

_{1}= v

_{Lo}

_{2}= −V

_{o}.

**Step 8 [t**When C

_{7}~t_{0}+ T_{sw}]:_{Q}

_{1}, C

_{Q}

_{3}and C

_{Q}

_{5}are discharged to zero voltage at t

_{7}, the body diodes D

_{Q}

_{1}, D

_{Q}

_{3}and D

_{Q}

_{5}are forward biased. Power switches Q

_{1}, Q

_{3}and Q

_{5}can be turned on at this moment to realize zero-voltage turn-on. Since i

_{o}still freewheels through D

_{1}and D

_{2}, it can obtain v

_{ns}= 0, v

_{Lo}

_{1}= v

_{Lo}

_{2}= −V

_{o}and v

_{Lr}

_{1}= v

_{Lr}

_{2}= v

_{Lr}

_{3}= V

_{in}/3 − v

_{Cb}

_{1}. Thus, i

_{p}

_{1}~i

_{p}

_{3}increase and i

_{Lo}

_{1}and i

_{Lo}

_{2}decrease. This step is ended when i

_{D}

_{1}= 0. During this freewheeling interval, i

_{Lr}

_{1}~i

_{Lr}

_{3}increase from −i

_{Lo}

_{2}/(3n

_{1}) to i

_{Lo}

_{1}/(3n

_{1}). The duty loss in step 8 is obtained as (2) shows.

_{0}+ T

_{sw}, i

_{D}

_{1}is decreased to zero and this switching period is completed. Since the duty cycle of all switches equals 0.5, the voltage balance of C

_{1}, C

_{2}and C

_{3}is well achieved with two balance capacitors C

_{f}

_{1}and C

_{f}

_{2}. If Q

_{1}, Q

_{3}and Q

_{5}are in the on-state and Q

_{2}, Q

_{4}and Q

_{6}are in the off-state, it obtains v

_{Cf}

_{1}= V

_{C}

_{1}and v

_{Cf}

_{2}= V

_{C}

_{2}. If V

_{C}

_{1}> V

_{C}

_{2}or V

_{C}

_{1}< V

_{C}

_{2}, then C

_{1}charges or discharges C

_{f}

_{1}through Q

_{1}and Q

_{3}. When Q

_{1}, Q

_{3}and Q

_{5}are in the off-state and Q

_{2}, Q

_{4}and Q

_{6}are in the on-state, it obtains v

_{Cf}

_{1}= V

_{C}

_{2}and v

_{Cf}

_{2}= V

_{C}

_{3}. If V

_{C}

_{1}> V

_{C}

_{2}or V

_{C}

_{1}< V

_{C}

_{2}, C

_{f}

_{1}charges or discharges C

_{2}through Q

_{2}and Q

_{4}. In a similar way, C

_{f}

_{2}can be used to balance V

_{C}

_{2}and V

_{C}

_{3}. Therefore, V

_{C}

_{1}~V

_{C}

_{3}are all controlled at V

_{in}/3.

## 3. Circuit Characteristics

_{1}~Q

_{6}. Based on the flux balance of primary inductors such as (L

_{r}

_{1}and L

_{m}

_{1}), (L

_{r}

_{2}and L

_{m}

_{2}) and (L

_{r}

_{3}and L

_{m}

_{3}), the DC capacitor voltages V

_{C}

_{1}~V

_{C}

_{3}in a steady state can be obtained as ${V}_{Cb1}={V}_{Cb2}={V}_{Cb3}=d{V}_{in}/3$, where d is the duty cycle of Q

_{1}, Q

_{3}and Q

_{5}. In the same way, the output voltage can be derived from the flux balance of output inductors L

_{o}

_{1}and L

_{o}

_{2}in a steady state.

_{f}is the voltage drop on D

_{1}and D

_{2}.

_{p}

_{1}~i

_{p}

_{3}equal zero and I

_{L}

_{o}

_{1}+ I

_{L}

_{o}

_{2}= I

_{o}, the average inductor currents I

_{Lo}

_{1}and I

_{Lo}

_{2}are derived as I

_{Lo}

_{1}= (1 − d)I

_{o}and I

_{Lo}

_{2}= dI

_{o}. The ripple currents on L

_{o}

_{1}and L

_{o}

_{2}are given in (4) and (5).

_{1}is related to the duty cycle of Q

_{2}and the turn-on time of D

_{2}is related to the duty cycle of Q

_{1}. Therefore, the average diode currents I

_{D}

_{1}and I

_{D}

_{2}are expressed as I

_{D}

_{1}= (1 − d)I

_{o}and I

_{Lo}

_{2}= dI

_{o}. The voltage stress of diodes D

_{1}and D

_{2}is related to the secondary winding voltage. The secondary winding voltage v

_{ns}is dependent on the input voltage V

_{in}and clamped voltage V

_{Cb}

_{1}. Thus, the voltage stress of D

_{1}and D

_{2}can be given in (6) and (7).

_{1}and D

_{2}are approximately equal to I

_{o}V

_{f}. If the transformer is constructed, then the magnetizing inductances L

_{m}

_{1}~L

_{m}

_{3}are given. Thus, the ripple currents i

_{Lm}

_{1}~i

_{Lm}

_{3}are obtained in (8).

_{in}/3. If the ripple currents on magnetizing inductors and output inductors are neglected, the root-mean-square (rms) currents i

_{Q}

_{1,rms}~i

_{Q}

_{1,rms}can be derived as (9) and (10) show.

_{1}~Q

_{6}are approximately equal to $d(1-d){I}_{o}^{2}{R}_{on}/(3{n}_{1}^{2})$, where R

_{on}is turn-on resistance of Q

_{1}~Q

_{6}. The positive peak currents of i

_{p}

_{1}~i

_{p}

_{3}at time t

_{1}are given in (11).

_{p}

_{1}~i

_{p}

_{3}at time t

_{5}are given in (12).

_{1}, Q

_{3}and Q

_{5}is given in (13).

_{2}, Q

_{4}and Q

_{6}is given in (14).

_{Q}= C

_{Q}

_{1}= C

_{Q}

_{2}= C

_{Q}

_{3}= C

_{Q}

_{4}= C

_{Q}

_{5}= C

_{Q}

_{6}.

## 4. Experimental Results

_{1}~Q

_{6}at 20% and 100% loads. It is clear that Q

_{1}, Q

_{3}and Q

_{5}have the same PWM waveforms. In the same manner, Q

_{2}, Q

_{4}and Q

_{6}have the same PWM waveforms. The input split voltages and balance capacitor voltages at a full load are shown in Figure 8. From the experimental results, the input split voltages and two flying voltages are balanced well. The primary side currents of three HB circuits are illustrated in Figure 9. It is observed that the three primary currents are balanced well. Figure 10 gives the measured waveforms of three DC block capacitor voltages. It can be observed that the three voltages are balanced and the capacitor voltages are related to the duty cycle of Q

_{1}, Q

_{3}and Q

_{5}. Figure 11 shows the experimental waveforms of the secondary side currents. The ripple currents on L

_{o}

_{1}and L

_{o}

_{2}partially cancel each other so that the resultant ripple current on the load side is reduced. Figure 12 shows the test results of Q

_{1}and Q

_{2}at 20% and 100% loads. Before the switch is turned on, the switch current is negative to discharge the output capacitor C

_{Q}to zero voltage. Thus, the mechanism of the zero-voltage turn-on switching is clearly achieved for both Q

_{1}and Q

_{2}from a 20% load. It can also be observed that all drain voltages of Q

_{1}and Q

_{2}are clamped at V

_{in}/3. Since the PWM signals of the three HB circuits are identical and the input split voltages are also balanced, Q

_{3}~Q

_{6}can also be turned on at zero-voltage from a 20% load. Figure 13 shows the circuit efficiency of the studied converter under different load cases. The measured maximum efficiency is about 93.6%. The main advantage of the studied converter is the lower voltage rating of power switches compared to the conventional three-level converter with eight MOSFETs and the two-level full-bridge converter with four IGBTs. Considering the turns-ratio of the transformer, the root-mean-square current of the studied converter is the same as the three-level and two-level converters. However, the lower conduction resistance of MOSFETs with lower voltage rating is used in the developed converter. Therefore, the total conduction losses (six MOSFETs) in the studied converter can be reduced compared to the three-level converter with eight MOSFETs and the full-bridge converter with four IGBTs.

## 5. Conclusions

## Acknowledgments

## Conflicts of Interest

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**Figure 2.**Light rail transit. (

**a**) Block diagram of the power distribution in a conventional light rail vehicle; (

**b**) block diagram of the power distribution in the studied light rail vehicle.

**Figure 5.**Operation steps of the power converter during one switching cycle (

**a**) step 1 (

**b**) step 2 (

**c**) step 3 (

**d**) step 4 (

**e**) step 5 (

**f**) step 6 (

**g**) step 7 (

**h**) step 8.

**Figure 7.**PWM signals of Q1~Q6 under (

**a**) 20% load; (

**b**) full load [v

_{Q}

_{1}~v

_{Q}

_{6}: 10 V/div; time: 2 µs].

**Figure 8.**Measured input capacitor voltages under full load [V

_{C}

_{1}~V

_{Cf}

_{2}: 200 V/div; time: 2 µs].

**Figure 9.**Test results of the primary side currents under (

**a**) 20% load [i

_{p}

_{1}~i

_{p}

_{3}: 2 A/div; time: 2 µs]; (

**b**) full load [i

_{p}

_{1}~i

_{p}

_{3}: 5 A/div; time: 2 µs].

**Figure 10.**Test results of the primary capacitor voltages under (

**a**) 20% load [V

_{Cb}

_{1}~V

_{Cb}

_{3}: 100 V/div; time: 2 µs]; (

**b**) full load [V

_{Cb}

_{1}~V

_{Cb}

_{3}: 100 V/div; time: 2 µs].

**Figure 11.**Measured secondary side currents at (

**a**) 20% load [i

_{D}

_{1}, i

_{D}

_{2}, i

_{Lo}

_{1}, i

_{Lo}

_{2}, i

_{Lo}

_{1}+ i

_{Lo}

_{2}: 10 A/div; time: 2 µs]; (

**b**) 100% load [i

_{D}

_{1}, i

_{D}

_{2}, i

_{Lo}

_{1}+ i

_{Lo}

_{2}: 50 A/div; i

_{Lo}

_{1}, i

_{Lo}

_{2}: 20 A/div; time: 2 µs].

**Figure 12.**Measured switch voltages and current (

**a**) Q

_{1}at 20% load [v

_{Q}

_{1},

_{g}: 10 V/div; v

_{Q}

_{1,d}: 200 V/div; i

_{Q}

_{1}: 2 A/div; time: 1 µs]; (

**b**) Q

_{1}at full load [v

_{Q}

_{1,g}: 10 V/div; v

_{Q}

_{1,d}: 200 V/div; i

_{Q}

_{1}: 10 A/div; time: 1 µs]; (

**c**) Q

_{2}at 20% load [v

_{Q}

_{2,g}: 10 V/div; v

_{Q}

_{2,d}: 200 V/div; i

_{Q}

_{2}: 2 A/div; time:1 µs]; (

**d**) Q

_{2}at full load [v

_{Q}

_{2,g}: 10 V/div; v

_{Q}

_{2,d}: 200 V/div; i

_{Q}

_{2}: 10 A/div; time: 1 µs].

Items | Symbol | Parameter |
---|---|---|

Input voltage | V_{in} | 760 V |

Output voltage | V_{o} | 24 V |

Output current | I_{o} | 60 A |

Switching frequency | f_{sw} | 100 kHz |

Power switches | Q_{1}~Q_{6} | IRFP460 |

Rectifier diodes | D_{1}, D_{2} | MBR40100T |

Split capacitors | C_{1}, C_{2}, C_{3} | 330 µF/400 V |

Flying capacitors | C_{f}_{1}, C_{f}_{2} | 2.2 µF/630 V |

Block capacitors | C_{b}_{1}, C_{b}_{2}, C_{b}_{3} | 750 nF/630 V |

Turns ratio of T | n_{p}:n_{p}:n_{p}:n_{s} | 15:15:15:8 |

Primary inductances | L_{r}_{1}, L_{r}_{2}, L_{r}_{3} | 30 µH |

Magnetizing inductances | L_{m}_{1}, L_{m}_{2}, L_{m}_{3} | 0.8 mH |

Output filter inductances | L_{o}_{1}, L_{o}_{2} | 32 µH |

Output filter capacitance | C_{o} | 4400 µF/50 V |

© 2018 by the author. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Lin, B.-R.
Series-Connected High Frequency Converters in a DC Microgrid System for DC Light Rail Transit. *Energies* **2018**, *11*, 266.
https://doi.org/10.3390/en11020266

**AMA Style**

Lin B-R.
Series-Connected High Frequency Converters in a DC Microgrid System for DC Light Rail Transit. *Energies*. 2018; 11(2):266.
https://doi.org/10.3390/en11020266

**Chicago/Turabian Style**

Lin, Bor-Ren.
2018. "Series-Connected High Frequency Converters in a DC Microgrid System for DC Light Rail Transit" *Energies* 11, no. 2: 266.
https://doi.org/10.3390/en11020266