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Article

Applying the Taguchi Method for Investigating the Phase-Locked Loop Dynamics Affected by Hybrid Storage System Parameters

by
Mostafa Ahmadzadeh
*,
Saeedollah Mortazavi
and
Mohsen Saniei
Department of Electrical Engineering, Faculty of Engineering, Shahid Chamran University of Ahvaz, Ahvaz 61357-43337, Iran
*
Author to whom correspondence should be addressed.
Energies 2018, 11(1), 226; https://doi.org/10.3390/en11010226
Submission received: 12 November 2017 / Revised: 24 December 2017 / Accepted: 10 January 2018 / Published: 17 January 2018
(This article belongs to the Section F: Electrical Engineering)

Abstract

:
Storage systems play an important role in performance of micro-grids. Storage systems may decrease fluctuations caused by periodic and unpredictable nature of distributed generation resource. Some micro-grids are connected to the network via a grid-interface converter. The phase-locked loop (PLL) is a commonly technique for the grid synchronization of network-connected converters. Various parameters affect the stability of PLL (including the network-side and microgrid-side parameters). The effect of the micro-grid-side parameters on the stability of the PLL has not been studied so far. In this paper, the stability of PLL influenced by microgrid-side parameters has been evaluated after a detailed analytical modeling of micro-grid components (including the production power fluctuations, energy storage system, microgrid-side loads, controller parameters etc.). This paper proposes two new stability analysis criteria for PLL affected by micro-grid and hybrid storage system parameters. Using proposed criteria for stability of PLL, optimized rate of micro-grid and hybrid storage system parameters are obtained using statistical methods (Taguchi approach). Finally, behavior of PLL affected by hybrid storage system is investigated. The simulation results and eigenvalues analysis confirm the theoretical analysis and proposed criteria.

1. Introduction

With increasing concern about environmental issues and the rising cost of energy resources, a great attention is focused to the use of distributed generation systems such as photovoltaic, wind, biogas, etc. [1]. Micro-grid is a small power system which employs a variety of distributed energy sources, to increase the reliability and power quality of power system. Micro-grids may operate in both of network-connected and islanding modes. In some micro-grids, particularly in network-connected applications; converting DC to AC power is performed using a single-phase or three-phase inverters [2,3,4].
In power converters connected to networks, the synchronization unit is one of the most important sectors in control systems. In these network-connected applications, PLLs are the most widely used synchronization techniques [5,6,7,8,9]. This may be due to the extra benefits of PLL such as simplicity of implementation and its reliability. Dynamic performance and stability of PLL may be influenced by various factors. In some previous papers [10,11,12,13,14,15,16,17], the effect of power quality indexes on the behavior of PLL has been discussed. In these papers, PLL performance affected by network voltage unbalance and harmonics has been investigated. In most of these papers, it has been attempted to design a better PLL to handle more network voltage distortions and harmonics [11,12,13,14,15,16]. However, none of these cases have considered the interaction between the PLL and the microgrid-side parameters, which could be a potential for the instability of the PLL.
References [7,10], have proposed control systems for converters in network-connected applications. In these papers have been shown that the performance of such systems can be imperiled by the non-linear performance of PLL. Related issues to instability of PLL have been investigated in [8,17]. Reported issues in these papers show that these unstable conditions happen under a weak network (network with large impedance). Reference [18,19], have studied the PLL instability under island conditions without further discussion. The effects of changes in network impedance on the dynamics of PLL are described in [8]. This article analyses the impact of network impedance on small signal stability of a three-phase phase-locked loop. Reference [20], offers a small-signal modeling approach to predict the low-frequency behavior of the network synchronization loop in systems with several parallel inverters.
The stability of PLL in network-connected applications is affected by different factors already discussed in various articles. In most of these studies, microgrid-side factors (generation units, energy storage system, loads, etc.) are considered as a constant current or voltage source [8,21,22,23]. This means that the effect of the Micro-grid components dynamic on the stability of grid-interface converter and its’ PLL is not studied so far. Similar to the effect of network-side factors on the grid-interface converter stability, dynamics of micro-grid components also play a role in the stability of the grid-interface converter and, in particular, the stability of its’ PLL. A detailed analytical modeling of micro-grid components, including production power fluctuations, energy storage system, the micro-grid load, etc. is done in this paper. Moreover, the stability of PLL is evaluated under different parameters of micro-grid and hybrid storage system. Two new stability analysis criteria for the PLL affected by micro-grid parameters is presented. Finally, through proposed criteria for stability analysis of PLL, the optimized rate of micro-grid and network parameters are obtained using statistical methods (Taguchi approach) and then, the stability analysis of PLL affected by hybrid storage system parameters is investigated. Simulation study is done in MATLAB software area. Simulation results confirm the theoretical analysis and proposed criteria.

2. Modeling and Control of Studied Micro-Grid

Figure 1, shows the schematic of a micro-grid along with the grid-interface converter. In this Figure, the inverter is connected to the DC bus. The DC bus is modeled with a capacitor with capacitance C e q .
In this study, a micro-grid composed of distributed generation sources, a hybrid storage system (batteries and super-capacitors) with a grid -interface bi-directional converter, DC and AC loads, grid-interface converter and energy management system are considered.
Figure 1a, is consist of a hybrid storage system and a current source. This current source represents the Differences between the load current and the current produced by distributed generation sources. Also, Figure 1a, shows the scheme of three phase converter connected to the grid through a LCL filter. (DC bus feeds grid-interface converter in Figure 1a)
In Figure 1, C s c , R p , R s , L 22 , L 11 , R L 2 , R L 1 , i G l , Z L , Z n e t , u n e t , L 1 , L 2 , C f i l , R d , are the equivalent capacity of super-capacitor, the equivalent parallel resistance of super-capacitor, the equivalent series resistance of super-capacitor, the filter inductance of super-capacitor’s converter, the filter inductance of battery’s converter, The equivalent resistance of power losses related to the switches of super-capacitor’s converter and the equivalent resistance of power losses related to the switches of battery’s converter, the differences between the load current and the current produced by distributed generation sources, the local load impedance (ohmic load ( R L ) parallel with inductive load ( L L )), the network (grid) impedance, the network (grid) voltage, the inverter-side inductance, the grid-side inductance, the filter capacitance and damping resistor, respectively.

2.1. Hybrid Storage System

A hybrid storage system, consisting of a battery, a super-capacitor and bidirectional power converters is used to maintain the DC bus voltage and to manage the energy of system. Input or output current of storage system can be controlled appropriately. The control system related to the hybrid storage system would be discussed in the next section. By assuming the insignificance of the switching losses and assuming ideal switches, the average model for hybrid storage system can be obtained from the following equations [24]:
d i ¯ b d t = 1 L 11 ( u ¯ b ( 1 d 1 ) u ¯ d c i ¯ b R L 1 )
d i ¯ s c d t = 1 L 22 ( u ¯ s c ( 1 d 2 ) u ¯ d c i ¯ s c R L 2 )
d u ¯ s c d t = 1 C s c ( u ¯ s c ( C s c R s L 22 1 R p ) + u ¯ d c ( C s c R s ( 1 d 2 ) L 22 )     i ¯ s c ( 1 + ( R s R p ) C s c R s R L 2 L 22 )
where u s c , u b , i s c , i b , d 2 , d 1 are the super-capacitor voltage, the battery voltage, the super-capacitor current, the battery current, the duty cycle of super-capacitor’s converter, the duty cycle of battery’s converter, respectively.

2.2. The Controller of Micro-Grid and Grid-Side Converter

Figure 2 shows the proposed control system that its aim is to maintain the DC bus voltage u d c by regulating the battery, the super-capacitor and the grid-interface converter currents. First, the instantaneous voltage u d c is compared with its reference value. Its error passes from PI controller and the share of the battery, the super-capacitor and the grid-interface converter compensation gets determined. To specify the contribution of each of these elements to the compensation, various indicators could be considered. In this article, sudden changes in power system are compensated by a super-capacitor because, the super-capacitor has a high response speed (super-capacitor employment may also increase battery life). This means that the high frequency error terms would be compensated by the super-capacitor, lower frequency terms by the battery and the rest would be compensated by means of the grid-interface converter.
The so-called frequency bandwidth is determined by a low-pass filter for the battery, a band-pass filter for grid-interface converter and the rest for the grid-interface converter. In this control system, τ 1 , τ 2 , I b , I S C , i l 1 d , I l 1 d , i l 1 q , I l 1 q , i d i s , u d c are the time constant of low-pass filter, the time constant of band-pass filter, the reference charging or discharging current of battery, the reference charging or discharging current of super-capacitor, the inverter d-component current in the inverter-side, the inverter d-component reference current in the inverter-side, the inverter q-component current in the inverter-side, the inverter q-component reference current in the inverter-side, the error current caused by the difference between the instantaneous and reference voltage of DC bus and the reference voltage of DC bus and the reference voltage of DC bus, respectively.

2.3. Small Signal Model of Studied Micro-Grid

According to (4), the small-signal model of system represents the amount of fluctuations of average variables around the operating point. In this Equation, the order of X , x ˜ , x ¯ is the amount of average variable at the operating point, the small signal term of average variable and the average variable, respectively.
x ¯ = X + x ˜
Applying Equation (4) to all of the Equations corresponding to micro-grid’s components (Due to the large number of the micro-grid’s equations, the details have been ignored) and assume that the small signal term of the average variables and the changes of average variables (derivatives) at the operating point are insignificant, the network operating point would be achieved by solving the Equations. Due to nonlinearity of the average model, the obtained average model equations should be linearized around the operating point. The above linearization process will result in state Equations (5)–(9):
d x ˜ ( t ) d t = A x ˜ ( t ) + B u ˜ ( t )  
y ˜ ( t ) = C x ˜ ( t ) + D u ˜ ( t )
x ˜ ( t ) = [ i ˜ b , i ˜ s c , u ˜ d c , i ˜ l 1 d , i ˜ l 1 q , i ˜ l 2 d , i ˜ l 2 q , i ˜ L L d , i ˜ L L q , u ˜ c f i l d , u ˜ c f i l q , u ˜ s c , u ˜ p d , u ˜ p q , C ˜ , θ ˜ P ]
y ˜ ( t ) = [ i ˜ b , i ˜ s c , u ˜ d c , i ˜ l 1 d , i ˜ l 1 q , i ˜ l 2 d , i ˜ l 2 q , u ˜ s c , u ˜ p d , u ˜ p q , C ˜ , θ ˜ P ]
u ˜ ( t ) = [ d ˜ 1 , d ˜ 2 , d ˜ d , d ˜ q , u ˜ n e t d , u ˜ n e t q , i G l ]
In the above Equations, x ˜ ( t ) , y ˜ ( t ) , u ˜ are the network state variable, the output vector and the input vector, respectively.
In this regard, the order of i ˜ l 2 d , i ˜ l 2 q , d d , d q , i ˜ L L d , i ˜ L L q , u ˜ n e t d , u ˜ n e t q , u ˜ c f i l d , u ˜ c f i l q , u ˜ p d , u ˜ p q , C ˜ , θ ˜ P are the inverter d-component current in the grid-side, the inverter q-component current in the grid-side, the d-component duty cycle of grid-interface converter, the q-component duty cycle of grid-interface converter, the d-component instantaneous current of local load, the q-component instantaneous current of local load, the d-component instantaneous voltage of network, the q-component instantaneous voltage of network, the d-component instantaneous voltage of filter capacitor, the q-component instantaneous voltage of filter capacitor, the d-component voltage measured by PLL, the q-component voltage measured by PLL, the angle of inverter current in the grid-side inverter.

3. Proposed Criteria for the Stability Analysis of PLL

Almost all PLLs are comprised of three basic parts: phase detector (PD), loop filter (LF) and voltage controlled oscillator (VCO) [5]. Figure 3, shows the overall structure of a conventional SRF-PLL. The phase angle of input signal is compared with the feedback of the output of oscillator and the error signal is produced proportional to the difference between the input and output phase angles. Phase detector output, consists of harmonic components, passed by the low-pass filter. Controlled output voltage of the loop filter (which is a function of frequency) enters into the oscillator and produces a phase output. The output signal (which is in the form of phase angle) goes back to the phase detector with a negative feedback. The output signal of oscillator is compared with the input; if their frequency were different, the output frequency of oscillator is changed to be equal with the input frequency. In this PLL, as seen in Figure 4, a three-phase input voltage ( u ˜ p a b c ) is transformed into the rotating frame ( u p d ,   u p q ) using Clarke and Park transformation.
Using a feedback loop, the angular position of dq framework is controlled in a way that one of the d or q voltage components is zero. Assuming that the network voltage u ˜ n e t ( θ n e t ) is a vector that is rotating with a synchronous angle θ n e t , hence the angle θ P must match the angle θ n e t to synchronize the inverter’s output current with network voltage.
According to the Park transformation matrix:
[ u p d u p q u p 0 ] = 2 3 [ cos ( θ p )   cos ( θ p 2 π 3 )   cos ( θ p + 4 π 3 ) sin ( θ p )   sin ( θ p 2 π 3 )   sin ( θ p + 4 π 3 ) 1 2   1 2   1 2 ] [ u n e t cos ( θ n e t ) u n e t cos ( θ n e t 2 π 3 ) u n e t cos ( θ n e t + 2 π 3 ) ]
u p q = u n e t sin ( θ n e t θ P )
According to the Equation (11), to match angle θ P on the angle θ n e t , the u p q must be equal to zero. It should be noted that this compliance, in addition to maintaining synchronization between the output voltage of micro-grid and the voltage of main network will also contribute to the stability of PLL. (Because u p q enters into the integrator, its non-zero value may lead to instability of PLL.) Therefore, the condition u p q = 0 is considered to be as a proposed criterion for the stability of the PLL.
According to the Equation (6), the output current of inverter i ˜ l 2 ( θ P ) has two components i ˜ l 2 q and i ˜ l 2 d that be obtained as follows:
i ˜ l 2 d = C 61 · i ˜ b + C 62 · i ˜ s c + + C 616 · θ ˜ P +   D 61 · d ˜ 1 + D 62 · d ˜ 2 + + D 67 · i G l
i ˜ l 2 q = C 71 · i ˜ b + C 72 · i ˜ s c + + C 716 · θ ˜ P + D 71 · d ˜ 1 + D 72 · + + D 77 · i G l
The order of C 61 , C 62 , , C 716 , D 61 , D 62 , D 77 are the elements of matrices C and D in state equations. According to the above relations and considering that output current of inverter is a vector, this current can be showed as follows:
i ˜ l 2 ( θ P ) = I l 2 e j θ P
I l 2 = ( | i ˜ l 2 d | 2 + | i ˜ l 2 q | 2 )
In Equation (14), I l 2 and θ P are the amplitude and the angle of output current of inverter, respectively. This angle was determined by the PLL. In Figure 5, it is assumed that the PLL position is after the inverter LCL filter. In this case, the voltage which the PLL measures ( u ˜ p a b c ) is affected by two factors: the network-side parameters and the micro-grid-side parameters. Also, it is assumed that Z n e t and u ˜ n e t ( θ n e t ) are the impedance and the voltage of the network, respectively. Therefore, the input voltage to the PLL will be as follows:
u ˜ p a b c = u ˜ m g r i d + u ˜ n e t
In this regard, the order of u ˜ n e t and u ˜ m g r i d is the voltage caused by network-side factors connected to the Micro-grid (the main grid) and the voltage caused by microgrid-side factors, respectively. As shown in Figure 5.
u ˜ m g r i d = i ˜ l 2 ( θ P ) · Z L Z n e t Z L + Z n e t   =   ( | i ˜ l 2 d | 2 + | i ˜ l 2 q | 2 ) | Z L Z n e t Z L + Z n e t | e j ( θ P + φ P )
φ P = P h a s e   ( Z L Z n e t Z L + Z n e t )
u ˜ n e t = u ˜ n e t ( θ n e t ) · Z L Z L + Z n e t = | u ˜ n e t | | Z L Z L + Z n e t | e j ( θ n e t + φ n e t )
φ n e t = P h a s e   ( Z L Z L + Z n e t )
In above Equations, Z L , Z n e t , φ n e t and φ P are the local load impedance, the network impedance, the phase created by the existence of the network and load impedances in network frequency and the phase created by the existence of the network and load impedances in output angular frequency of PLL ( ω P ) , respectively.
K n e t ( ω n e t ) = | Z L ( ω n e t ) Z L ( ω n e t ) + Z n e t ( ω n e t ) |
φ n e t ( ω n e t ) = P h a s e ( Z L ( ω n e t ) Z L ( ω n e t ) + Z n e t ( ω n e t ) )
K P ( ω P ) = | Z L ( ω P ) Z n e t ( ω P ) Z L ( ω P ) + Z n e t ( ω P ) |
φ P ( ω P ) = P h a s e ( Z L ( ω P ) Z n e t ( ω P ) Z L ( ω P ) + Z n e t ( ω P ) )
Assuming that the network voltage u ˜ n e t ( θ n e t ), is a vector that is spinning with a synchronous angle θ n e t , the angle θ P be coincident on the angle θ n e t to make the output current of inverter synchronized with the network voltage. (Details is in Figure 6)
According to the Park transformation matrix:
According to the Equation (11), to match angle θ P on the angle θ n e t , the u q must be equal to zero. It should be noted that this compliance, in addition to maintaining synchronization between the output voltage of micro-grid and the voltage of main network, will also contribute to the stability of PLL (Because u q enters into the integrator, its non-zero value may lead to instability of PLL). Based on Equations (17), (19) and Figure 7, u P q has two parts of u q n e t and u q m g r i d which are affected by the main network-side parameters and the microgrid- side parameters, respectively. In fact, it can be said that part u q m g r i d is a kind of annoying factor for the PLL that tries to help θ P get away from θ n e t . The remarkable thing about Equation (25) (annoying factor for the PLL stability) is that the amplitude and direction of inverter’s output current, the local load type and the size of main network impedance may influence the PLL stability.
v q m g r i d = I l 2 · sin ( φ P ( ω P ) ) · K P
Moreover, the part related to the main network-side parameters ( u q n e t ), tries to neutralize the effectiveness of micro-grid-side factors by setting of φ n e t + θ n e t θ P . Considering that the maximum amount of u q n e t is equal to K n e t u n e t , then if the amplitude of u q m g r i d is more than the maximum amount of u q n e t , no θ P would be found to make u q zero; this can disturb the stability of the PLL. Therefore, with regard to aforementioned, another stability index may be achieved for PLL as following:
PLL is stable if:
| u q m g r i d | < | u q n e t |  
I l 2 < | u n e t · K n e t | | sin ( φ P ( ω P ) ) · K P |
Therefore, in this section, two stability criteria ( u p q = 0 and Equation (27)) for the PLL were obtained and in the next section, according to the mentioned stability criteria, the stability of PLL affected by network-side and grid-side factors would be examined.

4. Determining the Optimal Parameters of the Studied Micro-Grid by Taguchi Method

The Optimization Process is one of the most important activities in today’s competitive industry. The high cost of research and development projects has necessitated the exploitation of experiment design methods to determine the impressive factors on processes with the least number of tests. Methods of experiment design have widely been used in the past two decades to achieve this goal. Compared with other commonly-used methods such as full factorial design, fractional factorial, Latin Squares, etc., Taguchi experimental design method, in addition to having this role, has found much wider applicability because of being more comprehensive in some parts of the industry [25]. Taguchi method may be considered as a statistical method to optimize and improve the quality of each process.
In some cases, the traditional experimental designs are very complicated and sometimes infeasible. When the number of parameters in a process is large, a great number of experiments (simulations) are required to optimize the parameters of the experimental design method. Taguchi method uses a specific orthogonal array to resolve this problem and investigate all parameters by using a few tests (simulations). Taguchi method is widely used in engineering analysis with the aim of obtaining information about the behavior of a process [26,27,28,29,30]. The biggest advantages of this method include saving the number of experiments (simulations), saving the time, reducing the costs, etc.

4.1. Testing and Analysis

The purpose of the study is to evaluate the effects of the micro-grid and hybrid storage system parameters on the stability of PLL. The study simultaneously aimed at determining the optimal values of these parameters to improve the stability of PLL and thereby improve the stability of the network-side converter. For this purpose, C e q , L 11 , C s c L 22 , i G l , τ , L 2 , L 1 , C f , R L , L L , z n e t are considered as micro-grid electrical parameters and z n e t as the main network parameter. In contrast, u p q = 0 is determined as proposed PLL stability criterion and it is considered as the most important characteristic of the output process. Each regulatory parameter (micro-grid and network-side parameters) has been evaluated in three levels. Table 1 shows the regulatory parameters of the process along with their levels.
To achieve the aims of this study, a set of simulations data related to the process is required. According to the number of parameters and their levels, the total number of states (tests or simulations) is obtained from n = L K . In this equation, n is the number of experiments, L is the number of levels and K is the number of considered parameters. In this study, there are 12 parameters in each of the 3 levels. Therefore, the total number of simulations will be equal to 531,441 tests (simulations). It is clear that carrying out this large number of tests is very time consuming. Moreover, it is not cost-effective. Therefore, Taguchi experimental design approach is used to collect the required data. Taguchi provides a practical approach regarding the quality control of manufacturing industries.
The main objectives of Taguchi method include determining the effect of each parameter on the output process and determining the optimal levels of these parameters. Taguchi method achieves these goals by analyzing simulations data which have been collected in predetermined terms. In this study, experiments have been designed by Minitan17 software. Taguchi suggests an L 27 orthogonal array for 12 input factors and 3 levels.
Resultantly, 27 simulative tests were performed according to the levels shown in Table 2 and the amount of u P q   was measured through the simulation of the mentioned micro-grid (Figure 1) in MATLAB software. The measured value of u P q is provided in column 14 in Table 2.

4.2. The Signal to Noise Ratio Analysis

Signal to noise ratio, represents the sensitivity of the studied characteristic to Input factors in a controlled process [27,28,29,30,31]. The optimum condition is detected by determining the effect of each input factor on output Characteristic. From the perspective of the characteristic of the output process, it can be divided into three categories: the less is the better (smaller is better), the closer to nominal amount is the better (nominal is better) and the bigger is the better (larger is better). Taguchi has offered different equations to calculate the signal to noise ratio in terms of the relevance of the desired Characteristic to any of the three mentioned groups [25,32]. In general, the highest ratio (S/N) is always desirable in each test. The output measured in this study is u P q which is placed in the category the smaller is better. Therefore, the following equation is used to calculate the signal to noise ratio.
S N = 10   l o g 10 ( 1 n i = 1 n ( y i ) 2 )
In above equation, n is the frequency of each test and y i is i-th measured output. Signal to noise ratio is calculated for each of the 27 experiments performed using the equation mentioned above and is shown in the last column in Table 2. In this study, each of the tests was done only once and thus, n is equal to one.

4.3. Analysis of Results for Determining of Optimal Parameters

Because in the Taguchi experiments, only some parts of the possible cases are tested, to ensure the accuracy of the final results, appropriate statistical methods should be used. Analysis of variance is a statistical method that calculates the degree of confidence and determines the contribution percentage of each variable on the output process. Then, the statistical analysis conducted on the results of the experiments (simulations) in micro-grid for the PLL stability are provided. Table 3, shows the analysis of variance for q-axis component of the voltage measured by the PLL ( u P q ). This analysis has been carried out based on a confidence level of 95% (uncertainty 5%).
Columns 2–7 in the Table 3 show the degrees of freedom (DF) for each parameter, the sum of squares (seq SS), the adjusted sum of squares (Adj SS), the average sum of squares (Adj MS), F statistic, p statistic and the effect of each input parameter on the desired output (p%), respectively. p statistics is used to determine the significant influence of each parameter on the output. According to the analysis which was based on 95% confidence level, if p value for each parameter is less than 0.05, it would be indicative of the significant influence of each parameter on the output. As is shown in the Table 3, p value is less than 0.05 for some parameters.
Table 3, shows the effect of each micro-grid and main grid parameter on the q-axis component of the voltage measured by the PLL ( u P q ) and thus the stability of PLL. It is clear that the inductive local load (with inductance L L ) has the greatest impact on the stability of PLL by more than 14 percent. Other parameters are in order of importance i G l , τ , C s c , L 1 , C e q , z n e t , R L , C f i l , L 2 , L 11 , L 22 . In the present study, the amount of signal to noise (S/N) was calculated for the results of all the tests using Equation (28). Then, the mean value of the signal to noise ratio was obtained for each level of each parameter tested. Figure 8, shows the mean signal to noise ratio for each of the 12 adjustment parameters in the u P q . As mentioned earlier, high levels of signal to noise ratio are always desirable. Therefore, based on the mean signal to noise ratio of each adjustment parameter, it is possible to determine their optimal levels. According to Figure 6, the best levels for the parameters of the micro-grid and network to achieve the best stability of the grid-side converter and the PLL stability is in Table 4.
According to the Result of variance analysis of signal to noise ratio (Table 3) and mean of signal to noise ratio (Figure 8), it is clear that the inductive local load (with inductance L L ) has the greatest impact on the stability of PLL by more than 14 percent. Other parameters are in order of importance i G l , τ , C s c , L 1 , C e q , z n e t , R L , C f i l , L 2 , L 11 , L 22 . The eigenvalues of micro-grid’s state matrix (in Equation (5)) for the optimal values of micro-grid parameters are given in Table 5.
The indicated Eigenvalues in Table 5 show that the studied micro-grid and also the PLL of grid-interface converter are stable for the micro-grid’s optimal parameters.
Also, for confirmation of the obtained results from the analysis of the Eigenvalues and the proposed stability criteria of PLL, the studied micro-grids simulated for optimal values of micro-grid and network parameters.
According to the Figure 9, the Voltage v q is equal to zero for all the time and this shows that the PLL is stable for optimal parameters of micro-grid and network (according to proposed stability criteria of PLL u p q = 0 ).
Now, the stability of PLL is examined for determined optimal values of micro-grid and network parameters by the second proposed Stability criterion in (27).
φ P = π 2 tan 1 ( R L + L L · ω P + L L · ω P · Z n e t ( Z n e t . R L ) ) = 3.11   r a d
I l 2 < | u n e t · K n e t | | sin ( φ P ( ω P ) ) · K P | = 230 | 10   sin ( φ P ( ω P ) ) | = 60.3104
The Equation (30) implies that only the parameters that lead to the injection of the output current I l 2 less than 60.3144 amperes, ensure the PLL stability. According to the proposed criterion, it is clear that the PLL would be unstable for larger output current of inverter ( I l 2 ), larger network impedances ( Z n e t ) and larger reactive loads ( φ P ( ω P ) ). The inverter output current I l 2 for optimal values of micro-grid and network parameters has simulated in Figure 10, it is clear that mentioned current has satisfied the New Stability criterion and therefore, the PLL is stable for optimal values of micro-grid and network parameters. As shown, PLL is stable according to the stability criteria for the optimal parameters of micro-grid and main network. Now for more reviews, the Output frequency of PLL, DC bus voltage and super-capacitor current has simulated in Figure 11, Figure 12 and Figure 13, respectively.
Figure 11, shows that the output frequency of the PLL is constant and equal to 60 Hz for all the times. This issue is evidence of the PLL stability. Figure 12 shows that for optimal values of micro-grid parameters, the DC bus voltage is stable and equal to 600 volts. That means, in addition to the PLL stability, the micro-grid is also stable.
As previously mentioned, toward increasing the battery life and also because the super-capacitor has a high response speed, sudden changes in power are compensated by a super-capacitor. This means that the high frequency error terms would be compensated by the super-capacitor, lower frequency terms by the battery and the rest would be compensated by means of the grid-interface converter. As shown in Figure 13, the sudden power changes in the micro-grid has compensated by the super-capacitor and indicate that the optimal super-capacitor capacity has been correctly selected. It should be noted that, as stated in the previous section, in this study it has been assumed that the battery compensates a pre-specified current of about 10 amperes.

5. Assessing the Effect of Hybrid Storage System’s Parameters on PLL Stability

As mentioned above, the time constant of low-pass filter (τ) and the equivalent capacity of super-capacitor ( C s c ) have great impact on the stability of PLL by more than 12 percent and it is in the third degree of importance (according to Table 3). According to the Result of variance analysis of signal to noise ratio (Table 3) and mean of signal to noise ratio (Figure 8) it is clear that by increasing the values of time constant and equivalent capacity of super-capacitor, the stability of PLL improves and, naturally, the stability of the PLL for the smaller values is imperiled.

5.1. Impact of the Time Constant of Low-Pass Filter (τ) on PLL Stability

In order to evaluate the effect of the time constant of low pass filter on the stability of PLL, it is assumed that the share of compensated current by battery has been pre-specified (about 10 amperes). In this case, the control system determines only the share of the super-capacitor and the grid-interface converter. As mentioned earlier, the share of each storage element and grid-interface converter is determined by adjusting the bandwidth of each filter. Since it is assumed that the share of compensated current by battery has been pre-specified, only a low-pass filter with transfer function K 1 + s τ is used until the low-frequency terms of i d i s is compensated by the grid-interface converter and the rest by the super-capacitor. In Figure 9, Figure 10, Figure 11, Figure 12 and Figure 13, the studied micro-grid was simulated for optimal micro-grid parameters. In fact, simulations were performed for the best parameters (best conditions). Now, to show the effect of each of the mentioned parameters, the studied micro-grid is simulated for the worst conditions. To investigating the effect of time constant of low-pass filter on PLL stability, the Simulations are performed for τ = 0.5 s. Since the time constant of low-pass filter has reduced from optimal value (10 s) to 0.5 s, so a larger share of the current is compensated by the converter. As shown in Figure 14, the Inverter output current I l 2 has exceeded from the value specified in Equation (30) and has led to the instability of the PLL. Since the Inverter output current I l 2 has exceeded from the stability limit, therefore, the v q also exceeds from zero value. This problem has shown in Figure 15 and confirms that both stability criteria have been violated and as a result, the PLL has been instable. According to the above mentioned, the output frequency of the PLL is also not stable, which is shown in Figure 16.

5.2. Impact of the Equivalent Capacity of Super-Capacitor ( C s c ) on thePLL Stability

To investigating the effect of equivalent capacity of super-capacitor on PLL stability, the capacity value has considered the worst conditions ( C s c = 0.1   F ). The eigenvalues of studied micro-grid’s state matrix (in Equation (5)) for C s c = 0.1   F are given in Table 6.
The indicated Eigenvalues in Table 6 show that the studied micro-grid and also the PLL of grid-interface converter are instable for C s c = 0.1   F .
Also, for confirmation of the obtained results from the analysis of the Eigenvalues and the proposed stability criteria of PLL, the studied micro-grids simulated for C s c = 0.1   F .
In this case, given that the equivalent capacity of the super-capacitor has decreased from its optimal value (3 F) to 0.1 F and also because the time constant is 10 s, a significant current passes from the super-capacitor. Therefore, the super-capacitor voltage increases substantially, which makes the PLL instable.
The resulting simulations in Figure 17, Figure 18, Figure 19 and Figure 20 confirms the obtained results from the analysis of the Eigenvalues and the proposed stability criteria of PLL.

6. Conclusions

In this paper, two new stability analysis criteria for the PLL affected by parameters of micro-grid and hybrid storage system are presented. The optimal values of micro-grid and hybrid storage system parameters to improve the stability of PLL and thereby the stability of the network-side converter was determined. The dynamic model of micro-grid was simulated in MATLAB software area. Taguchi approach was employed in order to determine the optimum levels of the micro-grid and hybrid storage system parameters. Moreover, variance analysis was used to prove the meaningful effect of these parameters on the output. Results of statistical analysis showed that some micro-grid and hybrid storage system parameters, which have been evaluated in this study, have significant effects on the PLL stability and thus the grid (network)—side converter stability. Finally, the PLL stability affected by hybrid storage system parameters was investigated. The simulation results and eigenvalues analysis confirmed the theoretical analysis and proposed criteria.

Acknowledgments

This work was supported by Department of Electrical Engineering, Faculty of Engineering, Shahid Chamran University of Ahvaz, Iran.

Author Contributions

Mostafa Ahmadzadeh proposed the original idea and carried out the simulations, Saeedollah Mortazavi carried out the main research tasks, Mohsen Saniei wrote the full manuscript and was supervisor.

Conflicts of Interest

The authors declare no conflict of interest.

Abbreviations

The following abbreviations are used in this manuscript:
R L 1 The equivalent resistance of power losses related to the switches of super-capacitor converter
R L 2 The equivalent resistance of power losses related to the switches of battery converter
φ n e t The phase created by the existence of the network and load impedances in network frequency
φ P The phase created by the existence of the network and load impedances in output Frequency of PLL
C e q The equivalent capacitance of DC bus
C s c The Equivalent capacity of super-capacitor
R p The Equivalent parallel resistance of super-capacitor
R s The Equivalent series resistance of super-capacitors
u s c The Super-capacitor voltage
u b The Battery voltage
i s c The super-capacitor current
i b The battery current
L 22 The inductance of output filter of super-capacitor converter
L 11 The inductance of output filter of battery converter
d 2 The duty cycle of super-capacitor converter
d 1 The duty cycle of battery converter
Z L L The local load impedance
Z n e t The network impedance
u n e t The network voltage
i G l Differences between the load current and the current produced by distributed Generation sources
τ 1 The time constant of low-pass filter
τ 2 The time constant of band-pass filter
I l 1 d d-Component reference current of grid-interface converter
i l 1 d d-Component instantaneous current of grid-interface converter
I l 1 q The component reference current of grid-interface converter
i l 1 q The component instantaneous current of grid-interface converter
d d The d-component duty cycle of grid-interface converter
d q The q-component duty cycle of grid-interface converter
i d i s The error current caused by the difference between the instantaneous and reference DC bus voltage
u d c The reference voltage of DC bus
θ P The angle of output current of grid-interface converter

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Figure 1. Schematic of studied micro-grid: (a) the hybrid storage system and equivalent circuit of micro-grid (b) network-interface converter and local load.
Figure 1. Schematic of studied micro-grid: (a) the hybrid storage system and equivalent circuit of micro-grid (b) network-interface converter and local load.
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Figure 2. Proposed control system for hybrid storage system and network-interface converter.
Figure 2. Proposed control system for hybrid storage system and network-interface converter.
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Figure 3. Linear model of SRF-PLL [12].
Figure 3. Linear model of SRF-PLL [12].
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Figure 4. SRF-PLL model [3].
Figure 4. SRF-PLL model [3].
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Figure 5. Simplified equivalent circuit of studied micro-grid and grid-side converter.
Figure 5. Simplified equivalent circuit of studied micro-grid and grid-side converter.
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Figure 6. Diagram of network voltage and measured voltage by PLL.
Figure 6. Diagram of network voltage and measured voltage by PLL.
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Figure 7. Block diagram of PLL, affected by network and micro-grid side factors.
Figure 7. Block diagram of PLL, affected by network and micro-grid side factors.
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Figure 8. Mean of signal to noise ratio.
Figure 8. Mean of signal to noise ratio.
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Figure 9. Voltage v q measured by PLL, affected by optimal levels for micro-grid and network parameters.
Figure 9. Voltage v q measured by PLL, affected by optimal levels for micro-grid and network parameters.
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Figure 10. Inverter output current I l 2 , affected by optimal levels for micro-grid and network parameters.
Figure 10. Inverter output current I l 2 , affected by optimal levels for micro-grid and network parameters.
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Figure 11. Output frequency of PLL, affected by optimal levels for micro-grid and network parameters.
Figure 11. Output frequency of PLL, affected by optimal levels for micro-grid and network parameters.
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Figure 12. DC bus voltage, affected by optimal levels for micro-grid and network parameters.
Figure 12. DC bus voltage, affected by optimal levels for micro-grid and network parameters.
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Figure 13. Super-capacitor current, affected by optimal levels for micro-grid and network parameters.
Figure 13. Super-capacitor current, affected by optimal levels for micro-grid and network parameters.
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Figure 14. Output current I l 2 f or τ = 0.5 s.
Figure 14. Output current I l 2 f or τ = 0.5 s.
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Figure 15. Voltage v q measured by PLL for τ = 0.5 s.
Figure 15. Voltage v q measured by PLL for τ = 0.5 s.
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Figure 16. Output frequency of PLL for τ = 0.5 s.
Figure 16. Output frequency of PLL for τ = 0.5 s.
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Figure 17. Output current I l 2 for C s c = 0.1 F.
Figure 17. Output current I l 2 for C s c = 0.1 F.
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Figure 18. Super-capacitor current, affected by optimal levels for C s c = 0.1 F.
Figure 18. Super-capacitor current, affected by optimal levels for C s c = 0.1 F.
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Figure 19. Voltage v q measured by PLL for C s c = 0.1 F.
Figure 19. Voltage v q measured by PLL for C s c = 0.1 F.
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Figure 20. Output frequency of PLL for C s c = 0.1 F.
Figure 20. Output frequency of PLL for C s c = 0.1 F.
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Table 1. Different levels of process variables.
Table 1. Different levels of process variables.
Parameter L e v e l   1 L e v e l   2 L e v e l   3
L 11 0.1   mH 1   mH 10   mH
L 22 0.1   mH 1   mH 10   mH
C s c 0.1   F 1   F 3   F
C e q 0.1   mF 1   mF 10   mF
L 1 45   µ H 70   µ H 100   µ H
τ 0.50   s 5   s 10   s
R L 2   5   10  
L 2 45   µ H 70   µ H 100   µ H
C f i l 40   µ F 60   µ F 100   µ F
Z n e t 10   40   90  
L L 30   mH 50   mH 70   mH
i G l 50   A 60   A 80   A
Table 2. Output result of simulation for measurement of v p q .
Table 2. Output result of simulation for measurement of v p q .
Simulation
Number
L 1 L 2 L 11 L 22 C e q C f i l R L L L C s c Z n e t τ i G l v p q S N
1111111111111 0.0714 18.5776
2111122222222 0.2857 09.8591
3111133333333 0.5000 06.0206
4122211122233 0.1176 17.1272
5122222233311 0.3319 08.9442
6122233311122 0.2184 12.2950
7133311133322 0.1638 14.7938
8133322211133 0.0504 20.0000
9133333322211 0.2647 10.8818
10212312312312 0.3025 09.0329
11212323123123 0.2268 12.0412
12212331231231 0.1260 15.7031
13223112323131 0.0840 18.3156
14223123131212 0.2731 10.2544
15223131212323 0.1848 13.9795
16231212331223 0.2815 09.8699
17231223112331 0.0294 22.1026
18231231223112 0.1176 16.9054
19313213213213 0.2689 10.4574
20313221321321 0.1680 14.0500
21313232132132 0.0924 18.0618
22321313221332 0.1638 14.1372
23321321332113 0.2521 11.2133
24321332113221 0.0040 49.1186
25332113232121 0.0966 17.8219
26332121313232 0.0084 30.9031
27332132121313 0.1974 13.0964
Table 3. Result of analysis of variance of signal to noise ratio.
Table 3. Result of analysis of variance of signal to noise ratio.
ParameterDFAdj SSAdj MSF Valuep Valuep (%)
R L 20.031440.0157214.320.0398.05
L 1 20.038450.0192245.280.02310.25
τ 20.045370.0226866.230.01412.04
L L 20.053270.0266347.320.00814.03
C e q 20.038450.0192245.280.02310.25
i G l 20.045760.0228826.290.01312.16
C s c 20.045350.0226756.230.01412.04
Z n e t 20.038460.0192294.560.0349.03
C f i l 20.0016340.0008172.400.2944.35
L 2 20.0006700.0003350.980.5041.84
L 22   20.0004930.0002460.720.581.32
L 11 20.0005910.0003010.870.5101.52
E r r o r 20.036670.003056--3.12
T o t a l 260.376196---100
Table 4. Optimal levels for micro-grid and network parameters to achieve the best stability of the PLL.
Table 4. Optimal levels for micro-grid and network parameters to achieve the best stability of the PLL.
ParameterLevelOptimal Value
L 11 3 10   mH
L 22   1 0.1   mH
C s c 3 3   F
C e q 3 10   mF
L 1 3 100   µ H
τ 3 10   s
R L 3 10  
L 2 3 100   µ H
C f i l 3 100   µ F
Z n e t 1 10  
L L 3 70   mH
i G l 1 20   A
Table 5. Eigenvalues of micro-grid’s state matrix for optimal values of micro-grid parameters.
Table 5. Eigenvalues of micro-grid’s state matrix for optimal values of micro-grid parameters.
State VariablesEigenvalues
i ˜ b −32.91 + 26.07i
i ˜ s c −18.72 + 10.00i
u ˜ d c −131.62 − 100.34i
i ˜ l 1 d −131.62 + 100.34i
i ˜ l 1 q −150.06 − 95.87i
i ˜ l 2 d −150.06 + 95.87i
i ˜ l 2 q −99.05
i ˜ L L d −185.13
i ˜ L L q −245.95
u ˜ c f i l d −15.53 − 37.12i
u ˜ s c −15.53 + 37.12i
u ˜ p d −2.32 − 10.48i
u ˜ p q −2.32 + 10.48i
C ˜ −85.12 − 38.14i
θ ˜ P −85.12 + 38.14i
Table 6. Eigenvalues of micro-grid’s state matrix for C s c = 0.1 .
Table 6. Eigenvalues of micro-grid’s state matrix for C s c = 0.1 .
State VariablesEigenvalues
i ˜ b −54.11 + 294.64i
i ˜ s c −127.54 − 74.01i
u ˜ d c 131.62 + 100.34i
i ˜ l 1 d −24.73 +95.87i
i ˜ l 1 q −24.73 − 95.87i
i ˜ l 2 d 15.06 + 95.87i
i ˜ l 2 q −9.05
i ˜ L L d −15.13 − 10.15i
i ˜ L L q −15.13 + 10.15i
u ˜ c f i l d −12.76 − 93.98i
u ˜ s c −12.76 + 93.98i
u ˜ p d −24.23
u ˜ p q 6.53
C ˜ 9.04 − 18.42i
θ ˜ P 9.04 + 18.42i

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Ahmadzadeh, M.; Mortazavi, S.; Saniei, M. Applying the Taguchi Method for Investigating the Phase-Locked Loop Dynamics Affected by Hybrid Storage System Parameters. Energies 2018, 11, 226. https://doi.org/10.3390/en11010226

AMA Style

Ahmadzadeh M, Mortazavi S, Saniei M. Applying the Taguchi Method for Investigating the Phase-Locked Loop Dynamics Affected by Hybrid Storage System Parameters. Energies. 2018; 11(1):226. https://doi.org/10.3390/en11010226

Chicago/Turabian Style

Ahmadzadeh, Mostafa, Saeedollah Mortazavi, and Mohsen Saniei. 2018. "Applying the Taguchi Method for Investigating the Phase-Locked Loop Dynamics Affected by Hybrid Storage System Parameters" Energies 11, no. 1: 226. https://doi.org/10.3390/en11010226

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