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Sensors
Volume 21
Issue 6
10.3390/s21062175
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Article

Spatial Location in Integrated Circuits through Infrared Microscopy †

by
Raphaël Abelé
1,*,
Jean-Luc Damoiseaux
1,
Redouane El Moubtahij
1,
Jean-Marc Boi
1,
Daniele Fronte
2,
Pierre-Yvan Liardet
3 and
Djamal Merad
1,*
1
Laboratoire d’Informatique et Systemes, Aix-Marseille University, 163 Avenue de Luminy, 13288 CEDEX 09 Marseille, France
2
STMicroelectronics, 190 Avenue Coq, 13106 Rousset, France
3
eShard, Bâtiment GIENAH, 11 Avenue de Canteranne, 33600 Pessace, France
*
Authors to whom correspondence should be addressed.
†
This paper is an extension version of the conference paper: Abelé, R.; Damoiseaux, J.; Fronte, D.; Liardet, P.; Boï, J.; Merad, D. Graph Matching Applied For Textured Pattern Recognition. In Proceedings of the 2020 IEEE International Conference on Image Processing (ICIP), Abu Dhabi, United Arab Emirates, 25–28 October 2020.
Sensors 2021, 21(6), 2175; https://doi.org/10.3390/s21062175
Submission received: 24 December 2020 / Revised: 11 March 2021 / Accepted: 17 March 2021 / Published: 20 March 2021
(This article belongs to the Special Issue Feature Extraction for Unconventional Visual Sensors or Specific Applications)
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Abstract

In this paper, we present an infrared microscopy based approach for structures’ location in integrated circuits, to automate their secure characterization. The use of an infrared sensor is the key device for internal integrated circuit inspection. Two main issues are addressed. The first concerns the scan of integrated circuits using a motorized optical system composed of an infrared uncooled camera combined with an optical microscope. An automated system is required to focus the conductive tracks under the silicon layer. It is solved by an autofocus system analyzing the infrared images through a discrete polynomial image transform which allows an accurate features detection to build a focus metric robust against specific image degradation inherent to the acquisition context. The second issue concerns the location of structures to be characterized on the conductive tracks. Dealing with a large amount of redundancy and noise, a graph-matching method is presented—discriminating graph labels are developed to overcome the redundancy, while a flexible assignment optimizer solves the inexact matching arising from noises on graphs. The resulting automated location system brings reproducibility for secure characterization of integrated systems, besides accuracy and time speed increase.
Keywords: thermal imaging; microscopy; secure characterization; pattern location; autofocus; polynomial decomposition; graph matching thermal imaging; microscopy; secure characterization; pattern location; autofocus; polynomial decomposition; graph matching

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MDPI and ACS Style

Abelé, R.; Damoiseaux, J.-L.; Moubtahij, R.E.; Boi, J.-M.; Fronte, D.; Liardet, P.-Y.; Merad, D. Spatial Location in Integrated Circuits through Infrared Microscopy. Sensors 2021, 21, 2175. https://doi.org/10.3390/s21062175

AMA Style

Abelé R, Damoiseaux J-L, Moubtahij RE, Boi J-M, Fronte D, Liardet P-Y, Merad D. Spatial Location in Integrated Circuits through Infrared Microscopy. Sensors. 2021; 21(6):2175. https://doi.org/10.3390/s21062175

Chicago/Turabian Style

Abelé, Raphaël, Jean-Luc Damoiseaux, Redouane El Moubtahij, Jean-Marc Boi, Daniele Fronte, Pierre-Yvan Liardet, and Djamal Merad. 2021. "Spatial Location in Integrated Circuits through Infrared Microscopy" Sensors 21, no. 6: 2175. https://doi.org/10.3390/s21062175

APA Style

Abelé, R., Damoiseaux, J.-L., Moubtahij, R. E., Boi, J.-M., Fronte, D., Liardet, P.-Y., & Merad, D. (2021). Spatial Location in Integrated Circuits through Infrared Microscopy. Sensors, 21(6), 2175. https://doi.org/10.3390/s21062175

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