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Article

Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm †

Department of Information Engineering, University of Pisa, Via G. Caruso n. 16, 56122 Pisa, Italy
*
Author to whom correspondence should be addressed.
This paper is an extended version of our paper published in Springer LNEE vol. 627, 2020, Luca Baldanzi, Luca Crocetti, Francesco Falaschi, Jacopo Belli, Luca Fanucci and Sergio Saponara, Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications, in Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, Pisa, Italy, 11–13 September 2019.
Sensors 2020, 20(7), 1869; https://doi.org/10.3390/s20071869
Received: 7 February 2020 / Revised: 12 March 2020 / Accepted: 17 March 2020 / Published: 27 March 2020
In the context of growing the adoption of advanced sensors and systems for active vehicle safety and driver assistance, an increasingly important issue is the security of the information exchanged between the different sub-systems of the vehicle. Random number generation is crucial in modern encryption and security applications as it is a critical task from the point of view of the robustness of the security chain. Random numbers are in fact used to generate the encryption keys to be used for ciphers. Consequently, any weakness in the key generation process can potentially leak information that can be used to breach even the strongest cipher. This paper presents the architecture of a high performance Random Number Generator (RNG) IP-core, in particular a Cryptographically Secure Pseudo-Random Number Generator (CSPRNG) IP-core, a digital hardware accelerator for random numbers generation which can be employed for cryptographically secure applications. The specifications used to develop the proposed project were derived from dedicated literature and standards. Subsequently, specific architecture optimizations were studied to achieve better timing performance and very high throughput values. The IP-core has been validated thanks to the official NIST Statistical Test Suite, in order to evaluate the degree of randomness of the numbers generated in output. Finally the CSPRNG IP-core has been characterized on relevant Field Programmable Gate Array (FPGA) and ASIC standard-cell technologies. View Full-Text
Keywords: intelligent sensors; autonomous driving; cyber security; HW accelerator; on-chip random number generator (RNG); SHA2; FPGA; ASIC standard-cell intelligent sensors; autonomous driving; cyber security; HW accelerator; on-chip random number generator (RNG); SHA2; FPGA; ASIC standard-cell
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MDPI and ACS Style

Baldanzi, L.; Crocetti, L.; Falaschi, F.; Bertolucci, M.; Belli, J.; Fanucci, L.; Saponara, S. Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm. Sensors 2020, 20, 1869. https://doi.org/10.3390/s20071869

AMA Style

Baldanzi L, Crocetti L, Falaschi F, Bertolucci M, Belli J, Fanucci L, Saponara S. Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm. Sensors. 2020; 20(7):1869. https://doi.org/10.3390/s20071869

Chicago/Turabian Style

Baldanzi, Luca, Luca Crocetti, Francesco Falaschi, Matteo Bertolucci, Jacopo Belli, Luca Fanucci, and Sergio Saponara. 2020. "Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm" Sensors 20, no. 7: 1869. https://doi.org/10.3390/s20071869

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