# Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation

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## Abstract

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## 1. Introduction

`(`MIT-BIH) Arrhythmia Database. The simulation results demonstrate that the SNR and CR of the proposed scheme are balanced and the hardware implementation can be easily achieved. Furthermore, the proposed algorithm is also implemented in a single chip using the Taiwan Semiconductor Manufacturing Company’s (TSMC) 0.18-μm Complementary Metal-Oxide-Semiconductor (CMOS) technology. The proposed chip achieves a low-cost design with only 2.69-K gate counts. The proposed design is also implemented into the Field-Programmable Gate Array (FPGA) platform to demonstrate the compression performance. The results show low hardware resource is utilized when the proposed design is implemented into the Xilinx Kintex-7 FPGA.

## 2. Proposed Architecture

#### 2.1. Compressed Sensing

#### 2.1.1. Measurement Matrix

#### 2.1.2. Discrete Cosine Transform (DCT)

#### 2.2. Near-Precise Compressed Algorithm

- Differences between adjacent signals are first calculated to reduce the amplitude scale of the signal. Thus, there is a greater probability of the same different result, which makes it possible to increase the compression ratio using methods based on Huffman coding theory.
- Generally, quantifying differences between adjacent signals requires an infinite number of bits; however, that is impossible to implement in VLSI. Thus, we perform quantization to the eighth decimal place in the NPC algorithm.
- Huffman coding utilizes symbols that vary in repetition to map bits of different lengths. If the symbol Xq is repeated frequently, then the output data Xnpc will have fewer bits after Huffman mapping. Consequently, symbol Xq (repeating infrequently) is mapped to data of a longer length. To increase the compression ratio and restrict the number of output bits, a multiplexer is switched according to whether the input data are mapped in a Huffman Look-Up Table (LUT). If the input data are mapped in a Huffman LUT, then Mapping = 0 and output data Xnpc are equal to the Huffman LUT mapping results. If the input data are not included in the Huffman LUT, then Mapping = 1 and the output Xnpc is equal to the quantification results.

- When the symbol Xq is repeated frequently, it is compressed via Huffman coding and the compressed data is restricted to fewer than 8 bits. ECG signals in the QRS region can be compressed with almost no loss using the proposed NPC algorithm.
- The Huffman LUT can be implemented using low-cost hardware because we map only the portion of the data that appears frequently. This reduces the size of the LUT by 82%.

#### 2.3. Adaptive Compression Algorithm Integrating CS and NPC

Algorithm 1. Proposed Adaptive Compressed Algorithm. |

Input: Input data $\mathrm{x}\text{}\mathsf{\u03f5}\text{}{\mathbb{R}}^{{w}_{r}}$; R–R information ${w}_{r}$ |

Output: Compressed data $y$ |

1. Initialization: s = 0; i = 0; j = 0; ${w}_{r}$ is decomposed to ${N}_{cs}\text{}\mathrm{and}\text{}{N}_{npc}$, where ${w}_{r}={N}_{cs}+{N}_{npc}$ |

2. while ($s<{w}_{r}-1$) |

3. (NPC algorithm) |

4. while ($s<{N}_{npc}-1$) |

5. Adjacent signals difference: If (k = 0), ${\tilde{x}}_{s}=x$, else ${\tilde{x}}_{s}=x-{\tilde{x}}_{s-1}$ |

6. Quantification: ${x}_{q}=Q\left({\tilde{x}}_{s}\right)$ |

7. Huffman mapping: If (${x}_{q}$ maps to Huffman LUT ) ${x}_{npc}=LUT\left({x}_{q}\right)$, mapping = 0 |

8. else ${x}_{npc}={x}_{q}$, mapping = 1 |

9. Update NPC output format: ${y}_{npc}=\left[mapping\text{}{x}_{npc}\right]$ |

10. end while |

11. (CS algorithm) |

12. while (${N}_{npc}<s<{N}_{cs}-1$) |

13. if ($j=0$), ${x}_{j}=x$, else ${x}_{j}=x+{x}_{j-1}$ |

14. if (j = ${N}_{cs}/M-1$) |

15. $j=0,\text{}{y}_{cs,i}\in {\mathbb{R}}^{M}={x}_{j}$, $i=i+1$ where ${y}_{cs}\in {\left[{y}_{cs,0},{y}_{cs,1},\dots ,{y}_{cs,{N}_{cs}/M-1}\right]}^{T}$ |

16. else |

17. $j=j+1$, ${x}_{j}={x}_{j}$ |

18. end while |

19. Index update: s = s + 1 |

20. Output data: $y=\left[{y}_{npc}\text{}{y}_{cs}\right]$ |

21. end while |

## 3. Simulation Results

## 4. Discussion

## 5. Hardware Implementation

#### 5.1. Chip Implementation

#### 5.2. FPGA Implementation

## 6. Conclusions

## Acknowledgments

## Author Contributions

## Conflicts of Interest

## References

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**Figure 1.**Square error of signal window when using the compressed sensing (CS) algorithm proposed in [9].

**Figure 5.**Comparison of various algorithms: (

**a**) Signal-to-noise ratio (SNR); (

**b**) Error bar for SNR (standard deviation); (

**c**) Percent-root-different (PRD).

**Figure 6.**Example simulation using record 124: (

**a**) comparison of SNR values obtained using different algorithms; (

**b**) squared segment window offset error between the original and the recovery signal.

**Table 1.**Different QS with varying CRs in the CS-base algorithm utilized in the proposed architecture.

CR | 2 | 4 | 8 | 10 | 12 | 15 | 20 | 25 | 30 | 40 |

QS | 1.50 | 2.01 | 1.87 | 2.07 | 2.12 | 1.85 | 1.55 | 1.31 | 0.99 | 0.85 |

Process Technology | TSMC 0.18 μm CMOS |

Supply Voltage | 1.8 V |

Maximum Frequency | 60 MHz |

Core Area | 831 $\times $ 827 ${\mathsf{\mu}\mathrm{m}}^{2}$ |

Power Consumption | 2.1 mW |

Gate Count (K) | 2.69 |

Bits-Compressed Ratio | 5.05 |

FPGA Chip | XC7K325T | |
---|---|---|

Used | Available | |

# of Slices Registers | 126 | 407,600 |

# of Slices LUTs | 428 | 203,800 |

# of Fully-Used LUT-FF Pairs | 102 | 452 |

Clock Frequency | 131 MHz |

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**MDPI and ACS Style**

Tseng, Y.-H.; Chen, Y.-H.; Lu, C.-W.
Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation. *Sensors* **2017**, *17*, 2288.
https://doi.org/10.3390/s17102288

**AMA Style**

Tseng Y-H, Chen Y-H, Lu C-W.
Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation. *Sensors*. 2017; 17(10):2288.
https://doi.org/10.3390/s17102288

**Chicago/Turabian Style**

Tseng, Yun-Hua, Yuan-Ho Chen, and Chih-Wen Lu.
2017. "Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation" *Sensors* 17, no. 10: 2288.
https://doi.org/10.3390/s17102288