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Concept Paper

How to Measure and Calculate Equivalent Series Resistance of Electric Double-Layer Capacitors

by
Rafael Vicentini
1,
Leonardo Morais Da Silva
2,*,
Edson Pedro Cecilio Junior
1,
Thayane Almeida Alves
1,
Willian Gonçalves Nunes
1 and
Hudson Zanin
1,*
1
Advanced Energy Storage Division, Center for Innovation on New Energies, Carbon Sci-Tech Labs, School of Electrical and Computer Engineering, University of Campinas, Av Albert Einstein 400, Campinas, SP 13083-852, Brazil
2
Department of Chemistry, Federal University of Jequitinhonha e Mucuri’s Valley, Highway MGT 367, km 583, 5000, Alto da Jacuba, Diamantina, MG 39100-000, Brazil
*
Authors to whom correspondence should be addressed.
Molecules 2019, 24(8), 1452; https://doi.org/10.3390/molecules24081452
Submission received: 21 February 2019 / Revised: 24 March 2019 / Accepted: 28 March 2019 / Published: 12 April 2019
(This article belongs to the Special Issue Advances in Electrochemical Energy Storage Devices)

Abstract

:
Electric double-layer capacitors (EDLCs) are energy storage devices that have attracted attention from the scientific community due to their high specific power storage capabilities. The standard method for determining the maximum power (Pmax) of these devices uses the relation Pmax = U2/4RESR, where U stands for the cell voltage and RESR for the equivalent series resistance. Despite the relevance of RESR, one can observe a lack of consensus in the literature regarding the determination of this parameter from the galvanostatic charge-discharge findings. In addition, a literature survey revealed that roughly half of the scientific papers have calculated the RESR values using the electrochemical impedance spectroscopy (EIS) technique, while the other half used the galvanostatic charge discharge (GCD) method. RESR values extracted from EIS at high frequencies (>10 kHz) do not depend on the particular equivalent circuit model. However, the conventional GCD method better resembles the real situation of the device operation, and thus its use is of paramount importance for practical purposes. In the latter case, the voltage drop (ΔU) verified at the charge-discharge transition for a given applied current (I) is used in conjunction with Ohm’s law to obtain the RESR (e.g., RESR = ΔUI). However, several papers have caused a great confusion in the literature considering only applied current (I). In order to shed light on this important subject, we report in this work a rational analysis regarding the GCD method in order to prove that to obtain reliable RESR values the voltage drop must be normalized by a factor of two (e.g., RESR = ΔU/2I).

1. Introduction

From urban mobility to portable electronics, fast charging devices are in growing demand [1,2,3]. In this scenario, electric double-layer capacitors (EDLCs), also known as supercapacitors, are very attractive energy storage devices with ultra-fast and short-term features [2,3,4]. To scale the characteristics of different EDLCs, the specific energy and power are commonly evaluated for practical purposes. The key parameters for the energy storage devices are regarded to the energy (Wh kg−1) and power (W kg−1) normalized per weight of the device (or the electrode material). In this sense, the maximum output energy (Emax) and power (Pmax) are determined using the relations Emax = CU2/2 and Pmax = U2/4RESR, respectively, where U stands for cell voltage, C for specific capacitance, and RESR for equivalent series resistance (ESR) [5].
It is commonly verified in the literature that ESR can be properly determined using the electrochemical impedance spectroscopy (EIS) and the galvanostatic charge-discharge methods. In the case of EIS, the ESR value can be accurately determined at high frequencies (>10 kHz) [6,7,8]. This method is quite simple to be applied since it does not rely on the use of a particular equivalent circuit model for the device [9]. Despite the advantages offered by the EIS method, we must consider that the conventional GCD method better resembles the real operation conditions for supercapacitors, i.e., the use of this method in the laboratory studies is of paramount importance in order to obtain a more realistic experimental scenario resembling a real application.
In the case of the GCD method, the voltage drop (ΔU) verified at the charge-discharge transition for a given applied current (I) must be used in conjunction with Ohm’s law to obtain the RESR (e.g., RESR = ΔUI and not RESR = ΔU/I) [5,10,11,12,13,14,15,16]. However, the ‘ad hoc’ adoption in the literature of non-standard normalizing factors for ΔU have led to a great confusion when findings present in different papers obtained for supercapacitor devices were compared.
The objective of the present work is to present a theoretical analysis of the GCD method to demonstrate that correct determination of RESR values requires the voltage drop to be normalized by a factor of two (e.g., RESR = ΔU/2I and not RESR = ΔU/I). Simulations using canonic circuit models were carried out to emphasize the theoretical aspects inherent to the present work. Furthermore, a comparison of the theoretical electrochemical behaviors of these circuits in the frequency domain is presented using the EIS method.

2. Fundamentals of the EIS and GCD Methods

Figure 1a,b shows the simulated Nyquist (e.g., complex-plane) plots and the corresponding galvanostatic charge-discharge plots obtained as a function of the RESR. It is worth mentioning that the impedance response verified at very high frequencies does not depend on the particular equivalent circuit model used in the simulation process [7,8,17,18,19,20,21,22]. In addition, for practical purposes, since the EIS is a steady-state technique obeying the linear theory of systems, one has that highly accurate values of resistances and capacitances can be obtained for EDLCs using a low amplitude sinusoidal voltage (e.g., δU = 10 mV (peak-to-peak)) and scanning the frequency for various orders of magnitude (e.g., Δf = 100 kHz to 10 mHz).
From the above considerations, simulations were accomplished using a canonic equivalent circuit model representing the ideal electrochemical response of a symmetric coin cell device where the positive and negative electrodes are identical. As it can be seen in the inset of Figure 1, the equivalent series resistance (RESR) is connected to a branch containing a capacitor (CEDL), representing the charge storage process on the electrical double-layer (EDL) formed at the electrode/electrolyte interface, which stands in parallel with a leakage resistance (RL). Despite the use of a canonic model, it is important noting that the RESR-value obtained at high-frequencies always appear as a generalized resistance connected in series with the other circuit elements of the particular circuit model [4].
The simulation presented in Figure 1a was accomplished for different RESR-values and using an RL (impedance to leak current)-value of 1 MΩ. Obviously, an ideal EDLC device has a very high leakage resistance (RL → ∞) and the phenomenon of frequency dispersion is absent, i.e., the complex-plane plot is characterized by a perfect vertical line (see Figure 1a). Thus, the extrapolation of this line on the real axis (Zreal) at very high frequencies (e.g., ω → ∞) yields the desired value of the RESR. Therefore, in real systems the true value of RESR is commonly determined by extrapolation using a high-frequency value of ≈1.0 kHz.
Figure 1b shows the galvanostatic charge-discharge curves evidencing the voltage drop (Udrop) at the inversion of polarity. From the theoretical viewpoint, in this case the determination of the RESR-value involves the application of a square wave current function with the inversion in polarity (e.g., I(+)I(−) and |I(+)| = |I(−)|).A voltage drop is observed at the reversal of polarization with a voltage increase after the sign of the current was reversed. During a continuous repetition of the charge–discharge processes, the positive (anode) and negative (cathode) electrodes were constantly charged and discharged, respectively, for equal times by applying positive (I(+)) and negative (I(−)) currents of the same magnitude (|I(+)| = |I(−)|). Therefore, for an ideal case where only a capacitive behavior exists (RESR = 0) one would obtain as the response a symmetric triangular voltage wave since the capacitive voltage (Uc) increases linearly with the stored charge (Q) for a given capacitance (C), i.e., δUc = δQ/C. However, in real cases where RESR > 0 the anodic branch (e.g., the straight line with a positive slope) of the voltage wave referring to the charging process (e.g., δUc(+) = δQ(+)/C) is displaced to more positive values by a constant value dictated by UESR(+) = RESR × I(+) = constant. Therefore, the instantaneous values of the overall voltage are given by Ui = Uc(+) + UESR(+). Accordingly, the cathodic branch (e.g., the straight line with a negative slope) of the voltage wave associated with the discharging process (e.g., δUc(−) = δQ(−)/C) is displaced to more negative voltages due to the reversal in polarity of the applied current where δI = I(+)I(−) = 2I, since |I(+)| = |I(−)|.
Intuitively, the instantaneous values of the overall voltage after the reversal in polarity is given by Ui = UcUESR = UcRESR × 2I. In this sense, the overall voltage drop during reversal of the polarization is UESR = − RESR × 2I since ΔUESR < 0, i.e., RESR = ΔUESR/2I and, therefore, the voltage drop must be normalized by a factor of 2 [5].

3. Theoretical Electric Response of the GCD Curves Using the Canonic Equivalent Circuit Model

3.1. Deriving the Theoretical Formula for the Equivalent Series Resistance

To obtain the theoretical model for the calculation of the RESR, the canonic circuit presented in Figure 2 representing the charge–discharge processes was employed to obtain the pertinent equations. In short, key equations for the charge and discharge processes and a combination of them are presented to obtain the desired theoretical model.
According to the basic laws governing the theory of electric circuits the cell voltage during a charging process for the circuit presented in Figure 2 is given by the following relationship:
U cell ( t ) = R ESR I cell + R L I cell × [ 1 exp ( t R L C ) ]
In addition, it is possible to demonstrate that the function Ucell(t) describing the transient response after the switcher K is closed is given by the following equation:
U cell ( t ) = U sc 0 R ESR I cell ( U sc 0 + R L I cell ) × [   1 + exp ( t R L C ) ]
Using Equations (1) and (2), the theoretical galvanostatic charge–discharge curves accounting for the charging and discharging processes on CEDL, respectively, were obtained at constant current from numerical simulation (e.g., Simulink of PSIM software) using different RESR-values (e.g., 0, 0.01, and 0.1 Ω) keeping the RL = 1.0 MΩ and CEDL = 0.1 F (see Figure 3). The anodic (positive) and cathodic (negative) currents were alternated between +1 A and −1 A, respectively. In this case, a virtual controlled current source was applied referring to a charging time of ~1 s. Then, the current direction was reversed, thus characterizing the discharge of the CEDL. The magnitude of the charge and discharge currents was maintained so that the desired characteristics of the circuit could be graphically observed.
The RESR-value can be determined by the voltage drop during the reversal of the polarity, i.e., when the charging process is discontinued to obtain the discharging curves. In the case of the cell voltage during the charging process (see Equation (1)), when t → ∞ the capacitor is fully charged. Therefore, one has for this particular condition that:
U cell ( t ) = R E S R I cell + R L I cell
Remembering that for the charging voltage when t → ∞ one has that RLIcell is equal to the voltage in the capacitor (USC0), the following equation can be obtained:
U cell ( t ) = R E S R I cell ( charging ) + U sc 0
In the case of the cell voltage for the discharging process (t → 0), when t tends to zero the capacitor is fully discharged. Thus, for these conditions one has from Equation (2) that:
U cell ( t ) = U sc 0 R E S R I cell ( discharging )
Calculating the difference between Equations (1) and (2), the following relation is obtained:
Δ U = R E S R ( I cell ( charging ) + I cell ( discharging ) ) = 2 R E S R | I cell |
Since the charging and discharging current are equal in modulus. Finally, the theoretical expression for the equivalent series resistance is given by Equation (7):
R E S R = Δ U 2 | I cell |
Therefore, it become obvious from Equation (7) that the voltage drop must be normalized by a factor of 2 in order to obtain reliable findings during application of the GCD method. In a Supplementary Data we performed an alternative approach for same demonstration, please have a look.

3.2. Validation of the Theoretical Expression Obtained for the Equivalent Series Resistance Using a Commercial Supercapacitor of 200 F

Figure 4 shows that the GCD curves obtained for a 200 F commercial supercapacitor (e.g., 2.7V D35H62 PTH S0016) as a function of the applied current (e.g., 1–2 A). For these high values of the applied currents the ΔUI ratio was constant (=25 mΩ) [23].
Figure 5a shows the Nyquist plot obtained for the 200 F commercial supercapacitor (experimental conditions: δU = 10 mV (peak-to-peak), Ud.c. = 0 V, and Δf = 10 kHz to 10 mHz). The impedance data of a real electric double-layer capacitor (EDLC) were quite different from the impedance response of a conventional (passive) capacitor due to the presence of the frequency dispersion phenomenon [4,17]. In fact, as discussed earlier by Conway [4], the EDLCs composed of high surface area porous carbon materials cannot be represented by a simple capacitance or even by a simple RC circuit due to the influence of the ions in conjunction with the porous behavior exhibited by the electrode material, i.e., the high-frequency voltage hardly penetrates inside the narrow pores while the low-frequency voltage penetrates inside the porous electrode structure.
Figure 5a shows that at high frequencies the Nyquist plot was characterized by a semicircle which indicates the existence of a Faradaic leakage resistance in parallel with a capacitive element as a consequence of the contributions from the pseudocapacitance associated with surface redox functionalities present at the interfaces and/or edges of carbon particles [5]. Obviously, in practice, the RESR-value is obtained at very high frequencies from extrapolation on the real axis of the Nyquist plot. Thus, it was verified in the present case that RESR = 22 mΩ, which is in good agreement with that of 25 mΩ obtained in this work using the classical GCD method.
At moderate frequencies, there was a linear region in the Nyquist plot with a phase angle of approximately −45°, which indicates the presence of electrochemically active pores in the electrode structure. This characteristic behavior exhibited by porous electrodes was previously discussed in the literature [6]. On the contrary, the existence of a Warburg impedance (W), which is also characterized by a phase angle of approximately −45°, indicates that the electrochemical process is diffusion controlled during oxidation/reduction of the surface redox functionalities. In these different cases, the charge storage process is distributed over a network of R and C elements commonly represented by a semi-infinite transmission line of continuously connected R and C components. Despite the these considerations, one has in the special case of EDLCs characterized by a phase angle at high-frequencies of approximately −45° that is more plausible from the physicochemical viewpoint to consider the major influence of the porous electrode structure instead of a mass-transport controlled process since the real influence of the pseudocapacitance caused by the surface redox functionalities can be negligible in comparison with the purely electrostatic capacitance caused by the accumulation of the ions at the electrode/solution interface.
In addition, the analysis of the experimental findings obtained at low frequencies (see Figure 5a) revealed the presence of an inclined capacitive line. In fact, this behavior is predicted by the De Levie’s model representing the electrochemical response of porous electrodes [7]. Considering the presence of non-idealities due to the frequency dispersion phenomenon, the inclined capacitive line can be represented by a R*-CPE circuit model where ZCPE = 1/Yo()n and n ≅ 1. In this case, R* contains information about the electrolyte resistance inside the pores while the parameter Yo represents the non-ideal capacitance.
Figure 5b shows the RESR-values obtained from the GCD method as a function of the applied current. As it can be seen, a stationary value of 25 mΩ was obtained for applied currents higher than 1 A. These findings are in agreement with the experimental value of 22 mΩ obtained using the EIS technique. It must be emphasized that for an applied current lower than 1 A the RESR values were overestimated in comparison with those obtained with the EIS technique. Therefore, the present study suggests that reliable values of the RESR must be obtained in the case of the GCD method using different currents in order to verify a stationary (constant) value. To the best of our knowledge, this important issue regarding the influence of the applied current on the RESR values has not been addressed in the literature.

4. Conclusions

From the theoretical analysis of a canonic circuit model an Ohm-like equation was deduced for the determination of the equivalent series resistance (RESR) using the galvanostatic charge–discharge method. It was verified that the voltage drop must be normalized by a factor of two in order to obtain meaningful findings. The present work compared the applications of the electrochemical impedance spectroscopy (EIS) technique and galvanostatic charge/discharge (GCD) method in order to determine the value of the equivalent series resistance (RESR) present in electric double-layer capacitors (EDLCs). The derived equation was applied to obtain the RESR of a 200 F commercial supercapacitor.
In principle, the theoretical treatment presented in this work is strictly valid for EDLCs, i.e., where the battery-like Faradaic reactions are absent. Therefore, we may find discrepancies during the analysis of the experimental findings obtained for pseudocapacitors (PCs) where solid-state surface redox reactions occur. Further complications can also appear in the case of asymmetric capacitors since in these cases the positive and negative electrodes are not identical (i.e., they are composed of dissimilar materials).

Supplementary Materials

The following are available online.

Author Contributions

R.V. deduced the major equations, prepared all Figures, and experiments. E.P.C.J., W.G.N. and Leonardo confirm the theoretical analysis from R.V., L.M.D.S. helped in the development of the theoretical analysis. L.M.D.S. and H.Z. coordinate manuscript presentation and writing. T.A.A. prepares Figure 3 and simulation.

Funding

The authors are very grateful to financial support from the Brazilian funding agencies CNPq (301486/2016-6 DT-2 grant), FAPESP (2014/02163-7, 2017/011958-1), FAEPEX 2426/17, and CAPES (1740195). L.M. Da Silva wishes to thank the “Fundação ao Amparo à Pesquisa do Estado de Minas Gerais–FAPEMIG” (Project CEX-112-10), “Secretaria de Estado de Ciência, Tecnologia e Ensino Superior de Minas Gerais-SECTES/MG” (Support for the LMMA Laboratory), and “Conselho Nacional de Desenvolvimento Científico e Tecnológico–CNPq” (PQ-2 grant). The authors gratefully acknowledge support from Shell and the strategic importance of the support given by ANP (Brazil’s National Oil, Natural Gas and Biofuels Agency) through the R&D levy regulation.

Acknowledgments

We wish to thank student Lenon H. Costa for all discussions involving this topic.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Schematic representation of (a) the complex-plane plots and (b) the galvanostatic charge-discharge curves evidencing the voltage drop (Udrop). The inset in Figure 1a shows the canonic circuit model. Simulation was carried out considering different values of the RESR and RL = 1 MΩ.
Figure 1. Schematic representation of (a) the complex-plane plots and (b) the galvanostatic charge-discharge curves evidencing the voltage drop (Udrop). The inset in Figure 1a shows the canonic circuit model. Simulation was carried out considering different values of the RESR and RL = 1 MΩ.
Molecules 24 01452 g001
Figure 2. Electric circuits containing the canonic equivalent circuit model representing the electrochemical behavior of electric double layer capacitors during the charging and discharging processes carried out at constant current. Definitions: Icell is the constant current applied; RESR is the equivalent series resistance; RL is the leakage resistance; CEDL represents the equivalent capacitance of the symmetric coin cell; Ucell is the overall cell voltage and USC0 is the voltage across the CEDL when the capacitor is fully charged.
Figure 2. Electric circuits containing the canonic equivalent circuit model representing the electrochemical behavior of electric double layer capacitors during the charging and discharging processes carried out at constant current. Definitions: Icell is the constant current applied; RESR is the equivalent series resistance; RL is the leakage resistance; CEDL represents the equivalent capacitance of the symmetric coin cell; Ucell is the overall cell voltage and USC0 is the voltage across the CEDL when the capacitor is fully charged.
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Figure 3. Simulation of the galvanostatic charge–discharge curves using different values of RESR. Conditions: RESR = 0, 0.01, and 0.1 Ω; RL = 1.0 MΩ; and CEDL = 0.1 F. The anodic (positive) and cathodic (negative) currents were alternated between +1 A and −1 A, respectively.
Figure 3. Simulation of the galvanostatic charge–discharge curves using different values of RESR. Conditions: RESR = 0, 0.01, and 0.1 Ω; RL = 1.0 MΩ; and CEDL = 0.1 F. The anodic (positive) and cathodic (negative) currents were alternated between +1 A and −1 A, respectively.
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Figure 4. Experimental GCD curves obtained for a 200F commercial supercapacitor (2.7V D35H62 PTH S0016) as a function of the applied current.
Figure 4. Experimental GCD curves obtained for a 200F commercial supercapacitor (2.7V D35H62 PTH S0016) as a function of the applied current.
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Figure 5. (a) Nyquist plot obtained for the commercial supercapacitor of 200 F. (b) Equivalent series resistance obtained from the GCD method as a function of the applied current.
Figure 5. (a) Nyquist plot obtained for the commercial supercapacitor of 200 F. (b) Equivalent series resistance obtained from the GCD method as a function of the applied current.
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MDPI and ACS Style

Vicentini, R.; Da Silva, L.M.; Cecilio Junior, E.P.; Alves, T.A.; Nunes, W.G.; Zanin, H. How to Measure and Calculate Equivalent Series Resistance of Electric Double-Layer Capacitors. Molecules 2019, 24, 1452. https://doi.org/10.3390/molecules24081452

AMA Style

Vicentini R, Da Silva LM, Cecilio Junior EP, Alves TA, Nunes WG, Zanin H. How to Measure and Calculate Equivalent Series Resistance of Electric Double-Layer Capacitors. Molecules. 2019; 24(8):1452. https://doi.org/10.3390/molecules24081452

Chicago/Turabian Style

Vicentini, Rafael, Leonardo Morais Da Silva, Edson Pedro Cecilio Junior, Thayane Almeida Alves, Willian Gonçalves Nunes, and Hudson Zanin. 2019. "How to Measure and Calculate Equivalent Series Resistance of Electric Double-Layer Capacitors" Molecules 24, no. 8: 1452. https://doi.org/10.3390/molecules24081452

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