MDPI - Publisher of Open Access Journals

16 pages, 5114 KB

Open AccessArticle

A Low-Voltage, Ultra-Low-Power, High-Gain Operational Amplifier Design for Portable Wearable Devices

by Na Bai, Xiaolong Li and Yaohua Xu

Electronics 2022, 11(1), 74; https://doi.org/10.3390/electronics11010074 - 27 Dec 2021

Cited by 11 | Viewed by 11853

Based on the SMIC 0.13 um CMOS technology, this paper uses a 0.8 V supply voltage to design a low-voltage, ultra-low-power, high-gain, two-stage, fully differential operational amplifier. Through the simulation analysis, when the supply voltage is 0.8 V, the design circuit meets the ultra-low power consumption and also has the characteristic of high gain. The five-tube, fully differential, and common-source amplifier circuits provide the operational amplifier with high gain and large swing. Unlike the traditional common-mode feedback, this paper uses the output of the common-mode feedback as the bias voltage of the five-tube operational transconductance amplifier load, which reduces the design cost of the circuit; the structure involves self-cascoding composite MOS, which makes the common-mode feedback loop more sensitive. The frequency compensation circuit adopts Miller compensation technology with zero-pole separation, which increases the stability of the circuit. The input of the circuit uses the current mirror. A small reference current is chosen to reduce power consumption. A detailed performance simulation analysis of this operational amplifier circuit is carried out on the Cadence spectre platform. The open-loop gain of this operational amplifier is 74.1 dB, the phase margin is 61°, the output swing is 0.7 V, the common-mode rejection ratio is 109 dB, and the static power consumption is only 11.2 uW. Full article

(This article belongs to the Collection Analog IC Design—Analog and RF Interface for Electronic Systems)

► Show Figures

Figure 1

18 pages, 2018 KB

Open AccessArticle

A 1.9 nW, Sub-1 V, 542 pA/V Linear Bulk-Driven OTA with 154 dB CMRR for Bio-Sensing Applications

by Rafael Sanchotene Silva, Luis Henrique Rodovalho, Orazio Aiello and Cesar Ramos Rodrigues

J. Low Power Electron. Appl. 2021, 11(4), 40; https://doi.org/10.3390/jlpea11040040 - 20 Oct 2021

Cited by 16 | Viewed by 5141

Abstract

In this paper, a new technique for improvement on the DC voltage gain, while keeping the high-linearity in symmetrical operational transconductance amplifier (OTA) bulk-driven (BD) topology is proposed. These features are achieved by allying two topological solutions: enhanced forward-body-biasing self-cascode current mirror, and source degeneration. The proposed concept is demonstrated through simulations with typical process parameters and Monte Carlo analysis on nominal transistors of the CMOS TSMC 180 nm node. Results indicate that the proposed OTA can achieve a very small transconductance, only 542 pA/V while keeping a voltage gain higher than 60 dB, 150 dB CMRR, and high linearity of 475 mVpp (1% THD), consuming only 1.9 nW for a supply voltage of 0.6 V. This set of features allows the proposed OTA to be an attractive solution for implementing OTA-C filters for the analog front-ends in wearable devices and bio-sensing. Full article

(This article belongs to the Special Issue Ultra-Low-Power ICs for the Internet of Things)

► Show Figures

Figure 1

19 pages, 7007 KB

Open AccessArticle

Power Efficient Fully Differential Bulk Driven OTA for Portable Biomedical Application

by Saleha Bano, Ghous Bakhsh Narejo and Syed Muhammad Usman Ali Shah

Electronics 2018, 7(3), 41; https://doi.org/10.3390/electronics7030041 - 20 Mar 2018

Cited by 20 | Viewed by 9462

Abstract

This paper presents a power efficient, bulk driven, source degenerated fully differential operational transconductance amplifier (OTA), operating in the subthreshold region. The input part of the OTA consists of a bulk driven source degenerated differential pair and cross coupled transistors to improve the linearity of OTA. It consists of a bulk driven pair to reduce the supply voltage and to improve the linearity. The proposed fully differential OTA has utilized self-cascode current mirror loads which increases the output impedance and hence the overall intrinsic gain. A subthreshold region is adopted to reduce the power consumption of the circuit. For a 200 mVpp sinusoidal input at 100 Hz, a total harmonic distortion (THD) of −58.56 dB is achieved. The gain, gain bandwidth (GBW), phase margin (PM) and gain margin (GM) values obtained were 48.4 dB, 3.1 KHz, 80° and 19.01 dB, respectively. The common mode rejection ratio (CMRR), power supply rejection ratio (PSRR) and slew rate +/− values were 146.3 dB, 83 dB and 99.56/100 V/ms, respectively. The circuit is capable of operating under a supply voltage of 0.8 V with a power consumption of 59.04 nW, which proves that the circuit is suitable for portable biomedical devices. The proposed circuit is simulated in CADENCE environment virtuoso using LFoundry 150 nm Complementary metal oxide semiconductor (CMOS) process technology. Full article

► Show Figures

Figure 1

Search Results (3)

Further Information

Guidelines

MDPI Initiatives

Follow MDPI

Saved Queries

Search Filter Reset All

Years

Feature Papers

Subjects

Journals

Article Types

Countries / Regions

Search Results (3)

Further Information

Guidelines

MDPI Initiatives

Follow MDPI