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13 pages, 8938 KiB

Open AccessCommunication

A Q-Band CMOS Image-Rejection Receiver Integrated with LO and Frequency Dividers

by Hyunkyu Lee and Sanggeun Jeon

Electronics 2023, 12(14), 3069; https://doi.org/10.3390/electronics12143069 - 13 Jul 2023

Viewed by 1951

This paper presents a Q-band image-rejection receiver using a 65 nm CMOS technology. For a high image-rejection ratio (IMRR), the Q-band receiver employs the Hartley architecture which consists of a Q-band low-noise amplifier, two down-conversion mixers, a 90° hybrid coupler, and two IF baluns. In addition, a Q-band fundamental voltage-controlled oscillator (VCO) and a frequency divider chain divided by 256 are integrated into the receiver for LO. A charge injection technique is employed in the mixers to reduce the DC power while maintaining a high conversion gain and linearity. The VCO adopts a cross-coupled topology to secure stable oscillation with high output power in the Q-band. The frequency divider chain is composed of an injection-locked frequency divider (ILFD) and a multi-stage current-mode logic (CML) divider to achieve a high division ratio of 256, which facilitates the LO signal locking to an external phase-locked loop. An inductive peaking is employed in the ILFD to widen the locking range. The Q-band image-rejection receiver exhibits a peak conversion gain of 16.4 dB at 43 GHz. The IMRR is no less than 35.6 dBc at the IF frequencies from 1.5 to 5 GHz. Full article

(This article belongs to the Special Issue Recent Advances in RF and Millimeter-Wave Design Techniques)

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11 pages, 14271 KiB

Open AccessArticle

A Wide-Band Divide-by-2 Injection-Locked Frequency Divider Based on Distributed Dual-Resonance Tank

by Zhao Xing, Yiming Yu and Kai Kang

Electronics 2022, 11(4), 506; https://doi.org/10.3390/electronics11040506 - 9 Feb 2022

Viewed by 1928

Abstract

A wide-band divide-by-2 injection-locked frequency divider (ILFD) based on a distributed dual-resonance high-order tank is presented. The ILFD employs a distributed LC network as the dual resonance tank and achieves an ultra-wide locking range. Fabricated in a 65 nm 1P7M LP-CMOS process, the divide-by-2 ILFD consumes 7 mW from a 0.7 V power supply and realizes a locking range of 87.0%, from 13 GHz to 33 GHz. The core circuit occupies an area of 0.22 mm × 0.5 mm. Full article

(This article belongs to the Special Issue Millimeter-Wave Integrated Circuits and Systems for 5G Applications)

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17 pages, 4791 KiB

Open AccessArticle

An 18.8–33.9 GHz, 2.26 mW Current-Reuse Injection-Locked Frequency Divider for Radar Sensor Applications

by Kwang-Il Oh, Goo-Han Ko, Jeong-Geun Kim and Donghyun Baek

Sensors 2021, 21(7), 2551; https://doi.org/10.3390/s21072551 - 6 Apr 2021

Cited by 6 | Viewed by 3383

Abstract

An 18.8–33.9 GHz, 2.26 mW current-reuse (CR) injection-locked frequency divider (ILFD) for radar sensor applications is presented in this paper. A fourth-order resonator is designed using a transformer with a distributed inductor for wideband operating of the ILFD. The CR core is employed to reduce the power consumption compared to conventional cross-coupled pair ILFDs. The targeted input center frequency is 24 GHz for radar application. The self-oscillated frequency of the proposed CR-ILFD is 14.08 GHz. The input frequency locking range is from 18.8 to 33.8 GHz (57%) at an injection power of 0 dBm without a capacitor bank or varactors. The proposed CR-ILFD consumes 2.26 mW of power from a 1 V supply voltage. The entire die size is 0.75 mm × 0.45 mm. This CR-ILFD is implemented in a 65 nm complementary metal-oxide semiconductor (CMOS) technology. Full article

(This article belongs to the Special Issue Advanced CMOS Integrated Circuit Design and Application)

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12 pages, 3158 KiB

Open AccessArticle

A V-Band Phase-Locked Loop with a Novel Phase-Frequency Detector in 65 nm CMOS

by Waseem Abbas, Zubair Mehmood and Munkyo Seo

Electronics 2020, 9(9), 1502; https://doi.org/10.3390/electronics9091502 - 13 Sep 2020

Cited by 8 | Viewed by 4215

Abstract

A 65–67 GHz phase-locked loop (PLL) with a novel low power phase-frequency detector (PFD) in 65 nm LP CMOS is presented. The PLL consists of a V-band voltage-controlled oscillator (VCO), a divide-by-two injection-locked frequency divider (ILFD), and a current-mode logic (CML) divider chain. A charge pump (CP) and a 2nd-order loop filter are used with PFD for VCO tuning. The PFD is implemented with 16 transistors with dead-zone-free capability. The measured locking range of the PLL is from 65.15 to 67.4 GHz, with −11.5 dBm measured output power at 66.05 GHz while consuming 88 mW. The measured phase noise at 1 MHz offset is −84.43 dBc/Hz. The chip area of the PLL is 0.84 mm

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including probing pads. The proposed PLL can be utilized as a frequency synthesizer for carrier signal generation in IEEE 802.11ad standard high data rate transceiver circuits. Full article

(This article belongs to the Special Issue Microwave Integrated Circuits Design and Application)

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16 pages, 290 KiB

Open AccessArticle

Evaluating the Spectrum of Unlocked Injection Frequency Dividers in Pulling Mode

by Antonio Buonomo and Alessandro Lo Schiavo

Entropy 2013, 15(10), 4026-4041; https://doi.org/10.3390/e15104026 - 25 Sep 2013

Cited by 1 | Viewed by 6004

Abstract

We study the phenomenon of periodic pulling which occurs in certain integrated microcircuits of relevant interest in applications, namely the injection-locked frequency dividers (ILFDs). They are modelled as second-order driven oscillators working in the subharmonic (secondary) resonance regime, i.e., when the self-oscillating frequency is close (resonant) to an integer submultiple n of the driving frequency. Under the assumption of weak injection, we find the spectrum of the system’s oscillatory response in the unlocked mode through closed-form expressions, showing that such spectrum is double-sided and asymmetric, unlike the single-sided spectrum of systems with primary resonance (n=1). An analytical expression for the amplitude modulation of the oscillatory response is also presented. Numerical results are presented to support theoretical relations derived. Full article

(This article belongs to the Special Issue Dynamical Systems)

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