Search Results (7)

Wafer map defect classification plays a critical role in yield monitoring and root-cause analysis in semiconductor manufacturing. Although recent convolutional neural network (CNN)-based approaches have achieved high classification accuracy, most existing models are evaluated primarily on clean datasets and remain vulnerable to unseen perturbations and representation-level variability at test time. In this paper, we propose a hybrid CNN–echo state network (ESN) architecture that integrates spatial feature extraction with sequential aggregation to enhance robustness under input perturbations. The CNN backbone extracts two-dimensional feature maps, which are converted into ordered sequences using a multidirectional scanline strategy and processed by an ESN reservoir. The resulting sequential representations are combined with CNN features through a class-specific adaptive fusion mechanism. Using the defect-only eight-class version of the WM-811K dataset, we systematically evaluate robustness under multiple perturbation scenarios, with particular focus on the clean train/noisy test (CT-NT) setting. To ensure a controlled robustness evaluation aligned with the binary nature of wafer map data, we introduce binary-consistent die-flip perturbations and additionally employ additive Gaussian perturbations as a representation-level stress test. Under clean-data conditions, the proposed model showed a 0.61 pp improvement in test accuracy compared to the ResNet34-based CNN, with notably larger gains for rare classes and defect types exhibiting strong structural patterns. In the clean train/noisy test scenario, where the model was trained on clean wafer map data and evaluated under controlled test-time perturbations, the accuracy of the CNN baseline dropped to 77.59% at $\sigma$ = 0.10, whereas the proposed hybrid model maintained an accuracy of 87.30%, resulting in an absolute improvement of 9.71 pp. Per-class analysis reveals that the robustness gain is class-dependent, with pronounced improvements for defect types exhibiting clear and repetitive structural patterns, such as Loc and Edge-Ring. Further mechanistic analysis demonstrates that the robustness improvement arises from enhanced representation stability and bounded reservoir dynamics, rather than from changes in CNN feature extraction or training regularization. These results demonstrate that the proposed CNN-ESN hybrid architecture provides meaningful advantages in terms of robustness under noisy evaluation conditions without requiring noise-aware training or prior knowledge of perturbation characteristics. Full article

The die bonding process significantly impacts the yield and quality of IC packaging, and its quality detection is also a critical image sensing technology. With the advancement of machine automation and increased operating speeds, the misclassification rate in die bond image inspection has also risen. Therefore, this study develops a high-speed intelligent vision inspection model that slightly improves classification accuracy and adapts to the operation of new-generation machines. Furthermore, by identifying the causes of die bonding defects, key process parameters can be adjusted in real time during production, thereby improving the yield of the die bonding process and substantially reducing manufacturing cost losses. Previously, we proposed a lightweight model named DSGβSI-YOLOv7-tiny, which integrates depthwise separable convolution, Ghost convolution, and a Sigmoid activation function with a learnable β parameter. This model enables real-time and efficient detection and prediction of die bond quality through image sensing. We further enhanced the previous model by incorporating an SE layer, ECA-Net, Coordinate Attention, and a Small Object Enhancer to accommodate the faster operation of new machines. This improvement resulted in a more lightweight architecture named DSGβSI-SECS-YOLOv7-tiny. Compared with the previous model, the proposed model achieves an increased inference speed of 294.1 FPS and a Precision of 99.1%. Full article

With increasing wafer sizes and diversifying die patterns, automated optical inspection (AOI) is progressively replacing traditional visual inspection (VI) for wafer defect detection. Yet, the defect classification efficacy of current AOI systems in our case company is not optimal. This limitation is due to the algorithms’ reliance on expertly designed features, reducing adaptability across various product models. Additionally, the limited time available for operators to annotate defect samples restricts learning potential. Our study introduces a novel hybrid self-training algorithm, leveraging semi-supervised learning that integrates pseudo-labeling, noisy student, curriculum labeling, and the Taguchi method. This approach enables classifiers to autonomously integrate information from unlabeled data, bypassing the need for feature extraction, even with scarcely labeled data. Our experiments on a small-scale set show that with 25% and 50% labeled data, the method achieves over 92% accuracy. Remarkably, with only 10% labeled data, our hybrid method surpasses the supervised DenseNet classifier by over 20%, achieving more than 82% accuracy. On a large-scale set, the hybrid method consistently outperforms other approaches, achieving up to 88.75%, 86.31%, and 83.61% accuracy with 50%, 25%, and 10% labeled data. Further experiments confirm our method’s consistent superiority, highlighting its potential for high classification accuracy in limited-data scenarios. Full article

Defect pattern analysis of wafer bin maps (WBMs) is an important means of identifying process problems. Recently, automated analysis methods using machine learning or deep learning have been studied as alternatives to manual classification by engineers. In this paper, we propose a method to improve the feature extraction performance of defect patterns by transforming the polar coordinate system instead of the existing WBM image input. To reduce the variability of the location representation, defect patterns in the Cartesian coordinate system, where the location of the distributed defect die is not constant, were converted to a polar coordinate system. The CNN classifier, which uses polar coordinate transformed input, achieved a classification accuracy of 91.3%, which is 4.8% better than the existing WBM image-based CNN classifier. Additionally, a tree-structured classifier model that sequentially connects binary classifiers achieved a classification accuracy of 94%. The method proposed in this paper is also applicable to the defect pattern classification of WBMs consisting of different die sizes than the training data. Finally, the paper proposes an automated pattern classification method that uses individual classifiers to learn defect types and then applies ensemble techniques for multiple defect pattern classification. This method is expected to reduce labor, time, and cost and enable objective labeling instead of relying on subjective judgments of engineers. Full article

This article presents an automated vision-based algorithm for the die-scale inspection of wafer images captured using scanning acoustic tomography (SAT). This algorithm can find defective and abnormal die-scale patterns, and produce a wafer map to visualize the distribution of defects and anomalies on the wafer. The main procedures include standard template extraction, die detection through template matching, pattern candidate prediction through clustering, and pattern classification through deep learning. To conduct the template matching, we first introduce a two-step method to obtain a standard template from the original SAT image. Subsequently, a majority of the die patterns are detected through template matching. Thereafter, the columns and rows arranged from the detected dies are predicted using a clustering method; thus, an initial wafer map is produced. This map is composed of detected die patterns and predicted pattern candidates. In the final phase of the proposed algorithm, we implement a deep learning-based model to determine defective and abnormal patterns in the wafer map. The experimental results verified the effectiveness and efficiency of our proposed algorithm. In conclusion, the proposed method performs well in identifying defective and abnormal die patterns, and produces a wafer map that presents important information for solving wafer fabrication issues. Full article

A wafer bin map (WBM), which is the result of an electrical die-sorting test, provides information on which bins failed what tests, and plays an important role in finding defective wafer patterns in semiconductor manufacturing. Current wafer inspection based on WBM has two problems: good/bad WBM classification is performed by engineers and the bin code coloring scheme does not reflect the relationship between bin codes. To solve these problems, we propose a neural network-based bin coloring method called Bin2Vec to make similar bin codes are represented by similar colors. We also build a convolutional neural network-based WBM classification model to reduce the variations in the decisions made by engineers with different expertise by learning the company-wide historical WBM classification results. Based on a real dataset with a total of 27,701 WBMs, our WBM classification model significantly outperformed benchmarked machine learning models. In addition, the visualization results of the proposed Bin2Vec method makes it easier to discover meaningful WBM patterns compared with the random RGB coloring scheme. We expect the proposed framework to improve both efficiencies by automating the bad wafer classification process and effectiveness by assigning similar bin codes and their corresponding colors on the WBM. Full article

Extrusion is a very popular and multi-faceted manufacturing process. A large number of products for the automotive, aerospace, and construction sectors are produced through aluminum extrusion. Many defects in the extruded products occur because of the conditions of the dies and tooling. The problems in dies can be due to material issues, design and manufacturing, or severe usage. They can be avoided by maintaining the billet quality, by controlling the extrusion process parameters, and through routine maintenance. Die problems that occur on a day-to-day basis are mostly repairable and are rectified through various types of die correction operations. These defects and repair operations have not been reported in detail in the published literature. The current paper presents an in-depth description of repairable die defects and related die correction operations in metal extrusion. All major die defects are defined and classified, and their causes, preventive measures, and die correction operations are described. A brief frequency-based statistical study of die defects is also carried out to identify the most frequent die corrections. This work can be of direct benefit to plant engineers and operators and to researchers and academics in the field of metal extrusion. Full article