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Open AccessFeature PaperArticle

Kernel Mapping Methods of Convolutional Neural Network in 3D NAND Flash Architecture

by Min Suk Song, Hwiho Hwang, Geun Ho Lee, Suhyeon Ahn, Sungmin Hwang and Hyungjin Kim

Electronics 2023, 12(23), 4796; https://doi.org/10.3390/electronics12234796 - 27 Nov 2023

Cited by 4 | Viewed by 2789

A flash memory is a non-volatile memory that has a large memory window, high cell density, and reliable switching characteristics and can be used as a synaptic device in a neuromorphic system based on 3D NAND flash architecture. We fabricated a TiN/Al₂O₃/Si₃N₄/SiO₂/Si stack-based Flash memory device with a polysilicon channel. The input/output signals and output values are binarized for accurate vector-matrix multiplication operations in the hardware. In addition, we propose two kernel mapping methods for convolutional neural networks (CNN) in the neuromorphic system. The VMM operations of two mapping schemes are verified through SPICE simulation. Finally, the off-chip learning in the CNN structure is performed using the Modified National Institute of Standards and Technology (MNIST) dataset. We compared the two schemes in terms of various parameters and determined the advantages and disadvantages of each. Full article

(This article belongs to the Section Semiconductor Devices)

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13 pages, 2922 KB

Open AccessArticle

Proof-of-Principle of a Cherenkov-Tag Detector Prototype

by Giuseppe Gallo, Domenico Lo Presti, Danilo Luigi Bonanno, Giovanni Bonanno, Paola La Rocca, Santo Reito, Francesco Riggi and Giuseppe Romeo

Sensors 2020, 20(12), 3437; https://doi.org/10.3390/s20123437 - 18 Jun 2020

Cited by 3 | Viewed by 3393

Abstract

In a recent paper, the authors discussed the feasibility study of an innovative technique based on the directionality of Cherenkov light produced in a transparent material to improve the signal to noise ratio in muon imaging applications. In particular, the method was proposed to help in the correct identification of incoming muons direction. After the first study by means of Monte Carlo simulations with Geant4, the first reduced scale prototype of such a detector was built and tested at the Department of Physics and Astronomy "E. Majorana" of the University of Catania (Italy). The characterization technique is based on muon tracking by means of the prototype in coincidence with two scintillating tiles. The results of this preliminary test confirm the validity of the technique and stressed the importance to enhance the Cherenkov photons production to get a signal well distinguishable with respect to sensors and electronic noise. Full article

(This article belongs to the Section Physical Sensors)

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14 pages, 2057 KB

Open AccessArticle

Models and Techniques for Temperature Robust Systems on a Reconfigurable Platform

by Sahil Shah, Hakan Toreyin, Jennifer Hasler and Aishwarya Natarajan

J. Low Power Electron. Appl. 2017, 7(3), 21; https://doi.org/10.3390/jlpea7030021 - 30 Aug 2017

Cited by 14 | Viewed by 8493

Abstract

This paper investigates the variability of various circuits and systems over temperature and presents several methods to improve their performance over temperature. The work demonstrates use of large scale reconfigurable System-On-Chip (SOC) for reducing the variability of circuits and systems compiled on a Floating Gate (FG) based Field Programmable Analog Array (FPAA). Temperature dependencies of circuits are modeled using an open-source simulator built in the Scilab/XCOS environment and the results are compared with measurement data obtained from the FPAA. This comparison gives further insight into the temperature dependence of various circuits and signal processing systems and allows us to compensate as well as predict their behavior. Also, the work presents several different current and voltage references that could help in reducing the variability caused due to changes in temperature. These references are standard blocks in the Scilab/Xcos environment that could be easily compiled on the FPAA. An FG based current reference is then used for biasing a

12 \times 1

Vector Matrix Multiplication (VMM) circuit and a second order

G_{m} - C

bandpass filter to demonstrate the compilation and usage of these voltage/current reference in a reconfigurable fabric. The large scale FG FPAA presented here is fabricated in a 350 nm CMOS process. Full article

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