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Article

Parametric Design of an LCL Filter for Harmonic Suppression in a Three-Phase Grid-Connected Fifteen-Level CHB Inverter

1
Department of Electrical Engineering, University of Engineering and Technology, Lahore 54890, Pakistan
2
Faculty of Electrical Engineering and Computer Science, PIMSAT, Karachi 75350, Pakistan
3
Department of Electronic Engineering, Faculty of Engineering and Technology, Islamia University of Bahawalpur, Bahawalpur 63100, Pakistan
4
Department of Biomedical Engineering, Riphah International University, Islamabad 44000, Pakistan
5
Interdisciplinary Research Center for Intelligent Manufacturing & Robotics (IRC-IMR), KFUPM, Dhahran 31261, Saudi Arabia
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Designs 2026, 10(1), 6; https://doi.org/10.3390/designs10010006
Submission received: 5 November 2025 / Revised: 6 January 2026 / Accepted: 8 January 2026 / Published: 16 January 2026

Abstract

With the increasing integration of renewable energy sources into the grid, power quality at the point of common coupling (PCC)—particularly harmonic distortion introduced by power electronic converters—has become a critical concern. This paper presents a rigorous design and evaluation of a three-phase, fifteen-level cascaded H-bridge multilevel inverter (CHB MLI) with an LCL filter, selected for its superior harmonic attenuation, compact size, and cost-effectiveness compared to conventional passive filters. The proposed system employs Phase-Shifted Pulse Width Modulation (PS PWM) for balanced operation and low output distortion. A systematic, reproducible methodology is used to design the LCL filter, which is then tested across a wide range of switching frequencies (1–5 kHz) and grid impedance ratios (X/R = 2–9) in MATLAB/Simulink R2025a. Comprehensive simulations confirm that the filter effectively reduces both voltage and current total harmonic distortion (THD) to levels well below the 5% limit specified by IEEE 519, with optimal performance (0.53% current THD, 0.69% voltage THD) achieved at 3 kHz and X/R ≈ 5.6. The filter demonstrates robust performance regardless of grid conditions, making it a practical and scalable solution for modern renewable energy integration. These results, further supported by parametric validation and clear design guidelines, provide actionable insights for academic research and industrial deployment.

1. Introduction

In the modern era, there is an increasing interest in the production and the use of energy around the world. Pakistan is also putting a lot of effort towards the production of energy through smart methods. Among the different sources of energy such as fossil fuels, biogas, and nuclear energy, Renewable Energy Sources (RESs) are considered the best option [1,2,3], contributing towards Sustainable Energy Sources (SESs). RESs like biomass, solar, hydro, wind, etc., are gaining popularity due to the following reasons.
  • Accessibility.
  • Lower cost.
  • Environmentally friendly.
Wind and photovoltaic (PV) systems are leading examples of SESs extensively employed for electrical energy generation. Their appeal lies in their free and abundant availability [2]. Significant research is dedicated to efficiently converting these renewable sources into electrical power [4,5,6] for direct delivery to loads or grid integration. The growing utilization of RESs inherently increases the demand for power electronic converters [7,8]. These versatile converters handle various conversions (DC-DC, AC-AC, AC-DC, DC-AC) [9,10,11,12,13,14]. Specifically, different inverter topologies are vital for interfacing RESs with the grid [12,13]. Comparing conventional inverters with multilevel inverters (MLIs), the latter are preferred due to distinct advantages, including lower switching losses, reduced voltage stress, and improved electromagnetic interference characteristics [15,16]. This makes MLIs increasingly prominent for high-power and high-voltage applications [17]. The three primary categories of MLI topologies are diode-clamped (neutral-clamped), flying capacitor, and cascaded H-bridge (CHB). A drawback specific to the diode-clamped MLI is the need for diodes rated at different voltage levels [18].
Cascaded H-bridge (CHB) MLI is often preferred over Flying Capacitor (FC) and Diode Clamped (DC) MLIs due to several advantages. Unlike FC MLIs, which use bulky and expensive capacitors, or DC MLIs, which require clamping diodes [19], CHB eliminates the need for both. This simplification contributes to CHB’s primary benefits: ease of control, high reliability, and inherent modularity. Moreover, CHB requires the fewest semiconductor devices to achieve a desired voltage level, which translates to a lower overall cost, reduced power losses, and consequently, improved efficiency. The principal drawback of the CHB technique, however, is the necessity for an independent DC source for every H-bridge module [20]. The increasing integration of RESs near consumption points helps minimize losses associated with long transmission lines. This trend places greater focus on the distribution segment of the power system, which is critical for overall reliability and efficiency [21,22,23,24]. However, grid-connected systems operating within this segment are susceptible to undesirable disturbances at the point of common coupling (PCC), leading to voltage fluctuations and waveform distortions. Modern power systems are also becoming more sensitive due to the proliferation of electronic switching devices and controllers. To effectively interface renewable sources with the grid and mitigate these issues, grid-connected inverters, such as MLIs, are commonly used. These inverters rely on controllers that process feedback from their terminals to regulate desired output variables (voltage, current, power, DC voltage, etc.) [21,25]. This work implements a fifteen-level CHB MLI in MATLAB. For control, a Proportional–Integral (PI) controller is utilized to achieve zero steady-state error, with its proportional and integral gains tuned for optimal performance [26]. The gating signals for the MLI switches are generated by a modulator, which compares the reference signals from the controller with carrier signals. In high-power PV applications, power loss is a significant concern. Sinusoidal Pulse Width Modulation (SPWM) techniques are employed to minimize these losses, particularly switching losses, offering advantages such as low harmonics and better output voltage quality. SPWM methods are broadly classified into single-carrier and multicarrier techniques. Multicarrier PWM is particularly useful for regulating output voltages and reducing THD [27,28,29,30]. Among multicarrier methods, Phase-Shifted (PS) PWM is advantageous over Level-Shifted (LS) PWM because it promotes even power distribution [31,32,33]. The research detailed here involves simulating the Phase-Shifted Pulse Width Modulation (PS PWM) method within the MATLAB environment for a three-phase grid-connected inverter featuring a fifteen-level CHB architecture. Grid-interfaced inverters naturally introduce harmonic content through the process of Pulse Width Modulation switching, thus requiring a low-pass power filter (LPF) positioned between the inverter and the utility grid to attain the desired quality of output power. Passive filters (PFs) are frequently utilized for this function, primarily due to their economic advantages, and they prove effective in mitigating harmonics at the point of common coupling (PCC). Typical arrangements for passive filters comprise the L (first order), LC (second order), and LCL (third order) filter configurations. The L filter, which is composed solely of an inductor, is straightforward in its design and suitable for low-power converters operating at high switching frequencies, yet it encounters difficulties with resonance and applications requiring higher power levels. The LC filter, which incorporates both an inductor and a capacitor, offers enhanced damping relative to the L filter and possesses a comparatively simple design, though its resonance frequency is impacted by the grid impedance once connected [34]. Designing it requires balancing the values of inductance and capacitance; increasing the capacitance can improve the voltage quality, while inductance is adjusted to achieve the necessary cutoff frequency. The LCL filter, although not optimal for operation at low switching frequencies, effectively isolates the system from the grid impedance and achieves substantial reduction in harmonics using smaller inductance values compared to either L or LC filters [35,36]. Significant levels of harmonic distortion and drops in voltage can cause serious deterioration in performance and potentially lead to the power system shutting down. Therefore, this investigation focuses on designing a particular LCL filter aimed at minimizing these harmonic distortions present at the output of the MLI, thereby producing an output waveform that is nearly sinusoidal and enhancing overall system performance. The study additionally investigates how varying switching frequencies and differing grid characteristics (categorized as weak grids with a high X/R ratio versus strong grids with a low X/R ratio [37]) influence the effectiveness of harmonic filtering. Figure 1 illustrates the schematic representation of the system connected to the grid.

2. System Architecture

The MATLAB implementation of the system model for a three-phase, fifteen-level CHB grid-tied MLI is shown in Figure 1.

2.1. Fifteen-Level CHB MLI

In this paper, the three-phase fifteen-level CHB MLI is implemented on MATLAB as shown in Figure 2. Consisting of seven series-connected submodules per phase, the CHB MLI simulated here generates fifteen output voltage levels, calculated as (2 * number of submodules) + 1. Each submodule is based on a universal bridge containing a four-switch H-bridge. Switch gate signals originate from a modulation block, and the DC input voltage for each submodule is determined by the following equation. For
  • U = DC voltage,
  • V p = peak AC voltage, and
  • k = scaling factor (number of submodules per phase in the cascaded H-bridge multilevel inverter)
Figure 2. Simulation block of three-phase fifteen-level CHB MLI in Simulink.
Figure 2. Simulation block of three-phase fifteen-level CHB MLI in Simulink.
Designs 10 00006 g002
The relationship between these variables is given by
U = V p k
If the peak AC voltage V p is expressed in terms of the RMS AC voltage V r m s , then
V p = 2 × V r m s .
Substituting this into the equation for U gives
U = 2 × V r m s k
In other words,
U = V k 2 3 1 / 2
In addition to the MATLAB/Simulink simulation setup shown in Figure 2, the equivalent single-phase circuit diagram depicted in Figure 3 provides a concrete visualization of the seven series-connected H-bridge submodules per phase that generate the fifteen voltage levels used in the multilevel inverter topology.

2.2. Modulation Block

The PS PWM scheme is implemented in the modulation block of the simulation, as shown in Figure 4.
The modulation block consists of thee PWM generators for three phases. In this scheme, the numbers of carrier signals, having some shift on the horizontal axis, are used. For CHB MLI switches, PWM signals are created by comparing the carrier signals with the modulating signals. In this research, PS PWM topology for fifteen-level CHB MLI is implemented on MATLAB/SIMULINK. The carrier signals in the PS PWM technique are shifted by an angle of
θ = 2 π ( N 1 ) ,
where N represents the number of voltage levels in MLI, i.e., fifteen.
θ = 2 π ( 15 1 ) 0.448 rad ( or 25 . 7 ° ) ,
This means the triangular carrier signals used for PWM in each submodule are phase-shifted by about 25 . 7 ° relative to each other to reduce harmonic distortion and improve output waveform quality
θ mutual = ( 1 / ν s ) 2 k .
Here, θ mutual represents the mutual phase shift of the carrier waves of submodules in seconds, k is the number of submodules which is seven in this simulation, and ν s represents the switching frequency or carrier frequency. The internal model of the individual phase of the PWM generator implemented on MATLAB is shown in Figure 5.

2.3. Controller

This research employs a PI controller designed in the synchronous ( d q ) frame to generate the voltage reference ( V s e t ) for the Phase-Shifted Pulse Width Modulation (PS PWM) of a CHB MLI. The control strategy requires transforming the measured abc currents to the d q frame using a synchronization angle θ which is produced by the Phase-Locked Loop (PLL). In the d q frame, these measured currents are compared against reference currents ( i d , i q ) that dictate the desired active and reactive power (active power by d-current, reactive by q-current). The error signals are processed by two dedicated PI controllers (one for d, one for q) whose gains ( k p , k i ) are tuned for optimal performance. The outputs of the PI controllers ( v d , v q ) are then transformed/restored to the abc system to yield V s e t . The design is complex due to the frame transformations and the use of two separate controllers. Figure 6 illustrates the control strategy, and  V s e t is used for the PS PWM implementation in MATLAB.
To mathematically describe the transformation of the measured three-phase currents ( i a , i b , i c ) into the synchronous d q frame, the Park transformation is applied using the synchronization angle θ obtained from the PLL:
i d i q = 2 3 cos θ cos θ 2 π 3 cos θ + 2 π 3 sin θ sin θ 2 π 3 sin θ + 2 π 3 i a i b i c
This transformation converts the three-phase currents into two orthogonal components:
1.
i d , which controls the active power component, and 
2.
i q , which controls the reactive power component.
The error signals between the reference and measured currents in the d q frame are then processed by the PI controllers, for example, in the d-axis:
v d ( t ) = k p e d ( t ) + k i e d ( t ) d t ,
where
e d ( t ) = i d , r e f ( t ) i d ( t ) ,
is the error signal, and  k p and k i are the proportional and integral gains, respectively.
The outputs v d and v q are transformed back into the a b c frame to generate the voltage reference V r e f used in the PS PWM scheme. The controlled inverter output now requires an LCL filter for grid interfacing.

2.4. PI Controller Parameter Selection

The PI controller operates in the synchronous dq-frame for independent active ( i d ) and reactive ( i q ) current regulation. Identical gains were selected for both axes based on standard tuning practices for grid-connected inverters.
These conservative values shown in Table 1 ensure:
  • Stability: Phase margin > 45 ° , gain margin > 6 dB (Bode analysis);
  • Performance: Settling time < 20 ms, overshoot < 10 % ;
  • Robustness: Effective across ± 20 % grid impedance variation.
Table 1. PI controller gains and performance metrics.
Table 1. PI controller gains and performance metrics.
Axis K p K i
d-axis (active power)0.550
q-axis (reactive power)0.550
The gains follow established guidelines for LCL-filtered systems [10]: K p 0.5 L e q f s w / 10 , K i 10 ω g , where L e q = L a + L b = 1.3 mH. Simulation verification confirmed perfect grid synchronization (zero steady-state error) and no impact on achieved THD levels (0.53% current, 0.69% voltage).

2.5. Proposed Three-Phase LCL Filter Design Procedure

In order to suppress voltage and current harmonics at the point of common coupling (PCC) linking the three-phase CHB MLI to the grid, an output filter is required. This study proposes and implements a wye topology LCL filter. LCL filters are generally favored over simple L or RL filters due to their ability to provide higher harmonic attenuation and smoother inverter output voltages and currents. Advantages of the LCL filter topology also include reduced weight, cost, and component size [24]. Notably, they can achieve better performance with smaller inductor and capacitor values at power levels up to hundreds of kilowatts [25]. This paper employs the wye LCL filter alongside the PS PWM technique. This combination is designed to minimize voltage and current distortion injected into the utility grid. The structure of the proposed wye-connected LCL filter, as simulated in MATLAB, is shown in Figure 7, with L1 and L2 linked with the grid and inductor.
To effectively suppress voltage and current harmonics at PCC, the design and implementation of a suitable LCL filter are essential. Next, we present the mathematical modeling of the proposed LCL filter topology, which lays the foundation for its systematic design.

Mathematical Modeling of the LCL Filter

The mathematical relationship describing the single-phase LCL filter and a wye-connected capacitor is depicted in Figure 8 [26,28], using standard parameters L a , L b , and  C f .
i a ( s ) = v i ( s ) v c ( s ) s L a
where
  • i a ( s ) : Laplace transform of the converter-side inductor current,
  • v i ( s ) : Laplace transform of the input voltage,
  • v c ( s ) : Laplace transform of the capacitor voltage,
  • L a : converter-side inductance.
Figure 8. Single-Phase model representation for LCL filter design.
Figure 8. Single-Phase model representation for LCL filter design.
Designs 10 00006 g008
i 2 ( s ) = v c ( s ) v g ( s ) s L b
where
  • i 2 ( s ) : Laplace transform of the grid-side inductor current (output current);
  • v g ( s ) : Laplace transform of the grid voltage;
  • L b : grid-side inductance.
v c ( s ) = R f + 1 s C f i c ( s )
where
  • v c ( s ) : Laplace transform of the capacitor voltage;
  • R f : damping resistance;
  • C f : filter capacitance;
  • i c ( s ) : Laplace transform of the capacitor current.
The LCL filter transfer function i 2 ( s ) v i ( s ) is derived via the superposition principle as
i 2 ( s ) v i ( s ) = 1 L a L b C f s 3 + ( L a + L b ) s
where L a , L b , C f , and s (Laplace variable) retain their prior definitions.
The flow chart given in Figure 9 describes the structured process for developing the LCL filter used in this paper [29,30].

2.6. LCL Filter Design Algorithm and Pseudocode

The following presents the elaborated LCL filter design algorithm (Algorithm 1) followed by a Python (3.12)-style pseudocode implementation. This provides a clear and detailed methodology for designing LCL filter specifications within the three-phase grid-tied H-bridge inverter system.
A detailed Python-style implementation outline of the design algorithm is provided as Supplementary Material.
Algorithm 1 Elaborated LCL filter design towards three-phase grid-tied H-bridge inverter system
Require: 
Grid frequency f g , switching frequency f s w , base impedance Z b , base capacitance C b , maximum allowable current ripple Δ I m a x , rated current I r a t e d , DC link voltage U, required attenuation factor K a
Ensure: 
Filter parameters: capacitance C f , inductance interfacing the inverter L a , inductance interfacing the grid L b , damping resistor R f
1:
Initialize base parameters and system specifications:
2:
Input f g , f s w , Z b , C b , Δ I m a x , I r a t e d , U, K a
3:
Calculate filter capacitor size:
C f 0.05 × C b
4:
Calculate inverter-side inductor L a to limit current ripple:
L a U 4 f s w Δ I m a x I r a t e d
5:
Initialize grid-side inductor L b with an initial guess
6:
function CalculateResonanceFrequency( L a , L b , C f )
7:
      return  1 2 π L a + L b L a L b C f
8:
end function
9:
repeat
10:
     f r e s CalculateResonanceFrequency( L a , L b , C f )
11:
    if  f r e s 10 f g  or  f r e s 0.5 f s w  then
12:
        Adjust L b (increment or decrement by a small step)
13:
    end if
14:
 until  10 f g < f r e s < 0.5 f s w
15:
Calculate damping resistor R f to suppress resonance:
ω r e s 2 π f r e s
R f 1 3 ω r e s C f
16:
Simulate system with designed filter parameters in MATLAB/Simulink using 15-level CHB MLI and PS PWM
17:
Perform FFT analysis on output voltage and current at PCC to evaluate THD
18:
if THD < 5% then
19:
    Accept design and finalize filter parameters
20:
else
21:
    Adjust filter parameters (e.g., L a , L b , C f , R f ) and repeat design process
22:
end if
23:
Document all design parameters and simulation results for reproducibility and future hardware implementation

3. Proposed LCL Filter Design Procedure

Parameters required for the LCL filter design include rated power (S), RMS line-to-line voltage ( V L L ) at inverter output, switching frequency ( f s w ), DC-link voltage ( V d c ), phase voltage ( V p h ), and grid frequency ( f g ).
The base impedance is defined as
Z b = V p h 2 S
The base capacitance is
C b = S V p h 2 · ( 2 π f g )
Filter components are expressed as percentages of these base values.
The filter capacitance is selected to limit reactive power to 5% of rated power:
C f = 0.05 × C b
Maximum current ripple is limited to 10% of rated current. Rated RMS current is
I r a t e d = S 3 V L L
Maximum ripple current for SPWM inverter ( m = 0.5 ) is
Δ I L , m a x = V d c 8 f s w L a = 0.1 I r a t e d
Thus, converter-side inductance becomes
L a = V d c 8 f s w · 0.1 I r a t e d
To attenuate switching harmonics while maintaining stability, the grid-side inductor satisfies
i 2 i a = 1 1 + L b C f ( 2 π f s w ) 2 = 0.1
Solving for grid-side inductance
L b = 1.1 C f ( 2 π f s w ) 2
Typically, L a = 4 6 L b ensures proper harmonic attenuation.
A series damping resistor R f prevents resonance. Resonant frequency is
f r e s = 1 2 π L a + L b L a L b C f
Design constraint: 10 f g < f r e s < 0.5 f s w . Damping resistor is
R f = 1 3 L a + L b L a L b C f
This systematic procedure yields an LCL filter with <1% THD at rated conditions while satisfying IEEE 519-2022 limits [38].

4. Designed System Parameter and Results

All simulations were conducted in MATLAB/Simulink R2025a using a fixed-step continuous solver (ode23tb) with a maximum time step of 1 × 10 6 s to accurately capture high-frequency PWM switching in the three-phase fifteen-level CHB MLI with PS-PWM, PI control ( K p = 0.5 , K i = 50 , tuned via Ziegler–Nichols for zero steady-state error in the dq-frame), and the proposed LCL filter. The model employs ideal switches without discretization under balanced conditions (400 V L-L, 50 Hz grid). Table 2 and Table 3 show design parameters and LCL filter values obtained via the methodology in Section 2, with resonance frequency f r e s = 2.3 kHz.
The fifteen-level output from the CHB MLI and output of one of the phases of the modulation block implemented on MATLAB are shown in Figure 10 and Figure 11, respectively. Output waveform of the current and voltage obtained by using the proposed LCL filter is shown in Figure 12 and Figure 13, respectively.
First of all, voltage and current THDs at PCC are observed without using a filter, i.e., V2 (L-L) and I2 (L-L), as shown in Figure 14 and Figure 15, respectively. Similarly, the FFT analysis of voltage and current THDs at PCC are observed by using the proposed LCL filter, i.e., Vf2 (L-L) and If2 (L-L), as shown in Figure 16 and Figure 17, respectively.
Firstly, significant harmonic content is found in both Figure 14 and Figure 15. Figure 14 shows about 16.92% of THD, which occurs primarily due to switching in the fifteen-level inverter. In contrast, the current waveform has a lower THD of 3.03% (Figure 15), benefiting from the natural filtering effect of the load and grid impedance.
The harmonic spectra for both are dominated by components near the switching frequency and its multiples up to 5 kHz, characteristic of the Sinusoidal Pulse Width Modulation strategy used. Though the magnitude of current distortion stays low, these harmonic levels intensify in lowering the quality of output power, with more loss, resulting in the risk of damage to the equipment being used. Our results therefore highlight the requirement of a relevant harmonic filter that would enable the operation of the system that meets satisfactory quality of power output and functioning.

4.1. Harmonic Spectrum with the Proposed LCL Filter Applied

The presented figure consists of Figure 16 and Figure 17 showing the frequency domain representations of the inverter output voltage and current at the point of common coupling (PCC) after applying the proposed LCL filter.
In Figure 16 (filtered output voltage harmonics), the dominant fundamental harmonic at 50 Hz exhibits a normalized magnitude of 36 (units relative to fundamental scale).
THD significantly decreases up to 0.69%, which is significantly below the typical industry standard of 5% for grid-connected systems (such as IEEE 519).
Higher-order harmonic components, primarily related to the switching frequency and its multiples (around 2 kHz to 2.5 kHz), are subdued to very low magnitudes, indicating effective attenuation by the LCL filter.
The spectral roll-off beyond 3 kHz confirms the filter’s capability to effectively minimize switching frequency harmonics without introducing resonance peaks in the frequency range of interest.
In Figure 17 (filtered output current harmonics), the fundamental harmonic magnitude is recorded at 562.2 (units relative to fundamental scale), consistent with system current magnitudes.
The current THD is reduced to 0.53%, demonstrating outstanding filtering performance.
Similar to the case of voltage, the current harmonic components beyond the fundamentals are substantially diminished.
Suppression of harmonic current components minimizes thermal and electromagnetic stress on downstream equipment and assists in fulfilling stringent power quality requirements.

4.2. Comparative Analysis of Harmonic Spectra Before and After Filtering

Table 4 and Table 5 summarize the key differences between the unfiltered spectra shown in Figure 14 and Figure 15, and the filtered results from the LCL filter represented in Figure 16 and Figure 17.

Technical Observations

  • Although differences in measurement normalization cause the fundamental amplitude scales to invert between the voltage and current spectra, the trend of harmonic attenuation remains clear and consistent.
  • The value of voltage THD before the process of filtering is considerably higher than that for current THD. This happens because of the inverter switching on the output voltage signal, in addition to the current harmonics being relegated by the system’s impedance.
  • The values of voltage as well as current THD after the filtering process stay lower that 1%. This reinstates the impact of our LCL filtering scheme that is being used to dominate harmonic components.
  • Furthermore, at a switching frequency of 5 kHz, numerous peaks were found earlier. It is seen that the filtering mechanism not only controls these high values but also subjugates the relevant sidebands. This is an important outcome, as these sidebands could otherwise amplify and seriously interfere with the desired outcomes in any installed system.
  • In this way, these results validate the proposed LCL filter design methodology and confirm its suitability for practical grid-tied cascaded H-bridge inverter applications requiring compliance with international power quality standards.

4.3. Parametric Evaluation of LCL Filter Harmonic Performance

To thoroughly evaluate the robustness and effectiveness of the designed LCL filter, the grid-connected inverter system is systematically tested across a wide range of switching frequencies (from 1 to 5 kHz) and grid impedance ratios X/R (from 2 to 9). These parameters are varied to reflect realistic operating conditions, where the switching frequency directly influences the harmonic spectrum at the inverter output, and the X/R ratio represents the inductive versus resistive character of the grid at the point of common coupling.
The harmonic performance is quantified by measuring the total harmonic distortion (THD) of both voltage and current waveforms, both before and after the LCL filter, as detailed in the comprehensive parametric study presented in Table 4 and Table 5. These tables not only document the raw experimental results but also facilitate direct comparison with grid standards such as IEEE 519, underscoring the practical relevance of the findings.
By analyzing these results, the following section draws actionable achievements about the filter’s effectiveness, optimal operating points, and sensitivity to grid and inverter parameters—insights critical for both academic research and field deployment.

4.4. Particulars of LCL Filter Performance

  • The LCL filter delivers consistently low THD for both the voltage and current at the inverter output across all tested switching frequencies (1–5 kHz) and grid impedance ratios ( X / R = 2 –9). In all cases, post-filter THD remains well below the 5% threshold specified by IEEE 519-2022 for grid-connected inverters.
  • For example, at 1 kHz (Table 3), voltage THD is reduced from over 14% (unfiltered) to below 1.2% (filtered), while current THD remains under 2%.
  • The filter’s performance demonstrates low sensitivity to grid impedance variation, proving robust even as the grid becomes more inductive (higher X / R ). This adaptability is crucial for reliable operation in real-world installations, where grid conditions may fluctuate.
  • Standards compliance and optimal performance are both clearly demonstrated: the most favorable results are achieved at 3 kHz and X/R ≈ 5.6, where both voltage and current THD reach their minima (0.53% and 0.69%, respectively). This combination suggests that the filter’s resonance frequency and damping are particularly well tuned for these parameters, yielding the highest power quality within the tested range.
  • Even as switching frequency increases beyond this optimal point—resulting in higher unfiltered ripple (Table 6 and Table 7)—the LCL filter maintains output distortion within acceptable limits, confirming reliable harmonic attenuation across the full operational range.
  • Notably, there is no evidence of resonance-related distortion in the filtered spectra, indicating that the filter’s passive damping strategy effectively suppresses instabilities.
  • It should be noted that these results are obtained under balanced, steady-state, and linear load conditions. Future work should assess performance during grid transients, unbalanced operation, and with nonlinear loads to further validate field readiness.
  • In summary, the systematic parametric evaluation in Table 6, Table 7, Table 8, Table 9, Table 10 and Table 11 confirms that the proposed LCL filter is both effective and robust, offering low harmonic distortion, insensitivity to grid impedance, and compliance with international standards. The optimal operating point identified here provides a practical reference for system design, while the overall performance data establish a strong foundation for both academic research and industrial deployment.
THD variations arise from switching frequency f s w and the grid X/R ratio: higher f s w (e.g., 5 kHz) reduces voltage THD via finer PWM resolution, shifting harmonics beyond filter cutoff. Current THD increases slightly at high X/R (>7) due to resonance proximity ( f r e s 2.3 kHz) but remains <1% across XR = 2–9, demonstrating robustness.
THD calculations employed MATLAB/Simulink’s built-in FFT analyzer with a default 50th harmonic limit and 3 s window, consistent with IEEE 519-2022 §5.2 recommendations for grid-connected inverters. Individual harmonic limits complied with Table 2 of the standard.

4.5. Comparative Performance Analysis

Table 12 compares the proposed LCL filter against recent studies [39,40,41], demonstrating superior harmonic performance (0.53% I-THD, 0.69% V-THD at 5 kHz). While referenced works employ single-phase PV microinverters and simpler topologies, the fifteen-level three-phase CHB MLI configuration with a systematic wye LCL design achieves significantly lower distortion across diverse operating conditions.

4.6. Limitations and Future Work

The simulations assume balanced steady-state conditions with ideal switches and linear grid impedance. While demonstrating excellent harmonic performance, these conditions exclude nonlinear loads, grid faults, and transient events that may affect real-world deployment. Future work will incorporate unbalanced conditions, nonlinear loads (e.g., rectifiers), and dynamic grid events using real-time digital simulators.

5. Conclusions

This work explores the design and evaluation of a three-phase, fifteen-level cascaded H-bridge (CHB) multilevel inverter (MLI), integrated with an optimally designed LCL filter, for use in renewable power systems connected to the electrical grid. The CHB MLI, selected for its ability to generate smooth output waveforms with inherently low harmonic content, is controlled using a Phase-Shifted PWM (PS PWM) technique that ensures even power distribution and minimizes output distortion. Notably, this work contributes a rigorous, reproducible design methodology for the LCL filter, demonstrating that even in challenging grid environments—with variable switching frequencies and a wide range of grid impedance ratios—the system achieves total harmonic distortion (THD) levels well below the 5% threshold specified in international standards such as IEEE 519. This robust performance is validated through comprehensive parametric simulations, with optimal results (THD of 0.53% for current and 0.69% for voltage) achieved at a switching frequency of 3 kHz and X/R ≈ 5.6. The proposed LCL filter outperforms reported benchmarks (Table 12) while maintaining reproducibility through the detailed design algorithm.
The practical implications of these findings are significant: the proposed system offers a reliable, scalable solution for integrating distributed renewable energy sources into power grids with diverse impedance profiles, directly addressing a key challenge in the global transition to sustainable energy. To the authors’ knowledge, this represents one of the most thorough parametric validations of its kind for high-level CHB MLI systems using passive LCL filters. While these results, obtained under balanced, steady-state conditions, provide a strong foundation for academic research and industrial application, future work should include hardware validation, investigation of unbalanced and non-linear operating conditions, and exploration of higher-level MLI configurations for further reduction in THD and filter size. These steps will help bridge the gap between simulation-based design and real-world deployment in next-generation smart grids.

Supplementary Materials

The following supporting information can be downloaded at: https://www.mdpi.com/article/10.3390/designs10010006/s1.

Author Contributions

Conceptualization, U.M. and Z.K.; methodology, M.S. and U.M.; software, A.R.F.; validation, M.S., U.M. and Z.K.; formal analysis, F.A. and M.S.; investigation, U.M. and Z.K.; resources, U.M.; data curation, A.R.F. and F.A.; writing—original draft preparation, M.S. and U.M.; writing—review and editing, U.M. and Z.K.; visualization, Z.K.; supervision, U.M.; project administration, U.M. and Z.K.; funding acquisition, Z.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The data used in this research is available on request from the corresponding author.

Conflicts of Interest

The authors declare no conflict of interest. The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.

Abbreviations

AcronymFull Form
CHBCascaded H-Bridge
MLIMultilevel Inverter
LCLInductor-Capacitor-Inductor
PS-PWMPhase-Shifted Pulse Width Modulation
PCCPoint of Common Coupling
THDTotal Harmonic Distortion
RESRenewable Energy Source
SESSustainable Energy Sources
PWMPulse Width Modulation
LS-PWMLevel-Shifted Pulse Width Modulation
PIProportional-Integral
PLLPhase Locked Loop
SPWMSinusoidal Pulse Width Modulation
APFActive Power Filter
PFPassive Filter
LPFLow-Pass Filter
DCDiode-Clamped
FCFlying Capacitor
FFTFast Fourier Transform
SymbolDescriptionTypical Value/Unit
SRated apparent powerVA
V L L RMS line-to-line voltage400 V
V p h RMS phase voltage V L L / 3
V d c DC-link voltage48 V/bridge
f s w Switching frequency5 kHz
f g Grid frequency50 Hz
Z b Base impedance (= V p h 2 / S ) Ω
C b Base capacitanceF
L a Converter-side inductance1.0 mH
L b Grid-side inductance0.3 mH
C f Filter capacitance17.6 μF
R f Damping resistance3 Ω
f r e s Resonant frequency2.3 kHz
I r a t e d Rated RMS currentA
Δ I L , m a x Max inductor current ripple10% of I r a t e d
K p Proportional gain0.5
K i Integral gain50
i a ( s ) Converter-side current (Laplace)A
i 2 ( s ) Grid-side current (Laplace)A
i c ( s ) Capacitor current (Laplace)A
v i ( s ) Inverter voltage (Laplace)V
v c ( s ) Capacitor voltage (Laplace)V
v g ( s ) Grid voltage (Laplace)V
sLaplace variablerad/s

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Figure 1. Three-phase grid-connected inverter with LCL filter.
Figure 1. Three-phase grid-connected inverter with LCL filter.
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Figure 3. 15-level CHB MLI topology: 7 series H-bridges per phase generate 15 discrete voltage levels ( 2 N + 1 , N = 7 ). Each H-bridge receives isolated 48 V DC. PS-PWM controls all 21 H-bridges (3 phases).
Figure 3. 15-level CHB MLI topology: 7 series H-bridges per phase generate 15 discrete voltage levels ( 2 N + 1 , N = 7 ). Each H-bridge receives isolated 48 V DC. PS-PWM controls all 21 H-bridges (3 phases).
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Figure 4. Modulation block of simulation in Simulink.
Figure 4. Modulation block of simulation in Simulink.
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Figure 5. Internal model of the individual phase of the PWM generator.
Figure 5. Internal model of the individual phase of the PWM generator.
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Figure 6. Block diagram of PI controller used in grid-connected MLI.
Figure 6. Block diagram of PI controller used in grid-connected MLI.
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Figure 7. Simulation block of three-phase LCL filter.
Figure 7. Simulation block of three-phase LCL filter.
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Figure 9. LCL filter design flow chart. Step 1 (Parameters): f g = 50 Hz, f s w = 5 kHz, S = 17.6 kVA, V L L = 400 V. Step 2 (Capacitor): C f = 0.05 C b (5% base capacitance, power factor variation limit). Step 3 (Inverter Inductor): L a = V d c 4 f s w Δ I m a x I r a t e d (10% ripple limit). Step 4 (Resonance): f r e s = 1 2 π L a L b L a + L b C f where 10 f g < f r e s < 0.5 f s w (achieved 2.3 kHz). Step 5 (Damping): R f = 1 3 ω r e s C f ( ω r e s = 2 π f r e s ). Step 6 (Verification): MATLAB/Simulink FFT confirms THD < 5 % (0.53% current, 0.69% voltage).
Figure 9. LCL filter design flow chart. Step 1 (Parameters): f g = 50 Hz, f s w = 5 kHz, S = 17.6 kVA, V L L = 400 V. Step 2 (Capacitor): C f = 0.05 C b (5% base capacitance, power factor variation limit). Step 3 (Inverter Inductor): L a = V d c 4 f s w Δ I m a x I r a t e d (10% ripple limit). Step 4 (Resonance): f r e s = 1 2 π L a L b L a + L b C f where 10 f g < f r e s < 0.5 f s w (achieved 2.3 kHz). Step 5 (Damping): R f = 1 3 ω r e s C f ( ω r e s = 2 π f r e s ). Step 6 (Verification): MATLAB/Simulink FFT confirms THD < 5 % (0.53% current, 0.69% voltage).
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Figure 10. Output voltage waveform of fifteen-level CHB MLI.
Figure 10. Output voltage waveform of fifteen-level CHB MLI.
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Figure 11. Output waveform of one phase of the modulation generator.
Figure 11. Output waveform of one phase of the modulation generator.
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Figure 12. Output current waveform using filter, i.e., If2 (L-L).
Figure 12. Output current waveform using filter, i.e., If2 (L-L).
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Figure 13. Output voltage waveform using filter, i.e., Vf2 (L-L).
Figure 13. Output voltage waveform using filter, i.e., Vf2 (L-L).
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Figure 14. Total harmonic distortion spectrum of unfiltered inverter output voltage at PCC.
Figure 14. Total harmonic distortion spectrum of unfiltered inverter output voltage at PCC.
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Figure 15. Total harmonic distortion spectrum of unfiltered inverter output current at PCC.
Figure 15. Total harmonic distortion spectrum of unfiltered inverter output current at PCC.
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Figure 16. Total harmonic distortion spectrum of filtered inverter output voltage at PCC.
Figure 16. Total harmonic distortion spectrum of filtered inverter output voltage at PCC.
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Figure 17. Total harmonic distortion spectrum of filtered inverter output current at PCC.
Figure 17. Total harmonic distortion spectrum of filtered inverter output current at PCC.
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Table 2. Design parameters of the system.
Table 2. Design parameters of the system.
NoSystem ParameterValue
1VL-L400 V (rms)
2S17.6 kVA
3fsw5 kHz
4Vdc48 V (to each bridge)
5fg50 Hz
Table 3. LCL filter parameters of the system.
Table 3. LCL filter parameters of the system.
NoSystem ParameterValue
1Cf17.6 μF
2L11 mH
3L20.3 mH
4Rf3 Ω
Table 4. Comparison of line-to-line inverter output voltage harmonic characteristics before and after LCL filtering.
Table 4. Comparison of line-to-line inverter output voltage harmonic characteristics before and after LCL filtering.
S.NoParameterUnfiltered Voltage (Figure 14)Filtered Voltage (Figure 16)
1Signal TypeLine-to-line inverter output voltageLine-to-line voltage after LCL filtering
2Total Harmonic Distortion (THD)16.92%0.69%
3Fundamental Peak Magnitude∼562 (normalized units)∼36 (normalized units)
4Switching Frequency HarmonicsProminent peaks at 2–5 kHz with high magnitudeSignificantly attenuated; minor residual peaks
5Harmonic Content RangeHarmonics present up to 5 kHz, substantial magnitudeHarmonics nearly vanish beyond 1.5 kHz
6Noise FloorSignal well above noise floor with clear harmonic peaksHarmonics approach or drop below noise floor
7Resonance EffectsNo resonance suppression as no filter appliedNo resonance peaks; effective damping by resistor
8Measurement ScalingHigher amplitude scale typical for voltage signalsReduced amplitude scale post-filtering (normalized)
9Dominant HarmonicsLarge non-fundamental peaks at multiples of 50 Hz (near 2.5 kHz)Dominant fundamental 50 Hz harmonic; higher harmonics nearly absent
10Waveform PuritySignificant waveform distortion due to switching harmonicsNearly sinusoidal; filter yields high waveform purity
11Impact on Power QualitySevere distortion impacting grid power quality; possible non-complianceTHD well under 5%; compliant with IEEE 519 and maintaining power quality
12Equipment/Grid ImplicationsHigh risk of overheating, component aging, and interferenceMinimizes equipment stress; supports grid stability and component lifespan
Table 5. Comparison of line-to-line inverter output current harmonic characteristics before and after LCL filtering.
Table 5. Comparison of line-to-line inverter output current harmonic characteristics before and after LCL filtering.
S.NoParameterUnfiltered Current (Figure 15)Filtered Current (Figure 17)
1Signal TypeLine-to-line inverter output currentLine-to-line current after LCL filtering
2Total Harmonic Distortion (THD)3.03%0.53%
3Fundamental Peak Magnitude∼36 (normalized units)∼562 (normalized units)
4Switching Frequency HarmonicsPeaks near switching frequency but lower magnitudeSignificantly attenuated; minor residual harmonics
5Harmonic Content RangeHarmonics up to 5 kHz; smoother spectrum than voltageHarmonics nearly vanish beyond 1 kHz
6Noise FloorCloser to noise floor; harmonic peaks discernibleHarmonics at or below noise floor, hard to observe
7Resonance EffectsNo resonance damping presentNo resonance peaks; effective resonance damping observed
8Measurement ScalingLower amplitude scale typical for current signalsAmplitude scale increased post-filtering (normalized)
9Dominant HarmonicsLower magnitude non-fundamental peaksDominant 50 Hz fundamental harmonic; higher harmonics suppressed
10Waveform PurityModerate waveform distortionNearly sinusoidal waveforms
11Impact on Power QualityModerate risk of grid disturbance and measurement errorsTHD well below IEEE 519 limits; high power quality
12Equipment/Grid ImplicationsModerate risk of thermal and electromagnetic stressMinimal risk; improved reliability and grid compatibility
Table 6. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 1 kHz.
Table 6. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 1 kHz.
No.X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1214.961.053.201.47
2414.801.093.311.51
35.615.341.053.341.47
4714.751.113.291.52
5915.001.073.251.51
Notes: Vunfiltered and Iunfiltered denote values before filtering; Vfiltered and Ifiltered after LCL filtering. X/R is the grid impedance ratio. THD values are percentages.
Table 7. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 2 kHz.
Table 7. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 2 kHz.
No.X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1215.160.442.600.61
2415.690.492.580.70
35.615.680.542.640.73
4715.390.492.600.69
5915.580.532.630.72
Notes: Same as Table 6.
Table 8. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 3 kHz.
Table 8. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 3 kHz.
No.X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1216.810.542.970.80
2417.020.563.020.77
35.616.920.533.030.69
4716.930.722.941.04
5917.090.703.001.00
Notes: Same as Table 6.
Table 9. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 4 kHz.
Table 9. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 4 kHz.
No.X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1222.591.314.551.82
2423.401.254.601.76
35.623.001.234.631.83
4723.171.224.601.74
5923.461.284.701.81
Notes: Same as Table 6.
Table 10. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 5 kHz.
Table 10. THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different grid X/R ratios at switching frequency f s w = 5 kHz.
No.X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1215.911.392.342.02
2416.101.312.361.89
35.616.291.302.301.80
4716.331.382.341.96
5916.351.392.351.94
Notes: Same as Table 6.
Table 11. Summary of THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different switching frequencies f s w at grid X/R ratio around 5.6.
Table 11. Summary of THD variation in inverter parameters at the PCC with designed LCL filter applied. Results for different switching frequencies f s w at grid X/R ratio around 5.6.
No.Switching Frequency f sw  (kHz)X/R RatioVunfiltered (THD %)Vfiltered (THD %)Iunfiltered (THD %)Ifiltered (THD %)
1115.341.053.341.472.02
2215.690.542.640.731.89
3316.920.533.030.691.80
4422.481.233.131.301.96
5516.291.312.351.931.94
Notes: This table summarizes THD values for different switching frequencies at approximately fixed X/R ratio of 5.6. Columns: X/R = grid impedance ratio, THD values in percent before and after LCL filtering.
Table 12. LCL filter performance comparison.
Table 12. LCL filter performance comparison.
Study f sw (kHz)I-THD (%)V-THD (%)Topology/Application
This work50.530.6915-level three-phase CHB
[39]41.11.6Single-phase PV microinverter
[40]3.21.42.0PV inverter, passive damping
[41]3.51.31.8Single-phase PV
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Sattar, M.; Masud, U.; Farooqi, A.R.; Akram, F.; Khan, Z. Parametric Design of an LCL Filter for Harmonic Suppression in a Three-Phase Grid-Connected Fifteen-Level CHB Inverter. Designs 2026, 10, 6. https://doi.org/10.3390/designs10010006

AMA Style

Sattar M, Masud U, Farooqi AR, Akram F, Khan Z. Parametric Design of an LCL Filter for Harmonic Suppression in a Three-Phase Grid-Connected Fifteen-Level CHB Inverter. Designs. 2026; 10(1):6. https://doi.org/10.3390/designs10010006

Chicago/Turabian Style

Sattar, Madiha, Usman Masud, Abdul Razzaq Farooqi, Faraz Akram, and Zeashan Khan. 2026. "Parametric Design of an LCL Filter for Harmonic Suppression in a Three-Phase Grid-Connected Fifteen-Level CHB Inverter" Designs 10, no. 1: 6. https://doi.org/10.3390/designs10010006

APA Style

Sattar, M., Masud, U., Farooqi, A. R., Akram, F., & Khan, Z. (2026). Parametric Design of an LCL Filter for Harmonic Suppression in a Three-Phase Grid-Connected Fifteen-Level CHB Inverter. Designs, 10(1), 6. https://doi.org/10.3390/designs10010006

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