# A Novel Synchronized Multiple Output DC-DC Converter Based on Hybrid Flyback-Cuk Topologies

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## Abstract

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_{rms}. Moreover, the total harmonics distortion is measured between 36.25 and 27.69%. Thus, the results can achieve all required functions efficiently with minimum losses at a high range of duty cycles.

## 1. Introduction

- The proposed HFC has only one switch with single primary isolated input and dual outputs.
- The voltage gain of HFC is enhanced by keeping it less than 1 for higher duty cycle values. Conventional flyback or Cuk converters experience a dramatic voltage gain increase after 50% duty cycles. Thus, HFC can be used for both step-up and step-down states.
- The switching losses for the switch are minimized. Hence, the efficiency of the proposed HFC is high and can reach around 90% for higher duty cycle values (e.g., 80% duty cycle).
- The proposed HFC can supply and receive energy simultaneously, making it suitable for different applications of energy conversion systems.
- An EV charger is used as a case study to demonstrate the efficacy of the proposed HFC. It can step down the voltage at high duty cycles, and simultaneous bidirectional operation was confirmed.

## 2. Analysis of the Proposed HFC Converter

- In steady-state, the average inductor voltage is zero.
- In steady-state, the average capacitor current is zero.
- In steady-state, the average value of the Cuk coupling capacitor (C
_{k}) is V_{in}+ V_{o}.

**A.****When Q is ON:**Both the flyback output diode (D_{f}) and the Cuk diode (D_{k}) are reverse biased. Figure 3 illustrates the current and voltage directions for the ON state. During this period, the magnetization inductance (L_{m}) is being energized from the input voltage source. Therefore, the rate of change of current in the magnetization inductance is linearly increased according to the following equation:

_{k}is (V

_{ck}− V

_{o}), and the rate of change of its current is given by:

_{ck}is the Cuk stage output voltage as given below in Equation (3):

**B.****When Q is OFF:**Diodes (D_{f}) and (D_{k}) are conducting. Figure 4 shows the currents and voltage directions for the OFF state. During this mode, L_{m}is being de-energized by (−V_{1}). The rate of change of current in the magnetization inductance is given by:

_{k}is also de-energized by the voltage V

_{ck}, and the rate of change of the current in the inductor L

_{k}is given by:

_{Q}) can be calculated as:

_{s}< N

_{p}) that the HFC is a step-down converter. Figure 5 displays the voltage gain versus the duty cycle for HFC, flyback, and Cuk converters. It can be seen that; the lowest voltage gain (blue curve) is HFC gain compared with the other converters’ gains for flyback (red curve) and Cuk (green curve).

## 3. Simulation Results

^{−3}, and a maximum step size of 25 µs is selected. The simulation time is set to 2 s to ensure that the proposed HFC converter eventually operates at a steady state.

#### 3.1. Model Parameters

_{m}) is selected to minimize the current ripple on the primary side, thus, simplifying the design of the circuit’s EMI filter [22]. The minimum limit value for the inductance is:

_{s}is the selected switching frequency, and R

_{o}is the output resistance. The output capacitance C

_{f}is selected to minimize the output voltage ripple, determine the poles of the system modulator, and indicate the response of the supply to a sudden large change of the load current [23]. The minimum flyback output capacitance is:

_{m}and L

_{k}are selected to reduce the complexity of the EMI filter [24]. The inductance values are given by:

_{m,k}is the desired current ripple in L

_{m}or L

_{k}. The selected value for the common inductance L

_{m}should be the maximum inductance value given by both Equations (10) and (13). The Cuk output capacitance C

_{ck}is designed to be:

#### 3.2. Results and Waveforms

_{m}and L

_{k}currents for both inductances in CCM. The voltage and current of the switch Q are shown in Figure 8. During switch voltage fall time (red color), the switch output capacitance is forced to discharge its energy through the switch channel; then, the switch voltage is rapidly decreased to zero. The speed of discharging the energy depends on the switch current, known as hard switching [25]. This also can happen for switch voltage rise time, when the output capacitor charges and the voltage is rapidly increased to V

_{in}(high). The hard switching of the switch Q affects the rising and falling edges of the drain current, so abrupt changes in the drain current are seen.

#### 3.3. Efficiency Assessment

_{o}is the output power of the converter and P

_{loss}is the total losses in all converter components. The losses in the converter can be divided into three main components: conduction losses, switching losses and control losses [26,27]. Table 2 summarizes the loss calculations, and the efficiency of the HFC converter is compared with the efficiency of Figure 1. This is shown in Figure 10. Table 3 compares the number of components between HFC topology and the conventional flyback and Cuk topology.

#### 3.4. Effect of Load Change

## 4. Application: Electric Vehicle Adapter

- 1.
- Forward the energy when I
_{in}> 0 and I_{o_f}> 0. This means the load consumed the power from the proposed converter’s upper terminals (flyback terminals). - 2.
- Reverse the energy when I
_{in}> 0 and I_{o_c}< 0. This means the energy storage system is being charged from the proposed converter’s lower terminals (Cuk terminals).

_{rms}–260 V

_{rms}).

_{rms}), after 0.05 s, the voltage and current were settled down and became more stable. Additionally, the ripple percentage for reverse voltage and current is within the standard limits.

_{rms}, the current has higher THD than the AC input current when the input voltage is 220 V

_{rms}. Furthermore, the odd harmonics are noticeable in both AC input currents, especially third and fifth harmonics. A proper input filter design must be considered to reduce the THD in both currents further.

_{in}is 220 V

_{rms}), whereas the PF of the input current is 94.01% (when V

_{in}is 110 V

_{rms}). Both power factors are within an acceptable limit.

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

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**Figure 13.**Waveforms when the input voltage is 220 V

_{rms}. (

**A**) line current, (

**B**) rectified voltage (

**C**) forward voltage, (

**D**) forward current, (

**E**) reverse voltage, (

**F**) reverse current.

**Figure 14.**Waveforms when the input voltage is 110 V

_{rms}. (

**A**) line current, (

**B**) rectified voltage (

**C**) forward voltage, (

**D**) forward current, (

**E**) reverse voltage, (

**F**) reverse current.

Parameter | Description | Value |
---|---|---|

P_{in}/P_{o} | input/output power | 300 W |

V_{in} | input voltage | 220 V |

V_{o} | output voltage | 50 V |

I_{o} | output current | 6 A |

R_{o} | load resistance | 8.3 Ω |

f_{s} | switching frequency | 20 kHz |

L_{m} | magnetization inductance | 18 mH |

N_{p}/N_{s} | transformer T turns ratio | 220/90 |

C_{f} | flyback output capacitance | 0.2 mF |

C_{k} | Cuk coupling capacitance | 110 uF |

L_{k} | Cuk second inductance | 34 uH |

C_{ck} | Cuk output capacitance | 20 nF |

Losses Type | Equation | Conditions | |
---|---|---|---|

Losses of Figure 2 | |||

conduction loss | In Q | ${P}_{con-Q}=\frac{{R}_{on}{V}_{in}^{2}}{3D{R}_{1}^{2}}$ | R_{on}: MOSFET on-state resistanceR _{1}: series resistance of the current loop |

In D_{f} or D_{k} | ${P}_{con-Df}=\frac{{V}_{f}{V}_{in}^{2}}{4{V}_{o}{R}_{1}}$ | V_{f}: flyback diode forward voltage | |

switching loss | In Q | ${P}_{sw-Q}=0.5{f}_{s}{C}_{oss}{\left(0.5{V}_{in}+{V}_{o}\right)}^{2}$ | C_{oss}: switch output capacitance |

In D_{f} or D_{k} | ${P}_{sw-Q}=0.5{f}_{s}{C}_{d}{\left(0.5{V}_{in}+{V}_{o}\right)}^{2}$ | C_{d}: diode parasitic capacitance | |

control loss | ${P}_{g-Q}=2{Q}_{g}{V}_{g}{f}_{s}$ | Q_{g}: switch gate chargeV _{g}: voltage needed to charge the gate | |

transformer loss | Copper losses are considered with conduction losses. | ||

Core losses are ignored because it is assumed that the core is ideal. | |||

total loss | ${P}_{t}={P}_{cond-Q}+{P}_{cond-Df}+{P}_{cond-Dk}+{P}_{sw-Q}+{P}_{g-Q}$ |

Comparison Aspect | The Proposed HFC as Shown in Figure 2 | Conventional Circuit of Flyback and Cuk Converters |
---|---|---|

number of transformers | 1 | 1 |

number of passive components | 4 | 5 |

number of diodes | 2 | 2 |

number of switches | 1 | 2 |

number of control loops | 1 | 2 |

number of power supplies | 1 | 2 |

number of output ports | 3 | 2 |

voltage stress across Q | ${V}_{in}+\frac{{N}_{p}}{{N}_{s}}{V}_{f}$ | ${V}_{in}+\frac{{N}_{p}}{{N}_{s}}{V}_{f}$ |

step down capability | able to step down V_{o} when D_{Q} < 85% | able to step down V_{o} when D_{Q} < 50% |

voltage gain (VG) | lower VG over D_{Q} | higher VG over D_{Q} |

efficiency at full load conditions | 89% | 88.3% |

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**MDPI and ACS Style**

Mahafzah, K.A.; Obeidat, M.A.; Al-Shetwi, A.Q.; Ustun, T.S.
A Novel Synchronized Multiple Output DC-DC Converter Based on Hybrid Flyback-Cuk Topologies. *Batteries* **2022**, *8*, 93.
https://doi.org/10.3390/batteries8080093

**AMA Style**

Mahafzah KA, Obeidat MA, Al-Shetwi AQ, Ustun TS.
A Novel Synchronized Multiple Output DC-DC Converter Based on Hybrid Flyback-Cuk Topologies. *Batteries*. 2022; 8(8):93.
https://doi.org/10.3390/batteries8080093

**Chicago/Turabian Style**

Mahafzah, Khaled A., Mohammad A. Obeidat, Ali Q. Al-Shetwi, and Taha Selim Ustun.
2022. "A Novel Synchronized Multiple Output DC-DC Converter Based on Hybrid Flyback-Cuk Topologies" *Batteries* 8, no. 8: 93.
https://doi.org/10.3390/batteries8080093